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Analog IC Unit 2 Notes

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0% found this document useful (0 votes)
141 views12 pages

Analog IC Unit 2 Notes

Uploaded by

Anandakumar A
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Unit – 2

Miller Effect:
• It refers to the phenomenon where the input capacitance of a transistor or
electronic component appears to be larger than it actually is due to voltage gain
of amplifier.

Proof:

Association of poles with nodes:


• Consider the simple cascade of amplifiers. A1 and A2 are ideal voltage
amplifiers, R1 and R2 model the output resistance of each stage.
• Cin and CN represent the input capacitance of each stage.

• The circuit exhibits three poles, each of which is determined by the total
capacitance seen from each node to ground multiplied by the total resistance
seen at the node to ground.
• each node in the circuit contributes one pole to the transfer function.

• The above statement is not valid in general.


• For example, the location of the poles is difficult to calculate because R3 and C3
create interaction between X and Y.

• Association of one pole with each node provides an intuitive approach to


estimating the transfer function.
Frequency response of CS, CG and Source Follower:
Common Source Stage:
• The common-source topology exhibits a relatively high input impedance while
providing voltage gain and requiring a minimal voltage headroom.
• As such, it finds wide application in analog circuits and its frequency response
is of interest.

• Assuming that λ = 0 and M1 operates in saturation, let us first estimate the


transfer function by associating one pole with each node.
• The total capacitance seen from X to ground is equal to C GS plus the Miller
multiplication of CGD.

• At the output node, the total capacitance seen to ground is equal to CDB plus the
Miller effect of CGD.
• Another approximation of the output pole can be obtained.

Direct Analysis:
• Obtain the exact transfer function, investigating the validity of the above
approach.
Source Followers:
• Source followers are occasionally employed as level shifters or buffers, affecting
the overall frequency response.

• Consider the circuit depicted where CL represents the total capacitance seen at
the output node to ground.

• Also, noting that the voltage across CG D is equal to V1 + Vout and beginning
from Vin, we add the voltage across RS to V1 and Vout

Common Gate Stage:


• A common-gate stage, the input and output nodes are “isolated” if channel length
modulation is neglected.
• An important property of this circuit is that it exhibits no Miller multiplication
of capacitances, potentially achieving a wide band.
• For these reasons, the CG stage finds two principal applications: as an amplifier
in cases where a low input impedance is required and in cascode stages.

Cascode and Differential Amplifier stages:


Cascode stage:
• Cascoding proves beneficial in increasing the voltage gain of amplifiers and the
output impedance of current sources while providing shielding as well.
• The invention of the cascode (in the vacuum tube era), however, was motivated
by the need for high-frequency amplifiers with a relatively high input
impedance.
• Viewed as a cascade of a common-source stage and a common-gate stage, a
cascode circuit offers the speed of the latter—by suppressing the Miller effect—
and the input impedance of the former.
• First identifying all of the device capacitances. At node A, CGS1 is connected to
ground and CG D1 to node X.
• At node X, CDB1,CSB2, and CGS2 are tied to ground, and at node Y , CDB2,
CG D2, and CL are connected to ground.
• The Miller effect of CG D1 is determined by the gain from A to X. As an
approximation, we use the low-frequency value of this gain, which for low
values of RD (or negligible channel-length modulation) is equal to −gm1/(gm2
+ gmb2).
• That the Miller effect is less significant in cascode amplifiers than in common-
source stages. The pole associated with node A is estimated as

• The total capacitance at this node is roughly equal to 2CG D1 + CDB1 + CSB2
+ CGS2, giving a pole

• The relative magnitudes of the three poles in a cascode circuit depend on the
actual design parameters, but ωp,X is typically quite a lot higher than the other
two.
Differential Amplifier:
• For differential signals, the response is identical to that of a common-source
stage, exhibiting Miller multiplication of CGD.

Statistical characteristics of noise:


• Noise is a random process.
• If the instantaneous value of noise in the time domain cannot be predicted, how
can we incorporate noise in circuit analysis? This is accomplished by observing
the noise for a long time and using the measured results to construct a “statistical
model” for the noise.
• While the instantaneous amplitude of noise cannot be predicted, a statistical
model provides knowledge about some other important properties of the noise
that prove useful and adequate in circuit analysis.

• The concept of average power proves essential in our analysis and must be
defined carefully.
• Recall from basic circuit theory that the average power delivered by a periodic
voltage v(t) to a load resistance RL is given by

• To simplify calculations, we write the definition of Pav as

Noise Spectrum:
• The concept of average power becomes more versatile if defined with regard to the frequency
content of noise.

• The noise made by a group of men contains weaker high-frequency components than that made by
a group of women, a difference observable from the “spectrum” of each type of noise.
Noise analysis procedure:
• It consists of four steps:
1. Identify the source of noise and write down the spectrum of each.
2. Find the transfer function from each noise source to the output.
3. Utilize the theorem, Sy(f) = Sx (f) | H (f)|2 to calculate the output noise
spectrum.
4. Add all of the output spectra, paying attention to correlated and uncorrelated
sources.
Types of noise:
• Thermal Noise
• Flicker Noise
Noise in single stage amplifiers:
Lemma:

Proof:
Common – Source stage:

• The input-referred noise voltage per unit bandwidth of a simple CS stage is equal
to

• From the above lemma, recognize that the term 4KT is in fact the thermal noise
current of M1 expressed as a voltage in series with gate.
Common – Gate stage:

• Neglecting channel-length modulation, we represent the thermal noise of M1


and RD by two current sources

• We have thus far neglected the noise contributed by the bias-current source of a
common-gate stage.
• A simple mirror arrangement establishing the bias current of M1 as a multiple
of I1. Capacitor C0 shunts the noise generated by M0 to ground.
Source followers:

• where M2 serves as the bias-current source. Since the input impedance of the
circuit is quite high, even at relatively high frequencies, the input-referred noise
current can usually be neglected for moderate driving source impedances.

Cascode stage:
• Since at low frequencies the noise currents of M1 and RD mostly flow through RD, the noise
contributed by these two devices is quantified as in a common-source stage:

• we note that the voltage gain from Vn2 to the output is quite small if the impedance at node X is
large. At high frequencies, on the other hand, the total capacitance at node X, CX , gives rise to a gain

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