PAGING & SEGMENTATION
Sohaib Ahsan B22110106074
Sheikh Uzair Raza B22110106073
Muzammil Bukhari B22110106074
Hasan Anas B22110106073
Nabeel Naveed B22110106074
PAGING
BASIC TERMINOLOGIES
• Page:
A fixed-length block of data that resides in secondary memory
(such as a disk). A page of data may temporarily be copied into a
frame of main memory.
• Frame:
A fixed-length block of data that resides in secondary memory
(such as a disk). A page of data may temporarily be copied into a
frame of main memory.
INTRODUCTION TO PAGING
• Paging is a memory management scheme that eliminates external
fragmentation by dividing memory into fixed-sized blocks.
• Memory is divided into frames, and processes are divided into
pages of the same size.
• Pages are loaded into available memory frames when a process is
executed.
• Paging avoids external fragmentation by using equal-sized chunks
for memory and processes.
PAGING PROCESS OVERVIEW
Steps in Paging:
• Divide the process into pages.
• Divide memory into frames.
• Load pages into available frames.
• Key Point:
• Pages and frames are of the same size.
Frame No.
Bytes Bytes
Page No. Process1
0 0 1
0 0 1
1 2 3
1 2 3 Memory size = 16B
2 4 5 Frame size = 2B
Process size = 4B
Page size = 2B 3 6 7 No. of frames = 16/2
=8
No. of pages = 4/2 4 8 9
=2
5 10 11
Note: CPU will call bytes of process 6 12 13
regardless of where they are stored.
7 14 15
PAGE TABLE
What is a Page Table:
A page table maintains the mapping of logical page numbers to
physical frame numbers.
P1
2 4 5
0 F2
3 6 7
1 F4
4 8 9
Note: Each Process has it’s own page table
P1 MMU
3
CPU Memory
Physical Address 9
Logical Address Management
Unit
1 1 100 1 Frame Offset / size
Page No. Page Offset / size Frame No.
( to show 8 frames, we need 3 bits)
0 1 Page table 2 4 5
0 0 1 0 F2
3 6 7
1 2 3 1 F4 4 8 9
ADDRESS LENGTH IN BITS BASED ON MEMORY
SIZE
Address Length (in bits) = log2(Memory Size (in bytes)) OS
100000000000 System
111111111111
111111111110
Area
ADDRESS LENGTH IN BITS FOR A MEMORY SIZE OF 4 KB 111111111101
111111111100
…
• Converting 4 KB to Bytes: 4 × 1024 = 4096 bytes …
• Each location = 1 byte(by default), so 4096 locations. …
• Calculate address length: log2(4096) = 12 bits …
000000000101
Final Answer: 12 bits are needed to address 4 KB of memory. 000000000100
000000000011 User Area
000000000010
000000000001
000000000000
ANALOGY
1029 Address
Book Page Number(Representing Page Line number on that particular page
Number) (Representing offset)
LOGICAL VS PHYSICAL VIEWS OF MEMORY
EXAMPLE
Page Size = 2 Bytes
Process Size = 4 Pages = 4 x 2B = 8B
Physical Memory Size = 8 Frames = 16B
Physical Memory Size 16B = 2 4 B
Hence 4 Bit Addressing is
required in Main Memory
111
Logical address : 111
CPU
Page Number Instruction Offset
RAM FRAMES
PROCESS PAGE TABLE
PAGE FRAMES
1111 111
111 a 1110
a
b 1101 110
110 11 1100 b
00 000
101 c 1011 101
1010
01 100 e
100 d 10 1001 100
1000 f
e 10 011 c 011
011 0111
0110 d
010 f 01
11 110 0101
0100
010
001 g
0011 001
0010
h
000 00 0001 h
g 000
0000
PAGE TRANSLATION
Compute Memory size, locations in one page
and total no of pages
Given:
Logical Address: 0101011011101010101101110110 - 28bits
Physical Address: 0101011101001101001 - 19bits
Page size: 2KB
Page Logical address Frame Physical address
P d F d
28 19
2¹⁰ = 1K (Kilobytes)
2²⁰= 1M (Megabytes)
228 = 28 . 220 219 = 29 . 210 2³⁰ = 1G (Gigabytes)
= 256 . 1M 2⁴⁰ = 1T (Terabytes)
= 512 . 1K
= 256M*1B = 512K*1B
= 256MB = 512KB
Secondary memory Main memory
Page Logical address Frame Physical address
Offset is same for
P d F d page/frame
b/c page and frame
11 11 should always equal
28 19
Given: Page size: 2KB
Assume each location is of 1B 2¹⁰ = 1K (Kilobytes)
2²⁰= 1M (Megabytes)
2K locations for each 2³⁰ = 1G (Gigabytes)
2𝐾𝐵 page/frame 2⁴⁰ = 1T (Terabytes)
= 2K
1𝐵
2K is equivalent to 2.2¹⁰ = 2¹¹
Where 11 represents no of bits required
So, instruction offset d is 11 bits
Page Logical address Frame Physical address
Offset is same for
P d F d page/frame
28-11 19-11 b/c page and frame
17 11 8 11 should always equal
28 19
Calculate no of Pages and frames
2¹⁰ = 1K (Kilobytes)
2²⁰= 1M (Megabytes)
No of Pages 2³⁰ = 1G (Gigabytes)
No of frames 2⁴⁰ = 1T (Terabytes)
217 = 27 . 210
= 128 . 1K 28 = 256 frames
= 128K pages
Segmentation
Explore the essentials of segmentation and unlock deeper insights.
Segmentation and
Paging
● Segmentation: divides process into logical units
(segments) of varying sizes.
● Paging: divides process into fixed-size units
(pages).
● Segmentation is user-centric, based on program
structure.
● Paging is system-centric, simplifying memory
management.
● Both techniques enable efficient memory
allocation and organization.
Segmentation Deep
Dive
● Segments: Logical divisions of a program's
code, data, or stack.
● Created based on program structure,
reflecting user's view.
● Each segment has a base address and size,
defining its memory space.
● Logical addresses: References within a
segment (offset from base).
● Physical addresses: Actual memory locations.
● Translation: Logical to physical using segment
table (base + offset).
Segmentation vs.
Paging: A
Comparative
Overview
● Segmentation: variable-sized, logical divisions,
user-centric, based on program structure.
● Paging: fixed-size divisions (pages), system-
centric, simplifies memory management.
● Segmentation Advantages: reflects program
structure, better memory protection.
● Segmentation Disadvantages: external
fragmentation, complex memory management.
● Paging Advantages: no external
fragmentation, simple memory management.
● Paging Disadvantages: internal fragmentation,
overhead for page tables.
**Key Takeaways:
Segmentation and
Paging**
● Segmentation and paging are memory
management techniques.
● Segmentation divides a process into logical,
variable-sized units.
● Paging divides a process into fixed-size units.
● Segmentation is user-centric, while paging is
system-centric.
● Both techniques enable efficient memory
allocation and organization.
● Understanding these concepts is essential for
comprehending operating system
functionality.
Given:
Logical Address: 0010011101010 – 13bits
Segment number Base Address Limit (Size)
0 1000 500
1 3000 600
2 7000 400
3 9000 1000
4 12000 800
Logical Address: 0010011101010 – 13bits
Divide the Logical Address into Segment Number and Offset
• 3 bits (001) for the segment number (since we have 5 segments).
001 (binary) = 1 (decimal)
• Next 10 bits (0011101010) for the offset (based on the largest segment size
of 1000 bytes).
0011101010 (binary) = 482 (decimal).
Given: Segment number Base Address Limit (Size)
0 1000 500
1 3000 600
2 7000 400
3 9000 1000
4 12000 800
• From the segment table:- The limit for segment 1 is 600.
• Since the offset (482) is within the limit, the address is valid.
Translate to Physical address
• The base address for segment 1 is 3000.
The physical address is computed as:
PA = Base add + instruction offset
= 3000 + The physical address corresponding to the logical address
0010011101010 is 3482482
= 3482
The physical address corresponding to the logical address
0010011101010 is 3482
Conclusion
1. Memory management techniques: Paging and segmentation are key techniques for
efficient memory allocation in operating systems.
2. Fixed vs. Variable Sizes: Paging uses fixed-size pages, while segmentation employs
variable-sized segments based on logical program divisions.
3. Address Translation: Paging translates logical addresses using a page number and
offset, whereas segmentation uses a segment number and offset.
Conclusion
4. Fragmentation Issues: Paging can cause internal fragmentation, while segmentation is
susceptible to external fragmentation.
5. Optimizing Performance: Both techniques aim to improve memory usage and access
speed, each addressing different application needs.
