Al Hussein Bin Talal

University
Faculty of Engineering
Communication
Engineering Department

Analog Communication
Laboratory (0505455)

Prepared by:
Dr. Wael Al-Sawalmeh
2011- 2012
 PREFACE
Welcome to the Analog Communication Laboratory. As course & Lab
instructors, we do hope that you will enjoy working out the experiments. The
idea of these experiments is followed by a hardware circuit experiment to
really grasp and fully understand the main concepts of communication
engineering. We tried our best to relate what you are learning in class with
what you are taking in the lab. The following outlines the general policies for
the lab:
Grading Policy:
 30% for Lab Reports & Participation.
 30% for midterm exam.
 40% for final exam.
Lab Report:
 You must submit the report at the beginning of the next lab session.
 The report must have a cover page.
 It must have the following:
1. Lab objective.
2. Clear theoretical concepts & equations used.
3. Description of the lab results or data collected and plotted.
4. Conclusions.
Reference Readings:
 Kennedy G., Electronic Communication Systems, McGRW-Hill, Third
Edition, 1994,

 D. Roddy and J. Coolen, Electronic Communications, Prentice Hall of

India, 1995.

 Young Paul H., Electronic Communication Techniques, Merrill

Publishing Company, Third Edition 1990.

 Haykin Simon, Communication Systems, John Wiley, 4th Edition,

2001.

2
 LIST OF EXPERIMENTS



Experiment No. Experiment Title

Experiment 1 RF Oscillators
Experiment 2 Second Order Filters
Experiment 3 AM Modulators
Experiment 4 AM Demodulators
Experiment 5 DSB-SC and SSB Modulators
Experiment 6 DSB-SC and SSB Demodulators
Experiment 7 FM Modulators
Experiment 8 FM Demodulators
Experiment 9 Frequency Synthesizer (Part I)
Experiment 10 Frequency Synthesizer (Part II)

3
Experiment 1
RF
Oscillators

4
1.1 Educational Objectives:
 Understanding the operation and characteristics of radio-frequency (RF)
oscillators.

 Designing and implementing oscillators.

1.2 Background Information:

An oscillator is simply a signal generator converting its dc supply voltage into
continuously repeating ac output signal without any input signal. Oscillators play
very important roles in communication systems. An oscillator generates the
carrier or local oscillation signal used in any communication system.
Fig.1-1 shows the basic block diagram of oscillator. It includes an amplifier and
a feedback network constructed by the resonator. When dc power is first
applied to the circuit, noise will appear in the circuit and is amplified by the
amplifier and then fed to the input through the feedback network that is a
resonant circuit with filter function.
The feedback network permits the signal frequency equaling the resonant
frequency to pass and rejects other frequencies. The feedback signal will be
amplified and fed back again. If the feedback signal is in phase with the signal
at input and voltage gain is enough, the oscillator will be operation.
For proper operation, an oscillator must meet Barkhausen criterion.
Barkhausen criterion is the relationship between the amplifier’s gain A and the
oscillator’s feedback factor β(s) and should be equal to 1. That is

(1-1)
Where:
A: amplifier’s gain
β(s): oscillator’s feedback factor.

5
 Fig.1-1 Basic block diagram of an oscillator
Transistor oscillators will be used in our experiments. A transistor amplifier with
nonlinear ic-vbe characteristic serves as an amplitude limiter. An oscillator with
limiter function is also called a self-limiting oscillator when its loop gain equals
1.Therefore such an oscillator circuit is no need to append other amplitude
limiters.

 Colpitts Oscillator:
An ac equivalent circuit of Colpitts oscillator is shown in Fig. 1-2. Since
the LC parallel-resonant circuit is connected between the base and the
collector of transistor, partial feedback voltage is fed to the emitter
through the voltage divider constituted by C1 and C2. In this circuit, the
R represents the sum of the output resistance of transistor, load resistance
and the equivalent resistance of inductor and capacitor. If the frequency is
not very high, the internal capacitances of transistor can be neglected and
the oscillating frequency of Colpitts oscillator can be calculated by the
formula

6
 (1-2)

Fig.1-2AC equivalent of Colpitts oscillator

In Colpitts oscillator circuit, the feedback factor β is C1/C2 and the voltage
gain A is gmR. By Eq. (1-1)

We obtain

Or

7
 For starting oscillation, the loop gain should be at least 1 so that the
oscillation condition can be expressed by

(1-3)
Fig. 1-3 shows a practical Colpitts oscillator circuit. The resistors R1,
R2, R3 and R4 determine the bias of transistor. C1 is the coupling
capacitor and C2 is the bypass capacitor. The frequency of oscillation is
determined by the values of C3, C4 and L1.

Fig.1-3 Colpitts oscillator circuit

 Hartley Oscillator
The ac equivalent circuit of Hartley oscillator, shown in Fig. 1-4, is
similar to the Copitts oscillator. The parallel LC resonant tank is
connected between the collector and base; however, two conductors L1
and L2 are used instead of two capacitors. The R represents the sum of
transistor’s output resistance, load resistance and the equivalent resistance
of inductors and capacitor.

8
If operating frequency is not very high, the spray capacitance of transistor can
be neglected and the oscillating frequency is determined by the component values
of parallel-resonant circuit and can be calculated by the formula

(1-4)

Fig.1-4 A C equivalent of Hartley oscillator

In Hartley oscillator circuit, the feedback factor E is L2 / L1 and the voltage gain A
is gmR . By Eq. (1-1)

we obtain

Or

For starting oscillation, the loop gain should be at least 1 so that the oscillation
9
condition can be expressed by

(1-5)
Fig. 1-5 shows a practical Hartley oscillator circuit. Resistors R1, R2 and R3
provide the bias for transistor. C1 is the couple capacitor and C2 is the bypass
capacitor. C3, L1 and L2 form a resonant circuit for determining the operating
frequency.

Fig.1-5 Hartley oscillator circuit

Excepting the oscillators mentioned above, there are many other types of
oscillators in practical applications: such as RC phase-shift and Wein bridge
oscillators for low frequency requirement, Clapp and Pierce oscillators for high
stability. In general, Pierce oscillator is the most common use in high-frequency
applications due to the use of crystal that has low power consumption and very
high and stable Q.

10
1.3 EQUIPMENT REQUIRED
1. Module KL-92001
2. Module KL-93001
3. Oscilloscope
4. LCR Meter

1.4 Tasks to Study

Experiment 1-1 Colpitts Oscillator:

1. Locate Colpitts Oscillator circuit on Module KL-93001.Insert connect plugs
in J1 and J3 to set C3 = 0.001 µF, C4 = 0.015 µF and L1 = 27 µH.

2. Set the vertical input of oscilloscope to AC position and connect to output

terminals (O/P). Observe and record the waveform and frequency in Table 1-
1. If the circuit operates improperly, recheck the dc bias of transistor.
3. Remove the connect plugs from J1 and J3. Using the LCR meter, measure
the values of C3, C4 and L1 and record the results in Table 1-1, and then
calculate the output frequency.
4. Insert connect plugs in J2 and J4 to change C3 to C5(100 pF), C4 to
C6(1000 pF), and L1 to L2(2.7 µH). Repeat steps 2 and 3.

Experiment 1-2 Hartley Oscillator:

1. Locate Hartley Oscillator circuit on Module KL-93001. Insert connect plugs
in J1 and J3 to set L1 = 68 µH, L2 = 2.7 µH, and C3 = 100 pF.
2. Set the vertical input of oscilloscope to AC position and connect to output
terminals (O/P). Observe and record the waveform and frequency in Table
1-2. If the circuit operates improperly, recheck the dc bias of transistor.
3. Remove the connect plugs from J1 and J3. Using the LCR meter, measure

11
 the values of C3, C4 and L1 and record the results in Table 1-2, and then
calculate the output frequency.
4. Insert connect plugs in J2 and J4 to change C3 to C4(150 pF), L1 to L3(47
µH), and L2 to L4(470 µH). Repeat steps 2 and 3.

Table 1-1

12
Table 1-2

13
1.5 Questions:

1. In experiments 1-1 and 1-2, do the calculated and measured values of

output signal agree? Explain.
2. What is the function of each capacitor or inductor in Colpitts oscillator
circuit shown in Fig. 1-3
3. Determine the values of C3, L1 and L2 of Hartley oscillator shown in
Fig.1-5 for the oscillating frequency of 5MHz.
4. When the operating frequency is in radio-frequency range, why we must
pay attention to the layout of circuit and the length of wire?

14
Experiment 2
Second
Order Filters

15
2.1 Educational Objectives:
 Understanding the characteristics of filters.

 Understanding the advantages of active filters.

 Implementing second-order filters with integrator circuit.

2.2 Background Information:

Filters, which exist t every w here in communication systems, are desi gned to
pass a specified band of frequencies while attenuating all signals outside this
band.
Filters are usually classified according to filtering range, frequency
response in pass band, and circuit component. Classified by fi ltering
range, there are four types of fi lters: low-pass, high-pass, band-pas s, and
band-reject filters.
According to frequency response in pas s band, there are two types:
Butterworth and Chebyshev filters. According to circuit component, they
are active and passive filters.
Passive filters are the circuits ts that c contain only passive components
(resistors, inductors and capacitors) connected in such a way that they
will pass certain frequencies while rejecting others .Active fi lters, which
are the only type covered in this chapter, employ active components
(transistors or operational amplifiers) plus resistors, inductors and
capacitors. Active filters are widely used in modern communication
systems, because they have the following advantages:
1. Because the transfer function with inductive characteristic can be
achieved by particular circuit design, resistors can be used instead of
inductors.
2. The high input impedance and low output impedance of the
operational amplifier means that the filter circuit is excellent in isolation
characteristic and suitable for cascade.
3. Because active components provide amplification, therefore active
16
 filters have gain.
In the following sections, we will f oc us on the characteristics of the
second-order low-pass and high-pass active filters.
 Second-Order Low-Pass Filter:
A low-pass filter is an electronic circuit that has a constant output
voltage from dc up to a cutoff frequency. As the frequency increases
above the cutoff frequency, the output voltage is attenuated. The cutoff
frequency, also called the 0.707 frequency, the 3dB frequency, or the
corner frequency, is the frequency where the output voltage is reduced
to 0.707 times its pass \band value.
A typical active low-pass filter circuit, shown in Fig. 2-1, is commonly
called inverting integrator or Miller integrator. Its transfer function can be
expressed b

(2-1)
Where

Fig. 2-1 Miller Integrator

17
 F i g.2-2 Block diagram of a second-order low -pass filter
FromE q . (2-1), we can find that t he Miller integrator circuit is a firs t-
order l o w -pass filter t therefore, a second-order low-pass f filter can be
easily constructed b y cascading two Miller integrators with an
inverting amplifier.
The block diagram of second-order low-pass filter, shown in Fig. 2-2 is
consisted of two Miller integrators, a unity-gain inverting amplifier and adder.
Therefore, the transfer function is

(2-2)
This is a general form of second-order low-pass filter. Following this block
diagram, a practical second-order low-pass filter is indicated in Fig. 2-3. In this
circuit, the operational amplifier U1: A performs the functional combination of
the adder and the first Miller integrator in Fig. 2-2. If

The transfer function will be

18
 (2-3)
Comparing Eqs. (2-2) to (2-3), we yield

( 2-4 )

(2-5)

( 2-6)
In the circuit of Fig. 2-3, the components R, R2, R3, C1 and U1:A form the Miller
integrator with the function of weighted adder. The adder is used to add the
input signal to the feedback signal from the U1:C output. The combination of R4,
C2 and U1:B is the second miller integrator and the combination of R5, R6 and
U1:C is a unity-gain inverting amplifier. Since this circuit design satisfies the
Butterworth criteria, the response curve in its pass band is flat and no ripple.

19
 Fig.2-3 Second-order low-pass filter circuit

Fig.2-4 Block diagram of a second-order high-pass filter

 Second-Order High-Pass Filter
The frequency response of a second-order high-pass filter is opposite to that of a
second-order low-pass filter. A high-pass filter attenuates the output voltage for
all frequencies below the cutoff frequency. Above the cutoff frequency, the
magnitude of the output voltage is constant. The block diagram of Fig. 2-4 is a
second-order high-pass filter constructed by two Miller integrators, an inverting
amplifier and two adders. Its transfer function can be given by

20
 (2-7)
This is a general form of second-order high-pass filters. Following this block
diagram, a practical second-order high-pass filter is indicated in Fig. 2-5.

Fig.2-5 Second-order high-pass filter circuit

Comparing these two figures, the U1:A performs the functional combination of
the first adder and Miller integrator. The U1:B performs the functional
combination of the second adder and the unity-gain inverting amplifier. If

the transfer function will be

(2-8)
21
And if R1R4=R2R3,then

(2-9)
Comparing Eqs. (2-7) to (2-9), we yield

(2-10)

(2-11)

(2-12)

In the circuit of Fig. 2-5, the components of R1, R3, R7, C1 and U1: A
are connected as the first Miller integrator with the function of weighted adder.
The adder is used to add the input signal to the U1:C output signal. The second
adder, constructed by R2, R4, R5 and U1:B, is used to add the input signal to
the U1:A output signal. The components R6, C2 and U1: C forms the second
Miller integrator circuit. Since this circuit design satisfies the Butterworth
22
criteria, the response curve in its pass band is flat and no ripple.
All of filter circuits discussed above are second-order filters. If desired,
higher order filters can be constructed by connecting these filters in cascade
and modifying component values to meet Butterworth or Chebyshev criteria. The
operational amplifier, used in our experiment circuits, is the LM348 that
includes four OP AMPs and has the unity-gain bandwidth of 1 MHz. To
improve the response in the band of high frequencies, the OP AMP LM318 can
be used instead of LM348 in second-order high-pass filter circuit. The
LM318 has the unity-gain bandwidth of 15MHz.
2.3 EQUIPMENT REQUIRED
1. Module KL-92001
2. Module KL-93001
3. Oscilloscope
2.4 Tasks to Study
Experiment 2-1 Second-Order Low-Pass Filter
1. Locate the Second Order LPF circuit on Module KL-93001. Insert
connect plugs in J1 and J2 to set C 1 = C2 = 0.001µF.
2. Connect a 100mVp-p, 10Hz sine wave to the input (I/P). Using the
oscilloscope, observe the output signal and record the outp ut
amplitude in Table 2-1.
3. Observe and record the output amplitudes in Table 2-1 for input
frequencies of 100Hz, 1KHz, 2KHz, 5KHz, 8KHz, 10KHz,
20KHz,50KHz and 100KHz.
4. Calculate each voltage gain for each input frequency and record the results
in Table 2-1.
5. Using the results of Table 2-1, sketch Bode Pl ot of voltage gain in
Fig. 2-6.
6. Remove the connect plugs from J1 and J 2 and then insert them in J3
and J4 to set C 3 =C 4 =0.01µF.

23
 7. Observe and record the output amplitude in Table 2-2 for input
frequencies of 10Hz, 100Hz, 200Hz, 500Hz, 800Hz, 1 KHz, 2 KHz,
5 KHz, 10 KHz and 100 KHz.
8. Calculate each voltage gain for each input frequency and record the results
in Table 2-2.
9. Using the results of Table 2-2, sketch Bode pl ot of voltage gain in
Fig. 2-7.
Experiment 2-2 Second-Order High-Pass Filter
1. Locate Second Order HPF circuit on Module KL-93001. Insert
connect plugs in J1 and J2 to set C 1 = C2 = 0.0047µF.
2. Connect a 100mVp-p, 10Hz, sine wave to input (I/P). U sing the
oscilloscope, observe the output signal and record the output
amplitude in Table 2-3.
3. Observe and record the output amplitude in Table 2-3 for input
frequencies of 100Hz, 1 KHz, 2 KHz, 5 KHz, 8 KHz, 10 KHz, 20
KHz, 50 KHz and 100 KHz.
4. Calculate each voltage gain for each input frequency and record the results
in Table 2-3.
5. Using the results of Table 2-3, sketch Bode pl ot of voltage gain in
Fig. 2-8.
6. Remove the connect plugs from J1 and J 2 and then insert them in J3
and J4 to set C 3 =C 4 =0.015µF.
7. Observe and record the output amplitude in Table 2-4 for input
frequencies of 10Hz, 100Hz, 200Hz, 500Hz, 800Hz, 1 KHz, 2 KHz,
5 KHz, 10 KHz and 100 KHz.
8. Calculate each voltage gain for each input frequency and record the results
in Table 2-4.
9. Using the results of Table 2-4, sketch Bode plot of voltage gain in
Fig. 2-9.

24
Table 2-1
(C1 = C2 = 0.001µF)

Fig.2-6

25
Table 2-2
(C1 = C2 = 0.01µF)

Fig.2-7

26
Table 2-3
(C1 = C2 = 0.0047µF)

Fig.2-8

27
Table 2-4
(C1 = C2 = 0.015µF)

Fig.2-9

28
2.5QUESTIONS:
1. Derive Eq. (2-2) from the circuit of Fig. 2-2.
2. In Fig.2-5, if R1 R 4 =R 2 R3, C 1 =C 2 =C and R 5 =R 6 =R7, derive the
transfer functionof Eq. (2-9).
3. What are the advantages of active filters with OP Amps?
4. Inspecting Eqs. (2-5) and (2-11), which of the components can you
change easily to vary the bandwidth of filter?
5. If we want to change the bandwidth of the fi lter of Fig. 2-3 to 5
KHz, what capacitance values of C 1 and C2 should be?

29
Experiment 3
AM
Modulators

30
3.1 Educational Objectives:
 Understanding the principle of amplitude modulation (AM).

 Understanding the waveform and frequency spectrum of AM signal and

calculating the percent of modulation.

 Designing an amplitude modulator using MC1496.

 Measuring and adjusting an amplitude modulator circuit

3.2 Background Information:

Modulation is the process of impressing a low-frequency intelligence signal onto a
high-frequency carrier signal. Amplitude Modulation (AM) is a process that a
high-frequency carrier signal is modulated by a low-frequency modulating
signal (usually an audio). In amplitude modulation the carrier amplitude varies
with the modulating amplitude, as shown in Fig. 3-1.
If the audio signal is Amcos(2πfmt) and the carrier signal is Accos(2πfct), the
amplitude-modulated signal can be expressed by

( 3-1 )
Where:
ADC = dc level
Am = audio amplitude
Ac = carrier amplitude
fm = audio frequency
fc = carrier frequency
m = modulation Index or depth of modulation = Am /ADC

31
 Fig.3-1 Amplitude modulation waveforms
Rewriting Eq.(3-1), we obtain

( 3-2 )
The first term on the right side of Eq.(3-2) represents double sideband signal
and the second term is the carrier signal. According to Eq. (3-2), we can plot the
spectrum of AM modulated signal as shown in Fig. 3-2. In an AM transmission
the carrier frequency and amplitude always remain constant, while the side
bands are constantly varying in frequency and amplitude. Thus, the carrier
contains no message or information since it never changes. This means that the
carrier power is a pure dissipation when transmitting an AM signal. Thus, the
transmitting efficiency of amplitude modulation is lower than that of
double-sideband suppressed carrier (DSB-SC) modulation, but the amplitude
demodulator circuit is simpler.

32
 Fig.3-2 Spectrum of AM signal
The m in Eq.(3-1), called modulation index or depth of modulation, is an
important parameter. When m is a percentage, it is usually called percentage
modulation. It is defined as

(3-3)
It is difficult to measure the ADC in a practical circuit so that the modulation
index is generally calculated by

(3-4)

Where Emax=Ac+Am and Emin=Ac-Am, as indicated in Fig. 3-1.

As mentioned above, audio signal is contained in the side bands so that the
greater the sideband signals the b e t t e r the transmitting e f f i c i e n c y. From
Eq. (3-2), we can also find that the greater the modulation index, the greater the
sideband signals and the better the transmitting efficiency. In practice, the
33
modulation index is usually less or equal to 1; if m > 1, it is called over
modulation.
A comparison between various balanced modulator outputs under various input
frequency conditions

In the following experiments we will implement an AM modulator using

a monolithic balanced modulator MC1496. According to different input
signal frequencies, the MC1496 may be used as a frequency multiplier, an
AM modulator, or a double sideband suppressed carrier (DSB-SC)
modulator. Table 3-1 shows the summary of different input, output signals and
circuit characteristics.
Fig. 3-3 shows the internal configuration of MC1496. The differential amplifier
Q5 and Q6 is used to drive the differential amplifiers Q1Q2 and Q3Q4. The
constant-current source generator Q7 and Q8 provides the differential amplifier
Q5 and Q6 with a constant current. Overall gain of MC1496 can be controlled by
externally connecting a resistor between pins 2 and 3. For AM modulation, the
modulating signal should be applied to pins 1 and 4, and the carrier to pins 8
and 10. The bias current to pin 5 is commonly provided by connecting a series
resistor from this pin to the power supply.

34
 Fig.3-3 MC1496 internal circuit
Fig. 3-4 shows an AM modulator circuit, whose carrier and audio signals are
single-ended inputs, carrier to pin 10 and audio to pin 1. The gain of entire
circuit is determined by the R8 value. The R9 determines the amount of bias
current. Adjusting the amount of VR1 or the audio amplitude can change the
percentage modulation.

Fig.3-4Amplitude modulator using MC1496

35
3.3 EQUIPMENT REQUIRED
1. Module KL-92001
2. Module KL-93002
3. Oscilloscope
4. Spectrum Analyzer
5. RF Generator
3.4 Tasks to Study
Experiment 3-1 Amplitude Modulator:
1. Locate AM modulator circuit on Module KL-93002. Insert connect
plugs in J1 and J3 to set R8 =1k: and R9 =6.8k:.
2. Connect a 250mVp-p, 1 kHz sine wave to the audio input (I/P2), and a
250 mVp-p, 100 kHz sine wave to the carrier input (I/P1).
3. Connect the vertical input of the oscilloscope to the AM output (O/P).
Observe the output waveform and adjust the VR1 for the modulation
index of 50%. Record the result in Table 3-2.
4. Using the spectrum analyzer, observe and record the output signal
spectrum in Table 3-2.
5. Using the results above and Eq. (3-4), calculate and record the
percentage modulation of output signal in Table 3-2.
6. Using the oscilloscope, observe the output signals for the audio
amplitudes of 200 mVp-p and 150 mVp-p and record the results in
Table 3-2.
7. Repeat steps 4 and 5.
8. Connect a 150mVp-p, 1 kHz sine wave to the input (I/P2), and a 100
mVp-p, 100kHz sine wave to the carrier input (I/P1).
9. Using the oscilloscope, observe the AM signal at output terminal
(O/P) and record the result in Table 3-3.
10. Using the spectrum analyzer, observe and record output spectrum in
Table 3-3.

36
11. Using the results above and Eq. (3-4), calculate the percentage
modulation of output signal and record the results in Table 3-3.
12. Repeat steps 9 to 11 for carrier amplitudes of 200mVp-p and 300mVp-p.
13. Connect a 150mVp-p, 3 kHz sine wave to the audio input (I/P2), and a
250mVp-p, 100 kHz sine wave to the carrier input (I/P1).
14. Using the oscilloscope, observe the modulated signal at output
terminal (O/P) and record the result in Table 3-4.
15. Using the spectrum analyzer, observe and record the output signal
spectrum in Table 3-4.
16. Using the results above and Eq. (3-4), calculate and record the
percentage modulation of output signal in Table 3-4.
17. Repeat steps 14 to 16 for the audio frequencies of 2kHz and 1kHz.
18. Connect a 150mVp-p, 2 kHz sine wave to the audio input (I/P2), and a
250mVp-p, 500 kHz sine wave to the carrier input (I/P1).
19. Using the oscilloscope, observe the modulated signal at output terminal
(O/P) and record the result in Table 3-5.
20. Using the spectrum analyzer, observe and record the output spectrum
in Table 3-5.
21. Using the results above and Eq. (3-4), calculate and record the percentage
modulation of output signal in Table 3-5.
22. Repeat steps 19 to 21 for the carrier frequencies of 1MHz and 2MHz.

37
Table 3-2
(Vc=250mVp-p, fc=100 kHz, fm=1 kHz

38
Table 3-3
(Vm=150mVp-p, fc=100 kHz, fm=1 kHz)

39
Table 3-4
(Vc=250mVp-p, Vm=150mVp-p, fc=100 kHz)

40
Table 3-5
(Vc=250mVp-p, Vm=150mVp-p, fm=2 kHz)

41
3.5 QUESTIONS:
1. In Fig. 3-4, if we change the value of R8 from 1 kΩ to 2 kΩ, what is the
variation of the AM output signal?
2. In Fig. 3-4, if we change the value of R9 from 6.8 k: to 10 k:, what is the
variation in the dc bias current of the MC1496?
3. Determine the ratio of Emax to Emin if m=50%.
4. What is the function of the VR

42
Experiment 4
AM
Demodulators

43
4.1 Educational Objectives:
 Understanding the principle of amplitude demodulation.
 Implementing an amplitude demodulator with diode.
 Implementing an amplitude demodulator with a product detector.
4.2 Background Information:
A demodulation process is just the opposition of a modulation process. As
noticed in Chapter 3, an AM signal is a modulated signal that is high-frequency
carrier amplitude varied with low-frequency audio amplitude for transmission. To
recover the audio signal in receiver, it is necessary to extract the audio signal from
an AM signal. The process of extracting a modulating signal from a modulated
signal is called demodulation or detection. It is shown in Fig. 4-1.
In general, detectors can be categorized into two types: synchronous and
asynchronous detectors. We will discuss these two types of AM detectors in the
rest of this chapter.

Fig.4-1 illustration of an amplitude demodulation

 Diode Detector
Since an AM modulated signal is the signal that the carrier amplitude varies with
the modulating amplitude, a demodulator is used to extract the original
modulating signal from the AM signal.

Fig.4-2Block diagram of a rectified demodulator

44
The block diagram of diode detector, shown in Fig. 4-2, is a typical
asynchronous detector. The AM modulated signal including both positive-half
and negative-half envelope waves is applied to the input of the rectifier. The
rectified output signal is the positive half envelope plus a dc level and is fed into
a low-pass filter whose output is the original modulating signal with dc level. Then
the modulating signal will be recovered by removing the dc voltage.
Fig. 4-3 shows a practical diode detector circuit. The components R1, R2, R3,
R4, U1 and U2 constitute two inverting amplifiers connected in cascading to
offer a proper gain for the AM signal. The amplified AM signal is rectified by
D1 diode and then fed into the input of the low-pass filter constructed by C2,
C3 and R5. The output signal of low-pass filter is the positive-half envelope
with a dc level. The capacitor C4 is used to pass the ac components while
blocking the dc component.

Fig.4-3 Diode detector circuit

 Product Detector
Demodulation for AM signal can be also accomplished with the balanced
modulator discussed before. Such demodulator is called synchronous detector
or product detector. Fig. 4-4 provides the internal circuit of MC1496 balanced

45
modulator. See the discussion in Chapter 3 for details. If xAM(t) represents the
AM signal and xc(t) is the carrier, and are expressed by

(4-1)

(4-2)
If these two signals are connected to the inputs of balance demodulator, then
the output of balance demodulator will be

(4-3)
Where k is the gain of balanced modulator. The first term on the right side of
Eq.(4-3) represents dc level, the second term is the modulating signal, and the
third term is the second-order harmonic signal. To recover the modulating signal,
the intelligence must be extracted from the AM signal xout(t).

46
 Fig. 4-4 MC 1496 internal circuit
Fig. 4-5 shows the product detector circuit. The VR1 controls the input level of
the carrier signal. The output signal from the MC1496 pin 12 is expressed by Eq.
(4-3). The low-pass filter constructed by C7, C9 and R9 is used to remove the
third term, which is the second-order harmonic signal in the AM modulated signal.
The first term of Eq. (4-3) is the dc level that can be blocked by the capacitor
C10. The amplitude demodulated output signal can be given by

(4-4)
Eq. (4-4) represents the audio signal. In other words, the product detector has
extracted the audio signal from the AM signal.
From the discussion above, we can conclude that the diode detector is an
asynchronous detector whose circuit is simple but quality is bad. The product
detector is a synchronous detector whose quality is excellent but the circuit is
47
more complicated and the carrier signal must exactly synchronize with the AM
signal.

Fig. 4-5Product detector circuit

4.3 EQUIPMENT REQUIRED
1. Module KL-92001
2. Module KL-93002
3. Oscilloscope
4. RF Generator
4.4 Tasks to Study
Experiment 4-1 Diode Detector
1. The AM signal source in this experiment is from the AM modulator
output accomplished in Chapter 3 (the circuit of Fig. 3-4).
2. Set the input signals of AM modulator for the carrier of 250mVp-p,
200 kHz sine wave, and the audio signal of 150mVp-p, 3 kHz sine wave.
3. Adjust the VR1 of AM modulator to get maximum amplitude of AM
signal output.

48
 4. Connect the AM signal output to the input (I/P) of diode detector.
5. Switch the vertical input of scope to DC coupling and observe the
output waveforms of the amplifier and the diode detector, and record
the results in Table 4-1.
6. Change the audio frequencies for 2 kHz and 1 kHz, and repeat step 5.
7. Adjust the carrier to a 250mVp-p, 300 kHz sine wave, and the audio to a
250mVp-p, 3 kHz sine wave.
8. Adjust the VR1 of AM modulator to get maximum amplitude of AM
signal output.
9. Set the vertical input of scope to DC coupling and observe the output
waveforms of the amplifier and the diode detector, and record the
results in Table 4-2.
10. Change the audio frequencies for 2 kHz and 1 kHz, and repeat step 9.
Experiment 4-2 P r o d u c t Detector
1. The AM signal source in this experiment is from the AM modulator
output accomplished in Chapter 3 (the circuit of Fig. 3-4).
2. Set the input signals of AM modulator for the carrier of 250mVp-p, 500
kHz sine wave, and the audio signal of 150mVp-p, 3 kHz sine wave.
3. Adjust the VR1 of AM modulator to ge the percent of modulation of
50%.
4. Connect the output of AM modulator to the input of AM signal (I/P2)
of the product detector located on the bottom of Module KL-93002,
and connect the same carrier to the carrier input (I/P1).
5. Switch the vertical input of scope to DC coupling and observe the
output waveform of the product detector, and record the result in Table
4-3
6. Change the audio frequencies for 2 kHz and 1 kHz, and repeat step 5.
7. Adjust the carrier to a 250 mVp-p, 1 MHz sine wave, and the audio to a
150 mVp-p, 2 kHz sine wave.
8. Adjust the VR1 of AM modulator to get the percent of modulation of
49
 50%.
9. Switch the vertical input of scope to DC coupling and observe the
output waveform of the product detector, and record the result in Table
4-4.
10. Change the carrier frequencies for 1.5MHz and 2MHz, and repeat step 9.

50
Table 4-1
(Vc=250mVp-p, Vm=150mVp-p, fc=200kHz)

51
Table 4-2
(Vc=250mVp-p, Vm=250mVp-p, fc=300kHz)

52
Table 4-3
(Vc=250mVp-p, Vm=150mVp-p, fc=500kHz, m=50%)

53
Table 4-4
(Vc=250mVp-p, Vm=150mVp-p, fm=2 kHz, m=50%)

54
4.5 QUESTIONS:
1. In the diode detector circuit of Fig. 4-3, if the operational amplifier
PA741 is neglected, what is the output signal?
2. In the product detector circuit of Fig. 4-5, if the carrier signal and the
AM signal are asynchronous, what is the output signal?
3. What is the function of R9, C 7 or C9 in Fig. 4-5?
4. What is the function of VR1 or VR2 in Fig. 4-5?
5. What is the function of R5 or R6 in Fig. 4-5?

55
Experiment 5
DSB-SC
and SSB
Modulators

56
5.1 Educational Objectives:
 Learning how to generate double-sideband suppressed carrier and
single-sideband modulated signals.
 Learning how to test and adjust double-sideband suppressed carrier and
single-sideband balanced modulators.
5.2 Background Information:
The principle of circuit operations of this chapter is similar to that of Chapter 3
mentioned before. The circuit of Fig.5-1 is a double-sideband suppressed-carrier
(DSB-SC) modulator. The balance circuit consisted by the VR1 is used to
control the LM1496 operating in balance state. By adjusting the VR1 properly,
this will ensure that the modulator operates in balance state. In short, the major
difference between DSB-SC and AM modulated signals is the DSB-SC
modulated signal containing no carrier. To achieve the requirement of
suppressing carrier, we should first connect the audio input to ground, and then
observe the LM1496 output to ensure no carrier presented by carefully
adjusting the VR1. If this is made and then reconnects the audio signal, the
DSB-SC modulated signal containing the upper- and lower-sideband signals will
be presented at LM1496 output.

Fig.5-1 DSB-SC modulator circuit

57
Carrier voltage level is a very important factor, which affects the carrier
suppressing. If the carrier level is too low, it will be not enough to start the carrier
amplifier completely; reversely, a too high level will occur carrier feed through.
In general, the optimum input range is about 0.2 Vpp to 0.8 Vpp when the
carrier frequency is 500 kHz.
To identify AM, DSB-SC or SSB modulated signals; we assume a typical audio
spectrum shown in Fig. 5-2a. Where fmh is the highest frequency and fml is the
lowest frequency in audio signal.
If using this audio signal to modulate the amplitude of sine carrier, we will
obtain an AM spectrum as shown in Fig. 5-2b. The AM spectrum includes three
components below:
1. Carrier frequency fc
2. Upper sideband with the highest frequency ( fc+fmh )
3. Lower sideband with the highest frequency ( fc-fml )
Since the amplitude-modulated signal contains these two sideband signals, it is
sometimes called as double-sideband AM. In double sideband suppressed
carrier modulation, the carrier signal is removed or suppressed by the balanced
modulator, and the modulated signal containing no carrier as shown in Fig. 5-2c.
Notice that these two sidebands contain the same audio signal when the
modulated signal is transmitted, while receivers may recover the audio signal
from each sideband signals by demodulation technique. This means that only
one of two sidebands is need in transmitting process. Thus an amplitude
modulation called single-sideband (SSB) is shown in Fig. 5-2d.
Suppose the audio input signal (pins 1 and 4) of LM1496 is Amcos2Sfmt and the
carrier input signal (pins 8 and 10) is Accos2Sfct, then its output signal at pin 6
should be

(5-1)

58
Where k is the modulator gain, and ( fc+fm ) and ( fc-fm ) are the upper and
lower sideband modulated signals, respectively.
In Fig. 5-1, the source follower consisted of Q1 and Q2 acts as a buffer due to
the characteristics of high input impedance and low output impedance. The
coupling capacitors C1, C2, C4, C5 and C8 are used for blocking dc signal
while coupling ac signal. The R11 is for adjusting the gain of the balanced
modulator and the R12 is for bias current adjustment. Resistors R1, R2, R13 and
R14 provide dc bias for operating requirement. Resistors R5 and R10 are for
AGC control. Capacitors C3, C6 and C7 are used to bypass undesired noise. The
VR1 are for balancing, optimum operating point, minimizing distortion and
determining types of output signal (i.e., AM or DSB-SC).

Fig. 5-2aSpectrum of audio signal

Fig. 5-2bSpectrum of AM signal

59
 Fig. 5-2c Spectrum of DSB-SC signal

Fig. 5-2d Spectrum of SSB signal

To generate a SSB modulated signal from DSB-SC, a low-pass or high-pass
filter is commonly used to filter one sideband signal. Unfortunately, it is
difficult to take out single sideband signal from DSB-SC signal with 1st- or
2nd-order low- or high-pass filters because these two sideband spectrums are so
close to each other. A good solution of this problem is the use of ceramic or
crystal filters. For example, we use the FFD455 ceramic band-pass filter to take
out the upper sideband signal in experiment circuit, as shown in Fig. 5-3.

60
 Fig. 5-3 SSB modulator circuit.
5.3 EQUIPMENT REQUIRED
1. Module KL-92001
2. Module KL-93003
3. Oscilloscope
4. Spectrum Analyzer
5. RF Generator
5.4 Tasks to Study
Experiment 5-1 DSB-SC Modulator
1. Locate DSB-SC Modulator circuit on Module KL-93003. Insert connect
plugs in J1 and J3 to set R11 = 270: and R12 = 6.8k:Ζ
2. Check each of source follower circuits for a proper bias. Set the vertical
input of oscilloscope to AC and observe the source output and the input
signals. Ensure that these two signals are the same but the output
amplitude is slightly smaller than the input amplitude. If done, insert
connect plugs in J5 and J6.
3. Turn the VR1 to its mid-position.
4. Connect the audio input (I/P2) to ground and connect a 500mVp-p, 500

61
 kHz sine wave to the carrier input (I/P1). Carefully adjust the VR1 to get
the output signal of zero or minimum.
5. Connect a 300mVp-p, 1 kHz sinewave to the audio input and change the
carrier amplitude to 300mVp-p.
6. Using the oscilloscope, measure and record the waveforms listed in
Table 5-1.
7. Using the spectrum analyzer, observe and record the output signal
spectrum in Table 5-1.
8. Change the audio amplitude to 600mVp-p. Measure and record the
waveforms listed in Table 5-2 using the oscilloscope.
9. Using the spectrum analyzer, observe and record the output signal
spectrum in Table 5-2.
10. Change the carrier amplitude to 600mVp-p. Measure and record the
waveforms listed in Table 5-3 using the oscilloscope.
11. Using the spectrum analyzer, observe and record the output signal
spectrum in Table 5-3.
12. Change the audio amplitude to 300 mVp-p and frequency to 2 kHz, and the
carrier amplitude to 300mVp-p and frequency to 1MHz. Using the
oscilloscope, measure and record the waveforms listed in Table 5-4.
13. Using the spectrum analyzer, observe and record the output signal
spectrum in Table 5-4.
14. Remove the connect plug from J1 and insert it in J2 to change R11 (=270 Ω)
to R15 (=330 Ω). Change the audio amplitude to
600mVp-p and frequency to 1kHz, and the carrier amplitude to
600mVp-p and frequency to 500kHz. Hold VR1 position. Using the
oscilloscope, measure and record the waveforms listed in Table 5-5.
15. Using the spectrum analyzer, observe and record the output signal
spectrum in Table 5-5.
16. Remove the connect plug from J3 and then insert it in J4 to change R12
(6.8 kΩ) to R16 (10 kΩ). Using the oscilloscope, measure and record the
62
 waveforms listed in Table 5-6.
17. Using the spectrum analyzer, observe and record the output signal
spectrum in Table 5-6.
Experiment 5-2 S S B Modulator
1. Locate SSB Modulator circuit on Module KL-93003. Insert the connect
plug in J2 to bypass ceramic filters.
2. Check each of source follower circuits for a proper bias. Set the vertical
input of oscilloscope to AC and observe the source output signal and the
input signal. Ensure that these two signals are the same but the output amplitude
is slightly smaller than the input amplitude. If done, insert connect plugs in
J3 and J4.
3. Turn the VR1 to its mid-position.
4. Connect the audio input (I/P2) to ground and connect a 500mVp-p, 457
kHz sine wave to the carrier input (I/P1). Carefully adjust VR1 to get a
minimum output or zero. Then remove the connect plug from J2 and
insert it in J1.
5. Connect a 300mVp-p, 2 kHz sine wave to the audio input and change
the carrier amplitude to 300mVp-p.
6. Using the oscilloscope, measure and record the waveforms listed in Table
5-7.
7. Using the spectrum analyzer, observe and record the output signal
spectrum in Table 5-7.
8. Change the audio amplitude to 600mVp-p. Measure and record the
waveforms listed in Table 5-8 using the oscilloscope.
9. Using the spectrum analyzer, observe and record the output signal
spectrum in Table 5-8.
10. Change the carrier amplitude to 600mVp-p. Measure and record the
waveforms listed in Table 5-9 using the oscilloscope.
11. Using the spectrum analyzer, observe and record the output signal

63
 spectrum in Table 5-9.
12. Change the audio amplitude to 300mVp-p and frequency to 1 kHz, and the
carrier amplitude to 300mVp-p. Using the oscilloscope, measure and
record the waveforms listed in Table 5-10.
13. Using the spectrum analyzer, observe and record the output signal
spectrum in Table 5-10.
Table 5-1
(R11=270Ω, R12=6.8kΩ, Vc=300mVp-p, Vm=300mVp-p, fc=500kHz, fm=1kHz)

64
Table 5-2
(R11=270Ω, R12=6.8kΩ, Vc=300mVp-p, Vm=600mVp-p, fc=500kHz, fm=1kHz)

65
Table 5-3
(R11=270Ω, R12=6.8kΩ, Vc=600mVp-p, Vm=600mVp-p, fc=500kHz, fm=1kHz)

66
Table 5-4
(R11=270Ω, R12=6.8kΩ, Vc=300mVp-p, Vm=300mVp-p, fc=1MHz, fm=2kHz)

67
Table 5-5
(R11=330Ω, R12=6.8kΩ, Vc=600mVp-p, Vm=600mVp-p, fc=500kHz, fm=1kHz)

68
Table 5-6
(R11=330Ω, R12=10kΩ, Vc=600mVp-p, Vm=600mVp-p, fc=500kHz, fm=1kHz)

69
Table 5-7
(R11=270 Ω, R12=6.8k Ω, Vc=300mV, Vm=300mV, fc=457kHz, fm=2kHz)

70
Table 5-8
(R11=270 Ω, R12=6.8k Ω, Vc=300mVp-p, Vm=600mVp-p, fc=457kHz, fm=2kHz)

71
Table 5-9
(R11=270 Ω, R12=6.8k Ω, Vc=600mVp-p, Vm=600mVp-p, fc=457kHz, fm=2kHz)

72
Table 5-10
(R11=270 Ω, R12=6.8k Ω, Vc=300mVp-p, Vm=300mVp-p, fc=457kHz, fm=1kHz)

73
5.5 Questions:
1. Comment on the difference between AM, DSB-SC and SSB signals
from the angle of bandwidth.
2. Comment on the difference between AM, DSB-SC and SSB signals
from the angle of transmission efficiency.
3. What is the function of R11 or R12?
4. What is the function of VR1? If turning the VR1 arbitrarily, does the
output DSB-SC signal become the AM signal?
5. Compare the results observed on the scope and comment on the
difference between AM and DSB-SC waveforms.

74
Experiment 6
DSB-SC
and SSB
Demodulators

75
6.1 Educational Objectives:
 Demodulating DSB-SC and SSB signals using product detector.
 Learning how to use product detector in communication receivers

6.2 Background Information:

Fig. 6-1 shows the internal configuration of MC1496. The differential amplifier,
Q5 and Q6, is used to drive the differential amplifiers Q1Q2 and Q3Q4. The
constant-current source generator, Q7 and Q8, provides the differential amplifier
Q5 and Q6 with a constant current. Overall gain of MC1496 can be controlled by
externally connecting a resistor between pins 2 and 3. For DSB-SC or SSB
demodulation, the DSB-SC or SSB signal should be applied to pins 1 and 4,
and the carrier to pins 8 and 10. The bias current to pin 5 is commonly provided
by connecting a series resistor from this pin to the power supply. Since the
detector has two outputs (pins 6 and 12), one of the outputs can be used as the
detector output and the other used for the use of automatic gain control (AGC).

Fig.6-1 LM1496 internal circuit

76
Fig. 6-2 shows the product detector circuit with the MC1496 for DSB-SC or SSB
demodulation. With some proper modifications, this circuit can also be used as
an AM, FM, or PWM demodulator. The local carrier is applied to the inputs (pins
10 and 8) and its frequency should be exactly equal to the frequency of
DSB-SC or SSB carrier. Since the amplitude of the modulated signal is typically
within the range of 500 mVpp to 800 mVpp, it is enough to ensure that the
detector operates in linear region. The resistor R5 connected between pins 2
and 3 determines the voltage gain of MC1496

Fig.6-2 Product detector for DSB-SC and SSB signals.

Since the signal generators in laboratory can not generate DSB-SC and SSC
signals for our experiment requirements, we will use the DSB-SC modulator
output of Fig. 5-1 and the SSB modulator output of Fig. 5-3 for our experiments
6-1 and 6-2, respectively. As mentioned in chapter 5, the SSB modulated signal
could be obtained from the DSB-SC modulated signal by removing the upper
band or lower band with a filter. Note that the load effect may be caused if the
filter added directly. To eliminate this effect, the source follower used in the
circuit of Fig. 5-1 is recommended to add between the filter output and the
product detector input. Considering the SSB modulated signal connected to the
input (pins 1 and 4) of LM1496, the SSB signal can be expressed by

77
And the input signal between pins 8 and 10 is

Therefore the output signal of LM1496 at pin 12 will be

When this output signal passes through the low-pass filter constructed by C7, C9,
and R9, the high-frequency components will be removed and the demodulated
output signal becomes

From the equation above, we find that the LM1496 can demodulate the SSB
modulated signal to recover the audio signal Amcosωmt with a gain (kAc)2/4. To
change the gain of demodulator, we can change the carrier amplitude or the
resistance of R5 (value of k). Consider that a DSB-SC modulated signal is applied
to input terminals (pins 1 and 4) of LM1496 and such signal may be expressed by

78
And the carrier input signal (pins 8 and 10) is

Thus the output signal of LM1496 at pin 12 will be

High frequencies, the first and second terms on the right side of the equation
above, will be removed by the low-pass filter (C7, C9 and R9) when this signal
passes through the filter. Then the demodulated output becomes

6.3 EQUIPMENT REQUIRED

1. Module KL-92001.
2. Module KL-93003.
3. Oscilloscope.
4. RF Generator.

79
6.4 Tasks to Study
Experiment 6-1 DSB-SC Product Detector
1. This experiment uses the modulated DSB-SC output of DSB-SC
Modulator circuit of experiment 5-1 as the DSB-SC input of product detector
circuit. First, complete the DSB-SC modulator circuit.
2. Connect a 500mVp-p, 500kHz sine wave to the carrier input and a 500mVp-
p, 1 kHz sine wave to the audio input of DSB-SC modulator.(Carry and audio
signals should be adjusted alone before connecting to circuits, because if you
adjust them during circuit testing, there’ll be loading errors)
3. Turn the VR1 of DSB-SC modulator to get a DSB-SC modulated signal
output.
4. Locate the DSB-SC and SSB Product Detector circuit on Module KL-93003.
Insert connect plugs in J1 and J3 to set R5=270 Ω and R6=10k Ω
5. Connect the carrier signal used in step 2 to the carrier input of product
detector. Connect the modulated output of DSB-SC modulator to the DSB-
SC input of product detector.
6. Using the oscilloscope, observe the output signal and turn the VR1 of product
detector circuit to get minimum distortion, and record the result in Table 6-1.
7. Change the carrier to a 500mVp-p, 500kHz sine wave and the audio to a
500mVp-p, 3kHz sine wave. Carefully turn the VR1 to get a DSB-SC
modulated output signal.
8. Repeat step 6 and record the result in Table 6-2.
9. Remove the connect plug from J1 and then insert it in J2 to change R5 (270
Ω) to R10 (330 Ω). Repeat step 6 and record the result in Table 6-3.
10. Remove the connect plug from J3 and then insert it in J4 to change R6 (10k
Ω) to R11 (30k Ω). Repeat step 6 and record the result in Table 6-4.

80
Experiment 6-2 SSB Product Detector
1. This experiment uses the modulated SSB output of SSB Modulator circuit of
experiment 5-2 as the SSB input of product detector circuit. First, complete
the SSB modulator circuit.
2. Insert connect plug in J2 to bypass ceramic filters. Connect a 500mVp-p, 457
kHz sine wave to the carrier input (I/P1) and a 500mVp-p, 2 kHz sine wave
to the audio input (I/P2). (Carry and audio signals should be adjusted alone
before connecting to circuits, because if you adjust them during circuit
testing, there’ll be loading errors)
3. Turn the VR1 to get a DSB-SC modulated output (O/P). Remove the connect
plug from J2 and then insert it in J1 to recover the ceramic filters. The output
signal will be the SSB modulated signal.
4. Insert connect plugs in J1 and J3 of product detector circuit to set R5 = 270 Ω
and R6 = 10 k Ω.
5. Connect the carrier signal used in step 2 to the carrier input (I/P1) of product
detector, and connect the SSB modulated output to the SSB input (I/P2).
6. Using the oscilloscope, observe the demodulated output waveform (O/P) and
carefully turn the VR1 to get minimum distortion. Record the result in Table
6-5.
7. Remove the connect plug from J1 and insert it in J2 to bypass the ceramic
filters of SSB modulator. Change the carrier to a 700mVp-p, 457 kHz sine
wave and the audio to a 700mVp-p, 2 kHz sine wave. Turn the VR1 to get a
DSB-SC modulated signal, and then remove the connect plug from J2 and
inset it in J1 to recover the ceramic filters. Then the output signal will be the
SSB modulated signal.
8. Repeat step 6 and record the result in Table 6-6.
9. Remove the connect plug from J1 and then insert it in J2 to change R5 (270
Ω) to R10 (330 Ω). Repeat step 6 and record the result in Table 6-7.
10. Remove the connect plug from J3 and then insert it in J4 to change R6 (10 k
Ω) to R11 (30 k Ω). Repeat step 6 and record the result in Table 6-8.
81
Table 6-1
(R5=270 Ω , R6=10 k Ω , Vc=500 mVp-p, Vm=500 mVp-p, fc=500kHz, fm=1kHz)

82
Table 6-2
(R5=270 Ω , R6=10 k Ω , Vc=500mVp-p, Vm=500mV, fc=500kHz, fm=3kHz)

83
Table 6-3
(R5=330 Ω, R6=10 k Ω, Vc=500mV, Vm=500mV, fc=500kHz, fm=1kHz)

84
Table 6-4
(R5=330Ω, R6=30 k Ω , Vc=500mVp-p, Vm=500mVp-p, fc=500kHz, fm=1kHz)

85
Table 6-5
(R5=270 Ω , R6=10 k Ω , Vc=500mVp-p, Vm=500mVp-p, fc=457kHz, fm=2kHz)

86
Table 6-6
(R5=270 Ω, R6=10 k Ω, Vc=700mVp-p, Vm=700mVp-p, fc=457kHz, fm=2kHz)

87
Table 6-7
(R5=330 Ω , R6=10 k Ω , Vc=500mVp-p, Vm=500 mV, fc=457kHz, fm=2kHz)

88
Table 6-8
(R5=330 Ω , R6=30 k Ω , Vc=500mVp-p, Vm=500mVp-p, fc=457kHz, fm=2kHz)

89
6.5 Questions:
1. How does the value of R5 in Fig. 6-2 affect the output amplitude?
2. How does the value of R6 in Fig. 6-2 affect the output amplitude?
3. What is the function of VR1 or VR2?
4. If the modulating frequency goes up, what components should be modified
for an undistorted demodulated signal?
5. May a peak detector be used in DSB-SC or SSB demodulation?

90
Experiment 7
FM
Modulators

91
7.1 Educational Objectives:
 Studying the operation and characteristics of varactor diode.
 Understanding the operation of voltage controlled oscillator.
 Implementing a frequency modulator with voltage-controlled oscillator.
7.2 Background Information:
 Principle of Frequency Modulation Operation:
Frequency modulation (FM) is a process in which the carrier frequency is varied
by the amplitude of the modulating signal (i.e., intelligence signal). The FM signal
can be expressed by the following equation:

(7-1)
If x(λ)=Amcos(2πfm λ), then

(7-2)
Where
θ (t) = instantaneous modulated frequency
fc = carrier frequency
fm = modulating frequency
β = modulation index = Am(fΔ /fm)
The frequency of FM signal xFM(t) may be expressed as

(7-3)

92
From Eq. (7-3) we can find that the frequency of frequency modulated signal
occurs frequency deviation from the center frequency of the carrier when the
intelligence amplitude is variation.
 Varactor Diode:
The varactor diode, sometimes called tuning diode, is the diode whose capacitance
is proportional to the amount of the reverse bias voltage across p-n junction.
Increasing the reverse bias voltage applied across the diode decreases the
capacitance due to the depletion region width becomes wider.
Conversely, when the reverse bias voltage decreased, the depletion region width
becomes narrower and the capacitance increased. When an ac voltage is applied
across the diode, the capacitance varies with the change of the amplitude.

Fig. 7-1 Relationship between varactor diode and capacitor

A relationship between a varactor diode and a conventional capacitor is shown in
Fig. 7-1. In fact, a reverse-biased varactor diode is similar to a capacitor.
When a p and n semiconductors combined together, a small depletion region is
formed because of the diffusion of minority carriers. The positive and negative
charges occupy n and p sides of junction, respectively. This just likes a capacitor.

93
The amount of internal junction capacitance can be calculated by the capacitance
formula

(7-4)
Where
ε= 11.8 ε0 = dielectric constant
εo = 8.85×10-12
A= cross area of capacitor
d = width of depletion region
From the formula above, we know that the varactor capacitance is inversely
proportional to the width of depletion region (or the distance between plates) if the
area A is constant. Therefore, a small reverse voltage will produce a small
depletion region and a large capacitance. In other words, an increase in reverse
bias will result in a large depletion region and a small capacitance.

Fig.7-2 the equivalent circuit of varactor diode

A varactor diode can be considered as a capacitor and resistor connected in series
as shown in Fig. 7-2. The CJ is the junction capacitance between p and n
junctions. The Rs is the sum of bulk resistance and contact resistance,
approximately several ohms, and it is an important parameter determining the
quality of varactor diode.
Tuning ratio (TR) is defined as the ratio of the capacitance of varactor diode at the
reverse voltage V2 to that at another reverse voltage V1, and can be expressed by

94
 (7-5)
Where
TR = tuning ratio
CV1 = capacitance of varactor diode at V1
CV2 = capacitance of varactor diode at V2
The 1SV55 varactor diode is used in our experiments and its major characteristics
are
C3V = 42 pF (capacitance of varactor diode at 3V)
TR = 2.65 (at 3V →30V)
 Frequency Modulator Based on MC1648 VCO:
In our experiments we will implement the frequency modulator with MC1648
VCO chip shown in Fig. 7-3. Basically, this circuit is an oscillator and the tuning
circuit at input end determines its oscillating frequency. In this circuit, capacitors
C2 and C3 are the bypass capacitors for filtering noise. When operating at a high
frequency (for example 2.4 MHz), the capacitive reactance of these two capacitors
are very small and can be neglected for practical purposes.
Therefore, an ac equivalent circuit of tuning tank, shown in Fig. 7-4, is a parallel
LC resonant circuit. The C can be considered as the capacitance of 1SV55 (Cd)
and the input capacitance of MC1648 (Cin) connected in parallel. The value of Cin
is approximately 6 pF. If we neglect the spray capacitance, the oscillating
frequency can be calculated by the formula

(7-6)

95
 Fig.7-3 MC1648 FM modulator circuit
As mentioned above, the capacitance Cd of varactor diode D1 varies with the
amount of its reverse bias voltage. According to Eq. (7-6), we know that the
change of Cd value will cause the change of oscillating frequency. In the circuit of
Fig. 7-3, a small dc bias will produce a large Cd value and a low frequency output.
On the other hand, an increase in dc bias will result in a small Cd value and a high
frequency output. Therefore, if the dc bias is fixed and an audio signal is applied
to this input, the VCO output signal will be a frequency-modulated signal.

Fig.7-4 AC equivalent circuit of tuning tank

 Frequency Modulator Based on LM566 VCO:
The circuit of Fig. 7-5 is a frequency modulator based on voltage-controlled
oscillator (VCO) IC, LM566. If the SW1 is open, this circuit is a typical VCO

96
whose output frequency is determined by the values of C3 and VR1, and the audio
input voltage. If the values of C3 and VR1 are fixed, the output frequency is
directly proportional to the voltage difference between pins 8 and 5, (V8-V5).
In other words, an increase in audio input voltage (V5) causes a decrease in the
value of (V8-V5) and a decrease in the output frequency. Conversely, decreasing
the audio input voltage (V5) will cause the output frequency to increase. As
discussed above, the values of C3 and VR1 can also determine the output
frequency, which is inversely proportional to the product of VR1 and C3. That is,
the greater the VR1×C3 value the lower the output frequency.

Fig.7-5 LM566 frequency modulator circuit

If the SW1 is closed, the voltage divider constructed by R1 and R2 provides a dc
level to the audio input (pin 5). By adjusting the VR1, we can easily tune the
VCO center frequency fo. When an audio signal is applied to the audio input, the
output frequency will generate frequency deviations around fo in the variations of
audio amplitude. Thus, a frequency-modulated signal is obtained.
7.3 EQUIPMENT REQUIRED
1. Module KL-92001
2. Module KL-93004
3. Oscilloscope
4. Spectrum Analyzer

97
7.4 Tasks to Study:
Experiment 7-1 MC1648 Characteristic Measurements:
1. Locate the MC1648 FM Modulator circuit on Module KL-93004. Insert the
connect plug in J2 to set the inductor to L1 (100 H).
2. Connect a 3Vdc to dc bias input (I/P2) and observe the output waveform using
the oscilloscope. Adjust the VR1 until a sine wave appears at the output and
record the frequency in Table 7-1.
3. Repeat step 2 for other dc voltages listed in Table 7-1.
4. Using the results of Table 7-1, plot frequency vs. voltage curve in Fig. 7-6.
Experiment 7-2 MC1648 Frequency Modulator:
1. Insert connect plugs in J1 and J2 to reverse-bias the varactor 1SV55 at 5 V
and L1=100µH. Under these conditions, the output frequency will be the
center frequency fo.
2. Connect a 2Vp-p, 3 kHz sine wave of to the audio input (I/P1) and observe the
output waveform using the oscilloscope. Adjust the VR1 until a sine wave
appears at the output.
3. Using the spectrum analyzer, observe and record the output spectrum in Table
7-2.
4. Repeat step 3 for audio frequencies of 5 kHz and 8 kHz. Note: Since the
frequency difference between the carrier and modulated signals is too large to
observe an evident variation in time domain on the oscilloscope, therefore we
recommend the use of the frequency analyzer in such a case.
Experiment 7-3 LM566 Characteristic Measurements:
1. Locate the LM566 Modulator circuit on Module KL-93004. Insert the connect
plug in J2 to set the capacitor to C3 (0.1 µF).
2. Connect a 3.6Vdc to the dc voltage input (pin 5) and Adjust the VR1 to obtain
an output frequency of 2 kHz. This frequency is the center frequency fo.

98
3. Change the dc voltages at pin 5 to 2.7V, 3.0V, 3.3V, 3.9 V, 4.2 V and 4.5V
sequentially. Observe the output frequencies corresponding to the dc voltage
inputs and record the results in Table 7-3.
4. Using the results of Table 7-3, plot the frequency vs. voltage curve in Fig. 7-7.
5. Remove the connect plug from J2 and then insert it in J3. This changes the
capacitor from C3 (0.1µF) to C4 (0.01µF).
6. Connect a 3.6Vdc to the dc voltage input (pin 5) and Adjust the VR1 to obtain
an output frequency of 20 kHz. This frequency is the center frequency fo.
7. Change the dc voltages at pin 5 to 2.7V, 3.0V, 3.3V, 3.9 V, 4.2 V and 4.5V
sequentially. Observe the output frequencies corresponding to the dc voltage
inputs and record the results in Table 7-4.
8. Using the results of Table 7-4, plot the frequency vs. voltage curve in Fig. 7 8.
Experiment 7-4 LM566 Frequency Modulator:
1. Locate the LM566 FM Modulator circuit on Module KL-93004. Insert
connect plugs in J1 and J3 to set the capacitor to C4 (0.01µF). Turn the VR1
to get the output frequency of 20 kHz.
2. Connect a 500mVp-p, 1kHz sine wave to the audio input (I/P1). Using the
oscilloscope, observe the output waveform (O/P) and record the result in
Table 7-5.
3. Change the audio frequencies to 3 kHz and 5 kHz sequentially. Observe the
output waveforms corresponding to the audio inputs and record the results in
Table 7-5.
4. Change the audio input to a 1Vp-p, 1 kHz sine wave. Observe the output
waveform and record the result in Table 7-6.
5. Change the audio frequencies to 3 kHz and 5 kHz sequentially. Observe the
output waveforms corresponding to the audio inputs and record the results in
Table 7-6.

99
Table 7-1

Fig.7-6

100
Table 7-2
(Vm = 2V)

101
Table 7-3
(C3 = 0.1µF, fo = 2kHz)

Fig.7-7

102
Table 7-4
(C3=0.01 µF, fo=20 kHz )

Fig.7-8

103
Table 7-5
(Vm=500mVp-p, C3=0.01µF, fo=20kHz)

104
Table 7-6
(Vm=1Vp-p, C3=0.01µF, fo=20kHz)

105
7.5 Questions:
1. If the inductance in the tank circuit of Fig. 7-3 is 80nH and we wish to get a
resonance frequency of 100MHz, what capacitance value of varactor diode
should be?
2. Examining the Frequency vs. Voltage curve of Fig. 7-6, which portion on
the curve is suitable for implementing a frequency modulator?
3. Reviewing the circuit of Fig.7-5, what is the function of R1 and R2 when
the SW1 is closed?

106
Experiment 8
FM
Demodulators

107
8.1 Educational Objectives:
 Studying the principle of phase-locked loop.
 Understanding the characteristics of the PLL LM565.
 Demodulating FM signal using PLL.
 Demodulating FM signal using FM to AM conversion discriminator

8.2 Background Information:

Frequency demodulator, also called frequency discriminator, is a circuit, which
converts instantaneous frequency variations to linear voltage changes. There are
many types of circuit used in communication system such as FM to AM
conversion, balanced, and phase-shift discriminators and phase-locked loop (PLL)
frequency demodulator. In this experiment we will introduce the operations of
PLL frequency demodulator and FM to AM conversion discriminator.

 Phase-Locked Loop (PLL) operation

The PLL is an electronic feedback control system, as illustrated by the block
diagram in Fig. 8-1, of locking the output and input signals in good agreements in
both frequency and phase. In radio communication, if a carrier frequency drifts
due to transmission, the PLL in receiver circuit will track the carrier frequency
automatically.

Fig.8-1 PLL block diagram

The PLL in the following experiments is used in two different ways: (1) as a
demodulator, where it is used to follow phase or frequency modulation and (2) to

108
track a carrier signal which may vary in frequency with time. In general, a PLL
circuit includes the following sections:
1. Phase Detector (PD)
2. Low Pass Filter (LPF)
3. Voltage Controlled Oscillator (VCO)
The phase detector within the PLL locks at its two inputs and develops an output
that is zero if these two input frequencies are identical. If the two input frequencies
are not identical, then the output of detector, when passed through the low-pass
filter removing the ac components, is a dc level applied to the VCO input. This
action closes the feedback loop since the dc level applied to the VCO input
changes the VCO output frequency in an attempt to make it exactly match the
input frequency. If the VCO output frequency equals the input frequency, the PLL
has achieved lock, and the control voltage will be zero for as long as the PLL input
frequency remains constant. The parameters of PLL shown in Fig. 8-1 are as
follows:
Kd = phase detector gain in volts/radian
Ka = amplifier gain in volt/volt
Ko = VCO gain in kHz/volt
KL = KdKaKo =closed loop gain in kHz/volt

Fig.8-2 Phase detection

109
A better understanding of the operation of phase detector may be obtained by
considering that the simple EXCULSIVE-OR (XOR) gate is used as a phase
detector. The XOR gate can be thought of as an inequality detector which
compares the inputs and produces a pulse output when these inputs are unequal.
The width of the output pulse is proportional to the phase error of the input
signals. As shown in Fig. 8-2, the width of the output pulse of (b) is larger than
that of (a) and is smaller than that of (c). When the output of phase detector is
applied to the input of low-pass filter, the output of low-pass filter should be a dc
level that is directly proportional to the pulse width. In other words, the output dc
level is proportional to the phase error of input signals. Fig. 8-2(d) shows the
relationship between the input phase error and the output dc level.

Fig.8-3 Operation of frequency locking

For a further understanding of the operation of the PLL can be obtained by
considering that initially the PLL is not in lock. The VCO has an input voltage of
2V and is running at its free-running frequency, say 1 kHz. Consider the signals
shown in Fig. 8-3. If the VCO frequency and the signal A with the lower
frequency 980Hz are applied to the inputs of the phase detector XOR, the
narrower width of output pulse will cause the low-pass filter obtaining the smaller
output voltage of 1V. This smaller voltage decreases the VCO frequency close to
the input frequency. If the VCO output frequency equals the input frequency, lock
will result. On the contrary, the higher frequency 1.2 KHz of input signal B causes
110
the larger filter output of 3V that increases the VCO frequency output to lock at
the input frequency.

 LM565 PLL Basic Characteristics

The LM565 is a general-purpose phase-locked loop and is widely used in
frequency demodulation. In designing with the LM565, the important parameters
of interest are as follows:
1. Free-running Frequency
Fig. 8-4 shows a PLL circuit with LM565. In the absence of the input signal, the
output frequency of the VCO is called the free-running frequency fo. In the PLL
circuit of Fig. 8-4, the free-running frequency of LM565 is determined by the
timing components C2 and VR1, and can be found by

Free running frequency (8-1)

Closed loop gain (8-2)

where Vc = total supply voltage to the circuit = Vcc-(-Vcc)=5V-(-5V) = 10V

Fig.8-4 LM565 PLL

111
2. Lock Range:
Initially, the PLL is in already-locked state and the VCO is running at some
frequency. If the input frequency fi is away from the VCO frequency fo, locking
may still occur. When the input frequency reaches a specific frequency where the
PLL loses lock, the frequency difference of fi and fo is called the lock range of the
loop. The lock range of LM565 can be found by

(8-3)
3. Capture Range:
Initially, the loop is unlocked and the VCO is running at some frequency. If the
input frequency fi is close to the VCO frequency fo, unlocking may maintain.
When the input frequency reaches a specific frequency where the PLL locks, the
frequency difference of fi and fo is called the capture range of the loop. The
capture range of LM565 can be found by

(8-4)

Fig.8-5 Illustration of lock and capture ranges

112
  Frequency Demodulator Based on LM565 PLL
The PLL circuit of Fig. 8-4 can be used as a frequency demodulator. When the
input signal increases in frequency, the output signal decreases in voltage.
Inversely, if the input signal decreases in frequency, the output signal will increase
in voltage.
The VCO circuit of the LM565 is equivalent to that of the LM566. The free-
running frequency fo of the VCO is determined by the values of external
components C2 and VR1. The internal resistor 3.6 kΩ (pin7) and the external
capacitor C3 form a low-pass filter. The capacitor C4 connected between pins 7
and 8 is a frequency compensation capacitor.

 FM-to-AM Conversion Discriminator:

Fig. 8-6 shows the blocks of FM to AM discriminator. The inputs FM signal is
first converted into the AM signal by the differentiator, and then the output AM
signal is demodulated by the envelope detector to recover the original audio
signal.

Fig.8-6 Block diagram of FM-to-AM conversion discriminator

In Fig. 8-6, if input signal xFM (t) is

(8-5)

113
Then the differentiator output will be

(8-6)
From Eq. (8-6) above, the amplitude of x´FM(t) signal vary with the variation of
x(t) amplitude. Thus the x´FM(t) signal is an amplitude modulated signal. If this
AM signal passes through an envelope detector, the audio signal will be recovered.
The circuit of Fig.8-7 is a frequency discriminator with FM-to-AM conversion
technique. The components U1, C1, C2, R1 and R2, operate as a differentiator.
The inverting amplifier U2 with a gain of - R4 /R3, and the AM peak detector
including D1, R5, R6, C4 and C5. The coupling capacitor C6 is used to block the
dc level.

Fig.8-7 FM to AM conversion discriminator circuit

Fig.8-8 Frequency response of band pass filter

114
Excepting various frequency demodulators mentioned above, LC band pass filters
are popularly available in the use of frequency demodulation in ultrahigh and
microwave frequency ranges. Fig. 8-8 shows the response of band pass filter. The
linear portion on the curve where the voltage variation is proportional to the
frequency variation meets the requirement of a discriminator.
8.3 EQUIPMENT REQUIRED
1. Module KL-92001
2. Module KL-93004
3. Oscilloscope
8.4 Tasks to Study:
Experiment 8-1 LM565 PLL Characteristic Measurements:
1. Locate LM565 PLL Circuit on Module KL-93004. Insert the connect plug in
J2 to set the capacitor to C2 (0.1µF).
2. Adjust the VR1 to obtain the maximum free-running frequency foh and the
minimum free-running frequency fol at LM565 pin 4 (O/P). Record the results
in Table 8-1.
3. Adjust the VR1 to obtain the VCO free-running frequency fo = 2KHz.
4. Insert the connect plug in J1. Connect a 0.5Vp-p, 2 KHz square wave to the
input (I/P).
5. Observe the PLL input (I/P) and the VCO output (pin 4) signals and slowly
increase the input frequency until the output signal just unlocks. Record the
input frequency as fLh in Table 8-1.
6. Return the input frequency to the free-running frequency fo of VCO. Slowly
decrease the input frequency until the output signal just unlocks and record the
input frequency as fLl in Table 8-1.
7. Using the equation fL = ( fLh - fLl ) / 2, calculate the lock range.
8. Increase the input frequency to force the VCO output unlocked. Slowly
decrease the input frequency until the PLL just locks. Observe the input
frequency fCh and record the result in Table 8-1.

115
 9. Decrease the input frequency to force the VCO output unlocked. Slowly
increase the input frequency until the PLL just locks. Observe the input
frequency fCl and record the result in Table 8-1.
10. Using the equation fC = ( fCh -fCl ) / 2, calculate the capture range.
11. Remove the connect plug from J2 and then insert it in J3. This changes C2
(0.1µF) to C5 (0.01µF). Repeat step 2.
12. Turn the VR1 to get the VCO free-running frequency fo of 20kHz. Insert the
connect plug in J1 and connect a 0.5Vp-p, 20 kHz square to the input (I/P).
Repeat steps 6 to 11.
Experiment 8-2 LM565 V-F Characteristic Measurements
1. Locate LM565 PLL Circuit on Module KL-93004. Insert the connect plug in
J2 to set the capacitor to C2 (0.1µF).
2. Remove the connect plug from J1. Turn the VR1 to get a free-running
frequency fo of 2kHz at VCO output (pin 4).
3. Reinsert the connect plug in J1.
4. Connect a 0.5Vp-p, 2 kHz square wave to the input (I/P). Measure and record
the output voltage of LM565 (O/P) in Table 8-2.
5. Change the input frequencies of 0.5 kHz, 1 kHz, 1.5 kHz, 2.5 kHz, 3 kHz and
3.5 kHz sequentially and measure the output voltages corresponding to the
input frequencies. Record the results in Table 8-2.
6. Plot output voltage vs. input frequency curve in Fig. 8-9.
7. Remove the connect plug from J2 and insert it in J3 to change C2 (0.1µF) to
C5 (0.01µF).
8. Remove the connect plug from J1. Turn the VR1 to get a free-running
frequency fo of 20kHz at VCO output (pin 4).
9. Reinsert the connect plug in J1.
10. Connect a 0.5Vp-p, 20 kHz square wave to the input (I/P). Measure and
record the output voltage of LM565 (O/P) in Table 8-3.

116
 11. Change the input frequencies of 16.5 kHz, 17.5 kHz, 18.5 kHz, 21.5 kHz,
22.5 kHz and 23.5 kHz sequentially and measure the output voltages
corresponding to the input frequencies. Record the results in Table 8-3.
12. Plot output voltage vs. input frequency curve in Fig. 8-10.
Experiment 8-3 PLL Frequency Demodulator:
1. Locate LM566 FM Modulator circuit on Module KL-93004. Insert the
connect plugs in J1 and J3 to set the capacitor to C4 (0.01µF). Turn the VR1
to get the output free-running frequency fo of 20kHz.
2. Complete LM565 PLL Circuit by inserting the connect plug in J3 to set the
capacitor to C5 (0.01µF). Turn the VR1 to get the free-running frequency fo
of 20kHz at VCO output .(pin 4)
3. Connect the LM566 FM Modulator output to the LM565 PLL circuit input,
and insert connect plug in J1.
4. Connect a 300mVp-p, 1 kHz sine wave to the input of LM566 FM
Modulator. Using the oscilloscope, observe the output waveform of LM565
PLL Circuit and record the result in Table 8-4.
5. Repeat step 4 for the input frequencies of 2 kHz and 3 kHz.
6. Change the input amplitude to 500mVp-p. Repeat steps 4 and 5, and record
the results in Table 8-5.
Experiment 8-4 FM to AM Frequency Demodulator:
1. Locate MC1648 FM Modulator circuit on Module KL-93004. Insert connect
plugs in J1 and J3 to set the inductor to L1 (220µH) and the 1SV55 varactor
operating at 5V.
2. Connect a 2Vp-p, 1 kHz sine wave to the input (I/P1). Turn the VR1 to get
the output amplitude of 600mVp-p.
3. Connect the output of MC1648 FM Modulator to the input of FM to AM
Discriminator Circuit on the lower of Module KL-93004.
4. Using the oscilloscope, observe and record the input and output waveforms
of frequency demodulator in Table 8-6.

117
 5. Repeat steps 2 to 4 for audio frequencies of 2KHz and 3KHz, respectively.
Table 8-1

118
Table 8-2
(Vm=0.5Vp-p, fo=2kHz, C2=0.1µF)

Fig.8-9

119
Table 8-3
(Vm=0.5 Vp-p, fo=20 kHz, C5=0.01µF)

Fig. 8-10

120
Table 8-3
(Vm=0.5 Vp-p, fo=20 kHz, C5=0.01µF)

Fig. 8-10

121
Table 8-4
(Vm=300mVp-p, fo=20kHz)

122
Table 8-5
(Vm=500mVp-p, fo=20kHz)

123
Table 8-6
(Vm=2Vp-p)

124
8.5 Questions:
1. Examining the results of experiment 8-1, could you find that the VCO
frequency would be when the input frequencies of LM565 were outside its
lock range?
2. Comparing the lock range with the lock range of LM565, which is the
wider?
3. State the function of capacitor C3 in the circuit of Fig.8-4. If replacing the
C3 (0.1 µF) by a 0.01 µF capacitor, what is the change of the output signal
(pin 7) of LM565?
4. If a low pass filter is externally connected to the output of LM565
frequency demodulator, does the demodulated signal become smoother?
Try to design this filter.
5. Design a frequency doubler with PLL and logic circuits.

125
Experiment 9
Frequency
Synthesizer
(Part I)

126
9.1 Educational Objectives:
 To study the principle of frequency synthesizers.
 To measure the characteristics of typical frequency synthesizers
9.2 Background Information:
Basically a frequency synthesizer is a frequency source whose output signal
frequency is equal to the input reference frequency multiplied by an integer
number. Figure 9-1 shows a typical frequency synthesizer, which consists of a
phase-locked loop (PLL), voltage-controlled oscillator (VCO), phase detector and
divide-by-N counter. The phase detector in the PLL of Figure 9-1 produces an
average voltage value, which is proportional to the difference between the input
reference frequency fREF and the output frequency of divide-by-N counter fO/N.
The divide-by-N counter is generally preset by thumbwheel switches or controlled
with MPU software. This counter produces an output pulse every N input pulses.
The output voltage of the phase detector is applied to the input of the voltage-
controlled oscillator (VCO) after filtering by a low pass filter (LPF) to control the
VCO output frequency fO, so that the output frequency is equal to N times the
input reference frequency in locking.

Figure 9-1 Block diagram of typical frequency synthesizer

When the PLL operates in lock, the relationship between reference and counter
output can be expressed by

127
Or the equivalent equation

It is evident that the output frequency is determined by the reference frequency fR

and the preset counter value N. In other words, a frequency synthesizer is a
frequency generator whose output frequency is equal to the input reference
frequency multiplied by an integer N. Therefore a stable and precision reference
frequency is required for an excellent frequency synthesizer. Usually a crystal
oscillator is employed.
 Various Frequency Synthesizers
There are many types of frequency synthesizers available in practical applications.
These are:
1. Typical Frequency Synthesizer
Figure9-2 shows the block diagram of direct frequency synthesizer. The reference
frequency fR to the reference input of the PLL circuit is the crystal oscillator
frequency fX divided by M. As mentioned previously, the output frequency of the
frequency synthesizer is calculated by the equation fO=N fR

Figure 9-2 Block diagram of typical frequency synthesizer

The main disadvantage of the typical frequency synthesizer is the frequency
limitation of programmable divider. The maximum operating frequency of
programmable dividers available in market is only several tens of MHz. This
limits the maximum output frequency of frequency synthesizer. To overcome this
disadvantage the following types of frequency synthesizer may be selected.

128
2. Frequency Synthesizer with Frequency Multiplier
A frequency multiplier with a multiplication H is used in the type of frequency
synthesizer shown in Figure 9-3. From the block diagram, the output signal
frequency is calculated by

However this frequency synthesizer has two disadvantages: (1) an additional

frequency-selective circuit is required, and (2) a small variation in VCO output
frequency will result in a unbearable variation in synthesizer output frequency

Figure 9-3 Frequency synthesizer with a frequency multiplier

3. Frequency Synthesizer with Prescaler
Figure 9-4 shows the block diagram of the frequency synthesizer with a prescaler.
The prescaler introducing between VCO output (synthesizer output) and divide-
by-N divider input is used to lower the input frequency of the divider in an
allowable range.

Figure 9-4 Frequency synthesizer with prescaler

129
Basically the prescaler, a type of frequency divider, is manufactured in
ECL technology and can operate at much high frequency (up to GHz).
The output signal frequency of the synthesizer in Figure 9-4 is given by

Since fO is the VCO output, therefore the VCO must operate at a higher frequency
compared with these two types discussed above.
4. Frequency Synthesizer with Frequency Converter
Generally there are two types of the frequency conversion using in frequency
synthesizers. These are rising conversion and lowering conversion.
Figure 9-5 shows the frequency synthesizer with rising frequency converter. The
VCO output frequency is converted to higher frequency by the mixer and local
oscillator circuit. The output frequency is expressed as

Where fL represents the output frequency of local oscillator

Figure 9-5 Frequency synthesizer with rising frequency converter

The first problem encountered in this frequency synthesizer is similar to the type
of frequency synthesizer with frequency multiplier due to a frequency-selective
circuit is needed at output stage. In addition, the local oscillator is located outside
the PLL circuit so that the PLL cannot correct the frequency deviation caused by
the local oscillator. Figure 9-6 shows the frequency synthesizer with lowering
frequency converter. The mixer is inside the PLL circuit so that the frequency

130
deviation of local oscillator can be corrected by PLL. The output frequency, fO=
fL+NfR, is from the VCO output directly so that the VCO must operate at higher
frequencies.

Figure 9-6 Frequency synthesizer with lowering frequency converter

 Transfer Function and Transient Response
The analysis of transfer function or transient response is an important technique in
designing frequency synthesizers. Referring to the block diagram of basic
frequency synthesizer shown in Figure 9-7, the characteristic of each block is
expressed by its own transfer function.

Figure 9-7 Transfer function of a frequency synthesizer

In Figure 9-7, θR is the phase of the reference signal and θO is the phase of the
VCO output signal. The output of the phase comparator is directly proportional to
the difference between these two phases multiplied by the conversion gain KD and
can be expressed as

131
The voltage Vd caused by the phase error Δθ runs through the lowpass filter in
order to filter the high-frequency components out. The VCO output frequency is
determined by the LPF output voltage Ve and the conversion gain Ko.

Replacing ωo by dθo/dt gives

Laplace transform of the above equation is

Therefore θo(s)=(Ko.Ve(s))/s. In short, the phase of VCO output is directly

proportional to the control voltage Ve multiplied by an integer constant.
Laplace transforms of the blocks in Figure 9-7 can be expressed as

The transfer function of the frequency synthesizer is therefore expressed by

H(s) depends on the lowpass filter (LPF) transfer function F(s). There are two
types of LPF usually available in this application. Type I and II of RC lowpass
filter are shown in Figures 9-8 and 9-9, respectively.
132
 Figure 9-8 Type I of RC lowpass filter

Figure 9-9 Type II of RC low pass filter

The transfer function of type I low pass filter can be expressed by

Where τ = RC. If the RC lowpass filter of Figure 9-8 is used as the loop filter of
the frequency synthesizer, the transfer function of the frequency synthesizer can be
expressed as

133
Introducing the damping ratio d into the above equation, becomes

Where

Replacing the loop filter by the RC lowpass filter of Figure 9-9, the transfer
function of loop filter is given by

Where τ1 = R1C and τ2 = R2C. The transfer function of the synthesizer becomes

Where

134
The transfer function of frequency synthesizer, H(s), is a second-order function.
Similar to any second-order systems, time delay is introduced between input and
output, and overshoot may be occurred at the output. View the step response of
frequency synthesizer shown in Figure 9-10. The fN is the ideal output frequency
change that follows a step change in the input frequency, while the fO is the
practical response of output frequency.

Figure 9-10 Transient response of frequency synthesizer

The loop filter decides two things for the synthesizer - the settling time or how
many cycles the loop is going to average, and the damping or the ability of the
loop to accept new changes without excessive overshoot or possible oscillation. If
the loop filter is the RC low pass filter of Figure 9-9 (Type II), the settling time of
the loop is set by R1 and C1. Too long an R1C1 time constant makes the loop too
slow in following fast input frequency changes.
Too small the R1C1 time constant will not average enough input cycles and jumps
the VCO output around violently. The damping is set by the ratio of R1 to R2.
Small or zero R2 (Type I) values make the loop bounce, overshoot, or even
oscillate. Too large the R2 value makes the loop take too long to read just to a new
input frequency.

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Figure 9-11 Transient response of the frequency synthesizer using the LPF of Figure 9-8

Figure 9-11 shows the normalized transient response of the frequency synthesizer
using the RC lowpass filter of Figure 9-8 as the loop filter.
Figure 9-12 shows the normalized transient response of the frequency synthesizer
using the RC lowpass filter of Figure 9-9 as the loop filter.

Figure 9-12 Transient response of the frequency synthesizer using the LPF of Figure 9-9

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  Practical Circuit Description
Figure 9-13 shows the entire circuit on the PLL Frequency Synthesizer Module. It
consists of the following sections:
1. Reference Frequency section
2. PLL section
3. Divide-by-N Device section
4. Divide-by-10 Device section
5. Offset OSC section
1. Reference Frequency section
The reference frequency section consists of a crystal reference oscillator and a
frequency divider. The 1-MHz quartz (X’TAL1) and the NOT gate (U4a,
74HC04) form the precision oscillator. Three BCD counters (U1-U2-U3, 74LS90)
are connected to construct a divide-by-1000 divider.
The output signal of reference oscillator is connected to the input of the divide-by-
1000 divider via NOT buffers (U4b and U4c). The output signal frequency of the
divider at U1 QA is therefore equal to 1000 KHz ÷1000 = 1 KHz Another output
frequency from U2 QA is 1000KHz÷100=10 KHz.
Besides the additional JK flip-flop (U5a, 1/2 74LS76) is constructed as a divide-
by-2 divider and its output frequency at Q may be fR=0.5KHz or 5KHz when its
clock input connected to 2 or 1, respectively. The transistor Q1 is interfacing the
TTL output of U5a to the CMOS input of U6.

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 Figure 9-13 KL-93005 modules
2. PLL section
PLL circuit consists of a phase comparator, lock indicator, VCO, and LPF.
The U6 (CD4046) containing two phase comparators and a VCO is the heart of
PLL. The CD4046 has two possible phase comparators. One is an Exclusive-OR
system that offers good noise performance, but is harmonic sensitive and must

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have square waves on both pins 3 and 14. It is limited to a narrow frequency
range. The other system is a logic frequency/phase comparator that operates over a
wide frequency range (1000:1 or beyond), accepts any input duty cycle, and is not
harmonic sensitive. It has relatively poor noise rejection. This system of the
wideband phase comparator is selected in the PLL section.
Two input signals of the phase comparator are: (1) the reference signal fR on TP4,
and (2) the feedback signal fN coming from the programmable divider output on
TP8. The wideband phase comparator provides a tri-state sample-and-hold output
on pin 13 for the loop filter. If the input frequency is higher than the VCO
frequency, a steady high output results. If the input frequency is lower than the
VCO frequency, a steady low output results. If the two frequencies are identical,
the phase comparator outputs a pulse proportional to the phase difference. This
pulse is positive going for lagging VCO phase and is negative going for leading
VCO phase as shown in Figure 9-14.
If the reference signal leads the feedback signal, the phase comparator outputs a
high pulse charging the capacitor C8. If the reference signal phase lags behind the
feedback signal, the phase comparator outputs a low pulse discharging the
capacitor C8. If the two phases are equal exactly, the output of phase comparator
presents high impedance and the charges on capacitor C8 are held.
The loop filter, constructed by resistors R6 and R7 and the capacitor C8,
determines two things: (1) the settling time, or how many cycles the loop is going
to average, and (2) the damping, or the ability of the loop to accept new changes
without excessive over shoot or possible oscillation. The settling time of the loop
is set by R6 and C8. Too long an RC constant makes the loop too slow in
following fast input frequency changes. Too small an RC constant won't average
enough input cycles and jumps the VCO output around violently. The damping of
the loop is set by the ratio of R6 to R7. Small or zero R7 values make the loop
bounce, overshoot, even oscillate. Too large an R7 makes the loop take too long to
read just to a new input frequency.

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 Figure 9-14 Phase comparator waveforms
During the PLL locked, U6 pin 1 presents a high level which enables the transistor
Q2 conducting and turning on the lock indicator LED1. On the other hand, a low
level will appear at U6 pin 1 to disable the transistor Q2 and turn the lock indicator
LED1 off if the PLL unlocked. The VCO frequency extremes are determined by
the capacitor (C4, C5, or C6) between pins 6 and 7, the maximum frequency
resistor (VR2) on pin 11, and the minimum frequency resistor (VR1) on pin 12.
Expressing in equation form gives

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Where fMAX - fMIN is referred to the lock or tracking range of VCO.
3. ÷N Device section
The VCO output signal is connected to the cascaded programmable divider (U10,
U9, U8, and SN74192) via the level shifter Q4 that converts CMOS level (VCO
output) to TTL level (divider input).
Each synchronous up/down decade counter SN74192 is used as a down counter
whose outputs are preset by thumbwheel BCD outputs and load input signal. BCD
inputs' When a low (0) presents at load control input (pin 11), the BCD inputs
(pins 15, 1, 10, and 9; thumbwheel BCD outputs) are loaded into the decade
counter. When input pulses reach at the down-count input (pin 4), the counter
counts down and the borrow output (pin 13) produces a pulse as the counter
underflows.
For example, the three down counters U8, U9, and U10 are preset to 2, 1, and 3 by
the hundreds, tens, and units thumbwheels, respectively. Each input pulse to the
units counter U10 pin 4 results in a decrement of counter values. After 213 input
pulses, an output pulse appears at U8 pin 13 (borrow output). The borrow output
pulse (low) is connected to the load inputs of these three counters to reload the
value 213 into the counters and then the counting sequence runs repeatedly. In this
example, the cascaded decade counter is a divide-by-213 counter. Figure 9-15
shows the operation of BCD thumbwheel. If the thumbwheel is switched to the
decimal figure 5, the outputs C= A=1 and
D=B=0, therefore the BCD value 0101 is loaded into the programmable counter
SN74192. The output pulse of the programmable divider (U10-U9-U8) is sent to
the input of phase comparator via a JK flip-flop (U5b). The reason is that the pulse

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width is too narrow to drive the phase comparator. For the same reason, a JK flip-
flop (U5a) is added to the reference frequency section.

Figure 9-15 BCD thumbwheel operation

4. ÷10 Device section
A frequency synthesizer with precaler is simply made by adding a frequency
divider (prescaler) to the input of the programmable divider in typical frequency
synthesizer circuit. The use of prescaler promotes the output signal frequency f0 of
the synthesizer but keeps the input frequency to the programmable divider
compared with typical frequency synthesizer. In Figure 9-13, the decade counter
U7 (SN7490) serves as a prescaler with the scale of 10. By the use of precaler the
frequency step ΔF will be increased to 10 times the reference frequency.
5. Offset OSC section
See Figure 9-13. The D flip-flop (U11, SN7474) serves as a mixer.
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The inverters (U12) and crystal (X'TAL2) form a local oscillator whose output is
connected to the D input of the mixer. The VCO output frequency fO is shifted to a
lower frequency via the mixer for suitable the programmable divider input. The
output signal frequency of the mixer is calculated by

Where fL is the local oscillator frequency.

9.3 EQUIPMENT REQUIRED
1. Module KL-92001
2. Module KL-93005
3. Oscilloscope
9.4 Tasks to Study:
Experiment 9-1 Typical Frequency Synthesizer
1. To construct a typical frequency synthesizer, the following circuit sections
are necessary.
(1) Reference Frequency section
(2) PLL section
(3) Divide-by-N Device section
Locate these sections on the PLL Frequency Synthesizer Module.
2. Reference frequency measurement
(1) Place a jumper in position 2.
(2) Using the scope, measure and record the waveforms and frequencies on
the test points in Table 9-1.
3. Measuring VCO input voltage vs output frequency characteristic
(1) Remove the jumper from position 2. With power off, set VR1 to 10KΩ
and VR2 to 1.4MΩ using DMM.
(2) Place jumpers in positions 3 and 6. Connect scope CH1 IN to OUT
terminal (VCO OUT). Connect dc power supply 0-15VDC from KL-92001

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 to TP6 (VCO IN). Measure and record the waveforms and frequencies for
different dc input voltages in Table 9-2.
(3) Plot VCO voltage-frequency characteristic in Figure 9-16 according to
the results in Table 9-2.
(4) Place a jumper in position 7 (VR2 connected). Repeat steps (2) and (3),
record the results in Table 9-3 and plot the characteristic in Figure 9-17.
4. Measuring the signal frequencies of phase comparator
(1) Place jumpers in positions 2, 3, 6, 7, and 11.
(2) Measure and record the frequencies on TP4, TP8, and OUT for various
BCD thumbwheel setting values in Table 9-4.
(3) Remove the jumper from position 3 to position 4. Repeat step (2).
(4) Remove the jumper from position 4 to position 5. Repeat step (2).
5. Measuring programmable divider
(1) Place jumpers in 2, 3, 6, 7, and 11 positions.
(2) Measure and record the frequencies on U10 pin4 (fin), TP7 (fout), and
TP8 for various BCD thumbwheel setting values in Table 9-5. Calculate and
record the ratio of fin to fout in Table 9-5.
(3) Remove the jumper from position 3 to position 4. Repeat step (2).
(4) Remove the jumper from position 4 to position 5. Repeat step (2).
6. Measuring transient response of frequency synthesizer
(1) Place jumpers in 2, 5, 6, 7, and 11 positions.
(2) Connect scope input to TP6. Measure and record the transient response
curve of the frequency synthesizer for each sudden change in input frequency
in Table 9-6. Measure and record the settling time for each transition in Table
9-6. To produce a sudden change in input frequency, from 300KHz to
400KHz for example, first set BCD value to 300 (300KHz) and then switch
hundreds thumbwheel to 4 (400KHz) suddenly.
(3) Connect a 10µF capacitor between TP6 and ground. Repeat step (2) and
record the results in Table 9-7.

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145
Table 9-1 Reference frequency measurement

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Table 9-2 VCO input voltage vs output frequency characteristic

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Table 9-3 VCO input voltage vs output frequency characteristic
(VR2 connected)

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Figure 9-16 Output frequency vs input voltage characteristic

Figure 9-17 Output frequency vs input voltage characteristic

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Table 9-4 Phase comparator frequencies

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Table 9-5 fin/fout measurement

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Table 9-6 Transient response of frequency synthesizer

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Table 9-7 Transient response of frequency synthesizer (10µF connected)

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Experiment
10
Frequency
Synthesizer
(Part II)

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10.1 Educational Objectives:
 To measure the characteristics of frequency synthesizers with Prescaler.
 To measure the characteristics of frequency synthesizers with Frequency
Converter.
10.2 Background Information:
“Refer to the background Information of experiment 9”
10.3 EQUIPMENT REQUIRED
4. Module KL-92001
5. Module KL-93005
6. Oscilloscope

10.4 Tasks to Study:

Experiment 10-1 Frequency Synthesizer with Prescaler
1. Place jumpers in positions 2, 3, 6, 7, 8, and 12. This step constructs a
frequency synthesizer with prescaler as shown in Figure 9-4, and sets
fR=0.5KHz, P=10.
2. Measure and record the signal frequencies on OUT, U7 pin1, and U7 pin12
for various BCD thumbwheel setting values in Table 10-1.
3. Compare U7 pin1 signal with OUT and record the phase shifts of U7 pin1
signal in Table 10-1.
4. Compare U7 pin12 signal with OUT and record the phase shifts of U7
pin12 signal in Table 10-1.
5. Remove the jumper from position 3 to position 4. Repeat steps 2 thru 4.
6. Remove the jumper from position 4 to position 5. Repeat steps 2 thru 4.
Experiment 10-2 Frequency Synthesizer with Frequency Converter
1. Place jumpers in positions 2, 5, 6, 7, 10, and 13. This step constructs a
frequency synthesizer with lowering frequency converter as shown in
Figure 9-6, and sets fR=0.5KHz, fL=1MHz.

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2. Using the scope or frequency counter, measure and record the output
frequency of local oscillator on TP9.
Measured frequency fL = ______________
3. Measure and record the frequencies on OUT (fO) and U11 pin5 for various
BCD thumbwheel setting values in Table 10-2.
4. The frequency on U11 pin5 should equal to the output frequencies minus
the local oscillator frequency, fO-fL.

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Table 10-1 Frequency synthesizer with prescaler

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Table 10-2: Frequency synthesizer with frequency converter

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10.5 Questions:
1. Describe the function of JK flip-flops (U5a, U5b) in reference frequency
and programmable divider sections.
2. Describe the requirement of the input signals to phase comparators in
CD4046.
3. What is the frequency range of VCO in PLL section?

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