COMPUTER ORGANIZATION &
ARCHITECTURE
INSTRUCTION FORMATS,
INSTRUCTION TYPES, AND
ADDRESSING MODES
CISC AND RISC
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BASIC CONCEPTS OF COMPUTER HANDLING AN INSTRUCTION
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BASIC CONCEPTS OF COMPUTER HANDLING AN INSTRUCTION
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REGISTERS
▪ A register holds an instruction, a storage address, or any kind of data.
▪ In 8086 microprocessor, the registers are categorized under following four types:
▪ General Purpose Registers
▪ Segment Registers
▪ Special Purpose Registers
▪ Flag Registers
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▪ General Purpose registers:
▪ Hold the temporary data while performing different operations.
▪ Functionality: GPRs are used for a wide range of tasks and can hold data, addresses, or
intermediate results during program execution.
▪ Flexibility: They can be used by the programmer for general calculations and data
manipulation, making them versatile.
▪ Accumulator Register(AX), Base Register(BX), Counter Register(CX), Data Register(DX)
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▪ Special Purpose Registers: A special purpose register is one that has a specific control or data handling
task to carry out. There are a number of special purpose registers within the CPU.
▪ Program counter: This holds the memory address of the next instruction.
▪ Instruction Register: This holds the current instruction to be executed, having been fetched from memory.
▪ Memory address registers: The MAR holds the address of main memory to or from which the data is to be
transferred.
▪ Memory data register: They contain the data to be written into or read from the address word of the main
memory.
▪ Stack control registers: They are mainly used to manage the stacks in the computer.
SP - BP is stack control registers.
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▪ Flag registers: It contains information about the state of the processor after executing an
instruction. It is sometimes referred to as the status register because it contains various
status flags that reflect the outcome of the last operation executed by the processor.
▪ The flag register is divided into various bit fields, with each bit representing a specific flag.
Some of the important flags in the flag register include the carry flag (CF), the zero flag (ZF),
the sign flag (SF), the overflow flag (OF), the parity flag (PF), and the auxiliary carry flag
(AF).
▪ Depending upon the value of result after any arithmetic and logical operation the flag bits
become set (1) or reset (0).
▪ Example of overflow flag: On adding bytes 100 + 50 (result is not in range -128…127), so
overflow flag will set.
▪ The flag register can be used to detect errors and exceptions, such as overflow or divide-by-
zero errors. This allows programs to handle these errors gracefully and to take appropriate
corrective action.
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▪ Sign Flag (S) – After any operation if the MSB (D(7)) of the result is 1, it indicates the
number is negative and the sign flag becomes set, i.e. 1. If the MSB is 0, it indicates the
number is positive and the sign flag becomes reset i.e. 0.
▪ Zero Flag (Z) – After any arithmetical or logical operation if the result is 0 (00)H, the
zero flag becomes set i.e. 1, otherwise it becomes reset i.e. 0.
▪ Parity Flag (P) – If after any arithmetic or logical operation the result has even parity,
an even number of 1 bit, the parity register becomes set i.e. 1, otherwise it becomes
reset i.e. 0. 1-accumulator has an even number of 1 bits 0-accumulator has odd parity
▪ Carry Flag (CY) – Carry is generated when performing n bit operations and the result
is more than n bits, then this flag becomes set i.e. 1, otherwise, it becomes reset i.e. 0.
During subtraction (A-B), if A>B it becomes reset, and if (A<B) it becomes set.
▪ Auxiliary Carry Flag (AC) – This flag is used in the BCD number system(0-9). If after
any arithmetic or logical operation D(3) generates any carry and passes it on to D(4)
this flag becomes set i.e. 1, otherwise, it becomes reset i.e. 0.
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GATE PROBLEM
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WHAT IS AN INSTRUCTION?
▪ An instruction is the most basic unit of command
▪ Instructions are words in the language of a computer
▪ ISA is the vocabulary
▪ The languages of the computer can be written as:
▪ Machine language
▪ High-level language
▪ Assembly language
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SEQUENTIAL EXECUTION
▪ Instruction length is called the word length
▪ The address of the next instruction is stored in the Program counter (PC)
▪ PC is incremented by length of current instruction (Eg: PC=PC+4)
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ADDRESSING MODES
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IMMEDIATE ADDRESSING
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DIRECT ADDRESSING
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INDIRECT ADDRESSING
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REGISTER ADDRESSING
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REGISTER-INDIRECT ADDRESSING
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RELATIVE ADDRESSING
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INDEX ADDRESSING
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STACK ADDRESSING
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SOME OTHER ADDRESSING MODES
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EFFECTIVE ADDRESS
▪ Effective address is the address that holds the operand
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address Memory
▪ Example of effective address calculation
200 Load to Acc | Mode
Addressing mode Effective Content of 201 Address = 500
Address Accumulator 202 Next Instrucction
Immediate addressing 201 500
399 450
Register addressing - 400
400 700
Direct addressing 500 800
500 800
Indirect addressing 800 300
Relative addressing (202 + 500) 325
702 600 900
Indexed addressing (100+500) 900
600 702 325
Register indirect 400 700
800 300
Register R1 400
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XR 100
GATE PROBLEM
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INSTRUCTION FORMATS
▪ Zero address instruction
▪ One address instruction
▪ Two address instruction
▪ Three address instruction
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ZERO ADDRESS
▪ A stack based computer do not use address field in
instruction.
▪ Uses PUSH and POP
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ONE ADDRESS
▪ This use a implied ACCUMULATOR
register for data manipulation.
▪ One operand is in accumulator and
other is in register or memory location.
Implied means that the CPU already
know that one operand is in accumulator
so there is no need to specify it.
▪ LOAD & STORE
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TWO ADDRESS
▪ This is common in commercial
computers. Here two address can be
specified in the instruction.
▪ Unlike earlier in one address instruction
the result was stored in accumulator
here result cab be stored at different
location rather than just accumulator, but
require more number of bit to represent
address.
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THREE ADDRESS
▪ This has three address field to specify a register or a
memory location. Program created are much short in
size but number of bits per instruction increase.
These instructions make creation of program much
easier but it does not mean that program will run
much faster because now instruction only contain
more information but each micro operation
(changing content of register, loading address in
address bus etc.) will be performed in one cycle
only.
▪ The code is for your practice.
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TYPES OF INSTRUCTION
▪ Arithmetic and Logic Instruction
▪ Data Movement Instruction
▪ Control flow Instruction
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ARITHMETIC AND LOGIC INSTRUCTION
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DATA MOVEMENT INSTRUCTIONS
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CONTROL FLOW INSTRUCTION
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EXAMPLE FOR ADDITION
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INSTRUCTION CYCLE
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Instruction operand Operand
fetch fetch store
Multiple Multiple
operands results
Instruction Instruction Operand Operand
Data
address operation address address
operation
calculation decoding calculation calculation
Instruction complete, fetch next instruction
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ISA VS MICROARCHITECTURE
▪ ISA
▪ Microarchitecture:
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INSTRUCTION SET ARCHITECTURE
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ISA
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CLOCK CYCLES PER INSTRUCTION
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EXECUTION TIME OF AN INSTRUCTION
CPU execution time is the total time a CPU spends computing on a given task. It also
excludes time for I/O or running other programs. This is also referred to as simply CPU
time. Performance is determined by execution time as performance is inversely
proportional to execution time.
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INSTRUCTION SET COMPUTER TYPES
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CISC VS RISC
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CISC VS RISC
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SELECTION CRITERIA AND EXAMPLES
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MODERN PROCESSORS
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