ASSIGNMENT 1
PART A
Q1. Make the Table of Max term for 4 Variables ?
Q2. (B’+C).(A’+C).(A+B) Convert it in to Canonical.
Q3. Prove AB+BC+CA is Self Dual.
Q4. Write Duality Theorem ?
Q5. Explain D Morgan Theorem .
PART B & C
Q1. F=∑(1,4,12,14,15) Solve it by K Map.
Q2. F=∑(1,4,12,14,15) Solve it by Tabular Method.
Q3. F=AB+BC+A’C Solve it by K Map.
Q4. F=AB+BC+A’C Solve it by Tabular Method.
ASSIGNMENT 2
PART A
Q1. What is Boolean Expression or Function ?
Q2. What are Literals ?
Q3. Write all Boolean Laws.
Q4. What is Canonical Form ? F=AB+BC’ Convert it in too Canonical & in terms of
Minterms
Q5. F=AB+BC+CA Write its Dual.
Part B & C
Q1. F(A,B,C,D)=Σ (1,3,5,6,7,11,13,14)+d(8,12).Realize it by K Map
Q2. Solve above Question by Tabular Method.
Q3. F = x’yz + xy + xy’z’. Solve it by K Map & Tabular Method.
Q4.If F=(AB+BC+CA) Find Complement of F
ASSIGNMENT 3
PART A
Q1. Draw Block Diagram of 3:8 Decoder?
Q2. Draw 8x1 Mux by 4x1 Mux.
Q3. Draw 6 & 9 Digit Using 7 Segment Common Anode ? Tell Value of
a,b,c,d,e,f,g.
Q4. Compare Decoder & Specific Decoder ?
Q5. Draw Circuit of 4 Bit Binary Adder ?
PART B & C
Q1. F=∑(1,4,12,14,15) Realize it by Type 0 & Type 1.
Q2. Explain BCD to 7 Segment Decoder- Common Anode .
Q3. Design a Combinational Circuit which Take 3 Bit Input & Give 1 Bit Output.
Output is 1 if at least 2 inputs are 1 else 0 .
Q4. Explain 2 Bit Magnitude Comparator & Full Adder & BCD to Excess 3
Convertor.
ASSIGNMENT 4
PART A
Q1. What is Sequential Circuit ?
Q2. Compare Sequential Circuit & Combinational Circuit.
Q3. What is Flip Flop ? What are its Types ?
Q4. Compare Latch & Flip Flop with Example of Truth Table of S-R Latch & S-R
Flip Flop ?
Q5. Compare Characteristic Table & Excitation table ?
PART B & C
Q1. Explain S-R Latch & S-R Negative Edge Triggered Flip Flop.
Q2. Explain D Latch & D Flip Flop (Negative Edge Triggered)?
Q3. Explain T Latch & T Flip Flop (Positive Edge Triggered) ?
Q4. Explain Edge Triggering Method .
ASSIGNMENT 5
PART A
Q1. What is Flip Flop ?
Q2. Name Some Flip Flops. What is difference between Latch & Flip Flop?
Q3. What is Characteristic Table & Excitation Table ? Draw Characteristic Table
of Positive Edge Triggered J-K Flip Flop & S-R Flip Flop.
Q4. What is difference between Synchronous & Asynchronous Counter ?
Q5. What is Race Round Condition ?
PART B & C
Q1. Explain J-K & S-R Flip Flop .
Q2. Explain 4 Bit Asynchronous Up Down Counter .
Q3. Explain 4 Bit Synchronous Up Counter Using T Flip Flop ?
Q4. How Race Round Condition Problem Solve ? Explain Master Slave Flip Flop .
ASSIGNMENT 6
PART A
Q1. What is Logic Families ? What are the Generation of IC ?
Q2. Define VIL,VOL,VIH,VOH .
Q3. Draw Tree Diagram of Logic Families .
Q4. Define Speed Power Product, Propagation Delay & Noise Margin of Logic
Families .
Q5. Compare TTL,ECL & CMOS
PART B & C
Q1. Name the Parameters of Logic Families Explain Them .
Q2. Explain TTL NAND Gate .
Q3. Explain TTL with Totem Pole ? Why we use Toetem Pole ?
Q4. Explain CMOS NAND & NOR Diagram
ASSIGNMENT 7
PART A
Q1. What is Self Complementing Code ? Give Example.
Q2. What is Reflexive Code ? Give Example.
Q3. If Number is 325 than Find the Excess 3 Code of Given Number.
Q4. Write the 15’s Complement of 1A25 .
Q5. (√ N ) =(25)8 Find N
PART B & C
Q1. Perform Following Subtraction Using 1’s Complement & 2’s Complement
1011-0110
0111-1110
1010-111
Q2. Perform Following Subtraction Using 9’s & 10’s Complement
45-20
28-67
Q2. Solve Following
(89.25)10=(x)16=(y)8=(z)2
(1011.001)10=(x)16=(y)8=(z)10
Q3. Design AB’+A’B Using NAND Gate Only ?
Q4. If N2=(7601) 8 Find N.
(54)6=(42)r Find r
