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Electronics Devices Lab

Digital Electronics lab manual

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0% found this document useful (0 votes)
112 views110 pages

Electronics Devices Lab

Digital Electronics lab manual

Uploaded by

Memours
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
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Jaipur Engineering college and research centre, Shri Ram ki Nangal, via

Sitapura RIICO Jaipur- 302 022.

LAB-MANUAL
Lab Name : Electronics Devices Lab

Lab Code : 3EC4-21

Branch : Electronics & Communication Engineering

Department of Electronics and Communication


Jaipur Engineering College and Research Centre,Jaipur

(ECE/LAB MANUAL/3EC4-21 EDC LAB) Page 1


Jaipur Engineering college and research centre, Shri Ram ki Nangal, via
Sitapura RIICO Jaipur- 302 022.

Index
S.No Contents Page No.
1
Motto of JECRC
2
Vision and Mission of the Institute
3
Vision and Mission of the Department
4
Program Educational Objectives (PEOs)
5
Program Outcomes (POs)
6
Program Specific Outcomes PSO of the Department
7
RTU Syllabus
8
Course Outcomes
9
CO/PO-PSO mapping
10
Content Beyond Syllabus

(ECE/LAB MANUAL/3EC4-21 EDC LAB) Page 2


Jaipur Engineering college and research centre, Shri Ram ki Nangal, via
Sitapura RIICO Jaipur- 302 022.

Motto of JECRC

TEACH
TRAIN
&
TRANSFORM

FOR

 Contribution towards National Development


 Global Competencies among Students
 Incorporating a Value System
 Promotion to use of Technology

(ECE/LAB MANUAL/3EC4-21 EDC LAB) Page 3


Jaipur Engineering college and research centre, Shri Ram ki Nangal, via
Sitapura RIICO Jaipur- 302 022.

Vision of the Institute

To become a renowned centre of outcome based learning, and work towards academic, professional,
cultural and social enrichment of the lives of individuals and communities.

Mission of the Institute

 Focus on evaluation of learning outcomes and motivate students to inculcate researc h aptitude by
project based learning.
 Identify, based on informed perception of Indian, regional and global needs, areas of focus and
provide platform to gain knowledge and solutions.
 Offer opportunities for interaction between academia and industry.
 Develop human potential to its fullest extent so that intellectually capable and imaginatively
gifted leaders can emerge in a range of professions.

(ECE/LAB MANUAL/3EC4-21 EDC LAB) Page 4


Jaipur Engineering college and research centre, Shri Ram ki Nangal, via
Sitapura RIICO Jaipur- 302 022.

Vision of the Department

To contribute to the society through excellence in scientific and technical education, teaching and research
aptitude in Electronics and Communication Engineering to meet the needs of Global Industry.

Mission of the Department

M1: To equip the students with strong foundation of basic sciences and domain knowledge of ECE,
so that they are able to creatively their knowledge to the solution of problems arising in their
career path.

M2: To induce the habit of lifelong learning to continuously enhance overall performance.

M3: Students are able to communicate their ideas clearly and concisely so that they can work in
team as well as an individual.

M4: To make the students responsive towards the ethical, social, environmental and in economic
context for the society.

(ECE/LAB MANUAL/3EC4-21 EDC LAB) Page 5


Jaipur Engineering college and research centre, Shri Ram ki Nangal, via
Sitapura RIICO Jaipur- 302 022.

Program Educational Objectives

P EO 1 To provide students with the fundamentals of engineering sciences with more


emphasis in Electronics & Communication Engineering by way of analysing
and exploiting electronics & communication challenges.

P EO 2 To train students with good scientific and Electronics & Communication


Engineering knowledge so as to comprehend, analyse, design and create
electronics & communication based novel products and solutions for the real
life problems.

P EO 3 To inculcate professional and ethical attitude, effective communication skills,


teamwork skills, multidisciplinary approach, entrepreneurial thinking and an
ability to relate Electronics & Communication Engineering with social issues.

P EO 4 To provide students with an academic environment aware of excellence,


leadership, written ethical codes and guidelines, and the self-motivated life-
long learning needed for a successful Electronics & Communication
Engineering professional career.

P EO 5 To prepare students to excel in electronics & communication based industry


and higher education by educating students in Electronics & Communication
Engineering field along with high moral values and knowledge.

(ECE/LAB MANUAL/3EC4-21 EDC LAB) Page 6


Jaipur Engineering college and research centre, Shri Ram ki Nangal, via
Sitapura RIICO Jaipur- 302 022.

Program Outcomes

PO 1 Engineering Knowledge: Apply the knowledge of mathematics, science,


engineering fundamentals, and electronics & communication engineering
specialization to the solution of complex electronics and communication
engineering problems.

PO 2 Problem Analysis: Identify, formulate, research literature, and analyse


complex electronics and communication engineering problems reaching
substantiated conclusions using first principles of mathematics, natural
sciences, and engineering sciences.

PO 3 Design/Development of Solutions: Design solutions for complex electronics


and communication engineering problems and design system components or
processes that meet the specified needs with appropriate consideration for the
public health and safety, and the cultural, societal, and environmental
considerations.

PO 4 Conduct Investigations of Complex Problems: Use research-based


knowledge and research methods including design of electronics and
communication engineering experiments, analysis and interpretation of data,
and synthesis of the information to provide valid conclusions.

PO 5 Modern Tool Usage: Create, select, and apply appropriate techniques,


resources, and modern electronic engineering and IT tools including prediction
and modelling to complex electronics and communication engineering activities
with an understanding of the limitations.

PO 6 The Engineer and Society: Apply reasoning informed by the contextual

(ECE/LAB MANUAL/3EC4-21 EDC LAB) Page 7


Jaipur Engineering college and research centre, Shri Ram ki Nangal, via
Sitapura RIICO Jaipur- 302 022.

knowledge to assess societal, health, safety, legal and cultural issues and the
consequent responsibilities relevant to the professional electronics and
communication engineering practice.

PO 7 Environment and Sustainability: Understand the impact of the professional


electronics and communication engineering solutions in societal and
environmental contexts, and demonstrate the knowledge of, and need for
sustainable development.

PO 8 Ethics: Apply ethical principles and commit to professional ethics and


responsibilities and norms of the electronics and communication engineering
practice.

PO 9 Individual and Team Work: Function effectively as an individual, and as a


member or leader in diverse teams, and in multidisciplinary settings.

PO 10 Communication: Communicate effectively on complex electronics and


communication engineering activities with the engineering community and with
society at large, such as, being able to comprehend and write effective reports
and design documentation, make effective presentations, and give and receive
clear instructions.

PO 11 Project Management and Finance: Demonstrate knowledge and


understanding of the electronics and communication engineering and
management principles and apply these to one’s own work, as a member and
leader in a team, to manage projects and in multidisciplinary environments.

PO 12 Life-Long Learning: Recognize the need for, and have the preparation and
ability to engage in independent and life-long learning in the broadest context
of electronics and communication engineering changes.

(ECE/LAB MANUAL/3EC4-21 EDC LAB) Page 8


Jaipur Engineering college and research centre, Shri Ram ki Nangal, via
Sitapura RIICO Jaipur- 302 022.

Program Specific Outcomes

PS O 1 Ability to develop knowledge for Robotics and its applications.

PS O 2 Ability to apply the concepts of IoT for challenges of Real-World.

(ECE/LAB MANUAL/3EC4-21 EDC LAB) Page 9


Jaipur Engineering college and research centre, Shri Ram ki Nangal, via
Sitapura RIICO Jaipur- 302 022.

Experiment List
S. No. Contents Page No.
1 Study the following devices:
a) Analog & Digital multimeters
b) Function/Signal generators
c) Regulated D. C. power supplies (constant voltage and constant current
operations)
d) Study of analog and digital CRO, measurement of time period,
amplitude, frequency & phase angle using Lissajous figures
2 Plot V-I characteristic of P-N junction diode & calculate cut-in voltage,
reverse Saturation current and static & dynamic resistances
3 Plot the output waveform of half wave rectifier and effect of filters on
waveform. Also calculate its ripple factor
4 Study bridge rectifier and measure the effect of filter network on D.C.
voltage output & ripple factor.
5 Plot and verify output waveforms of different clipper and clamper.
6 Plot V-I characteristic of Zener diode
7 Study of Zener diode as voltage regulator. Observe the effect of load changes
and determine load limits of the voltage regulator
8 Plot input-output characteristics of BJT in CB, CC and CE configurations.
Find their h-parameters
9 Study of different biasing circuits of BJT amplifier and calculate its Q point.
10 Plot frequency response of two stage RC coupled amplifier & calculate its
bandwidth.
11 Plot input-output characteristics of field effect transistor and measure I dss and
Vp
12 Plot frequency response curve for FET amplifier and calculate its gain
bandwidth product.

(ECE/LAB MANUAL/3EC4-21 EDC LAB) Page 10


Jaipur Engineering college and research centre, Shri Ram ki Nangal, via
Sitapura RIICO Jaipur- 302 022.

Course Outcome

Subject: Electronics Devices Lab Code: 3EC4-21


CO-1 Understand the characteristics of different Electronic Devices.

CO-2 Verify the rectifier circuits using diodes and implement them using hardware.
Design various amplifiers like CE, CC, common source amplifiers and implement
CO-3
them using hardware and also observe their frequency responses.
Understand the construction, operation and characteristics of JFET and MOSFET,
CO-4
which can be used in the design of amplifiers.
Understand the need and requirements to obtain frequency response from a
CO-5 transistor so that Design of RF amplifiers and other high frequency amplifiers is
feasible.

CO/PO-PSO mapping

Program Outcomes (PO’s)


Subject
CO’s
Code PO- PO- PO- PO- PO- PO- PO- PO- PO- PO- PO- PO-
1 2 3 4 5 6 7 8 9 10 11 12
3EC4-21 CO-1 3 2 3 3 2 1 - 2 3 1 1 3

CO-2 3 2 3 3 2 1 - 2 3 2 1 2

CO-3 3 2 3 3 2 1 - 2 3 2 1 2

CO-4 3 2 3 2 2 1 - 2 3 2 1 1

CO-5 3 2 3 3 2 1 - 2 3 2 1 2

(ECE/LAB MANUAL/3EC4-21 EDC LAB) Page 11


Jaipur Engineering college and research centre, Shri Ram ki Nangal, via
Sitapura RIICO Jaipur- 302 022.

LAB-MANUAL
(II Year III SEM ECE)

Lab Name : Electronics Devices Lab

Lab Code : 3EC4-21

Branch : Electronics & Communication Engineering

CO1 :- Understanding the characteristics of Electronics Devices (Instruments).

Experiment Object:-
Study the following devices: (a) Analog& digital multimeters (b) Function/ Signal generators
(c) Regulated d. c. power supplies (constant voltage and constant current operations) (d) Study
of analog and digital CRO, measurement of time period, amplitude, frequency & phase angle
using Lissajous figures

Jaipur Engineering College and Research Centre


Shri Ram ki Nangal, via Sitapura RIICO
Tonk Road, Jaipur-302 022, Rajasthan

(ECE/LAB MANUAL/3EC4-21 EDC LAB) Page 12


Jaipur Engineering college and research centre, Shri Ram ki Nangal, via
Sitapura RIICO Jaipur- 302 022.

EXPERIMENT NO:-1
Object:- Study the following devices: (a) Analog& digital multimeters (b) Function/ Signal
generators (c) Regulated d. c. power supplies (constant voltage and constant current
operations) (d) Study of analog and digital CRO, measurement of time period, amplitude,
frequency & phase angle using Lissajous figures

Equipments Required:-

S No. Equipment Range Quantity

1. Power supply (0 to 30) Volt 1

2. CRO 30MHz 1

3. Function 3 MHz 1
Generator

4. Multimeter --- 1

5. connecting wires --- ---

Theory:

1.1 Regulated Power Supply

Power supplies (Fig. 1.1) provided by a regulated DC voltage facilitates fine and coarse adjustments and

monitoring facilities for voltage and current. They will work in constant voltage and current mode

depending on current limit and output load. The current limit has good stability, load and line regulations.

(ECE/LAB MANUAL/3EC4-21 EDC LAB) Page 13


Jaipur Engineering college and research centre, Shri Ram ki Nangal, via
Sitapura RIICO Jaipur- 302 022.

Outputs are protected against overload and short circuit damages. They are available in single and dual

channel models with different voltage and current capacities. Overload protection circuit of constant self

restoring type is provided to prevent the unit as well as the circuit under use. The power supplies are

specially designed and developed for well regulated DC output. These are useful for high regulation

laboratory power supplies, particularly suitable for experimental setup and circuit development in R&D.

Fig.1.1 Front Panel of Power Supply

(ECE/LAB MANUAL/3EC4-21 EDC LAB) Page 14


Jaipur Engineering college and research centre, Shri Ram ki Nangal, via
Sitapura RIICO Jaipur- 302 022.

1.2 Function Generator

Fig.1.2 Front panel of Function Generator

Designation Specifications
Wave form Sine, squares, triangles, TTL square waves
Amplitude 0-20V for all the functions.
Sine distortion Less than 1% from 0.1 HZ to 100 HZ harmonics.
Modulation showed down fundamental for 100K

(ECE/LAB MANUAL/3EC4-21 EDC LAB) Page 15


Jaipur Engineering college and research centre, Shri Ram ki Nangal, via
Sitapura RIICO Jaipur- 302 022.

Offset Continuously variable 10V


Frequency range 0.1 HZ to 1ΜHz in ranges.
Output impedance 600 ohms, 5%
Square wave duty cycle 49% to 51%.
Differential linearity 0.5%

Range selectors: Decode frequency by multiplying the range selected with the frequency indicated by dial
gives the output frequency, which applies for all functions.

Function selectors: Selected desired output wave form which appears at 600Ω output.

VCO input: An external input will vary the output frequency. The change in frequency is directly
proportional to input voltage.

TTL output: A TTL square wave is available at this jack. The frequency is determined by the range
selected and the setting of frequency dial. This output is independent of amplitude and D.C OFFSET
controls.

Amplitude control: Control the amplitude of the output signal, which appears at 600ohms.

OFFSET control: Control the DC offset of the output. It is continuously variable for ±5V, ±100V.

Fine frequency dial: Multiplying the setting of this dial to the frequency range selected gives the output
frequency of the wave forms at the 600ohms.

1.3 Multimeter:-

Digital Multimeter

(ECE/LAB MANUAL/3EC4-21 EDC LAB) Page 16


Jaipur Engineering college and research centre, Shri Ram ki Nangal, via
Sitapura RIICO Jaipur- 302 022.

A multimeter is a versatile instrument and is also called Volt-Ohm- multimeter (VOM). It is used to
measure the d.c and a.c voltages and resistance values. A digital multimeter essentially consists of an
analog to digital converters. It converts analog values in the input to an equivalent binary form. These
values are processed by digital circuits to be shown on the visual display with decimal values. The liquid
crystal display system is generally employed. Actually all the functions in DMM depends on the voltage
measurements by the converter and comparator circuits

Fig.1.3 Digital Multimeter

(ECE/LAB MANUAL/3EC4-21 EDC LAB) Page 17


Jaipur Engineering college and research centre, Shri Ram ki Nangal, via
Sitapura RIICO Jaipur- 302 022.

1.4 CRO (Cathode Ray Oscilloscope):-

C.R.O is a versatile instrument used for display of wave forms and is a fast x-y plotter. The heart of
C.R.O is and the rest is the circuitry to operate C.R.O

The main parts are:

1. Electron gun: - It is used to produce sharply focused beam of electron accelerated to very high velocity.

2. Deflection system: - It deflects the electron both in horizontal and vertical plan.

3. Florescent screen:- The screen which produces spot of visible light. When beam of electrons are
incident on it the other side of tube is coated with phosphorus material.

Fig.1.4 Cathode Ray Oscilloscope

Front Panel:

ON-POWER: toggle switch for switching on power.

(ECE/LAB MANUAL/3EC4-21 EDC LAB) Page 18


Jaipur Engineering college and research centre, Shri Ram ki Nangal, via
Sitapura RIICO Jaipur- 302 022.

INTENCITY: controls trace intensity from zero to maximum.

FOCUS: It controls sharpness of trace a slight adjustment of focus is done after changing intensity of
trace.

AC-DC: GROUND: It selects coupling of AC-DC ground signal to vertical amplifier.

X-MAG: It expands length of time base from 1-5 times continuously and to maximum time base to 40
ns/cm.

SQUARE: This provides square wave 2 V (P-P) amplitude and enables to check y calibration of scope.

SAWTOOTH WAVE FORM:

This provides saw tooth wave form output coincident to sweep speed with an output of saw tooth wave (p-
p)

VERTICAL SECTION: y position:

This enables movement of display along y-axis.

Y-INPUT: It connects input signal to vertical amplifier through AC-DC ground coupling switch

CALIBRATION: 15mv – 150mv dc signal depending on position selection is applied to vertical


amplifier.

DC BALANCE: It is control on panel electro-statically in accordance with waveforms to be displayed.

VOLTS/CM: Switch adjusts sensitivity.

(ECE/LAB MANUAL/3EC4-21 EDC LAB) Page 19


Jaipur Engineering college and research centre, Shri Ram ki Nangal, via
Sitapura RIICO Jaipur- 302 022.

HORIZANTAL SECTION: X-POSITION: This control enables movement of display along x-axis.

TRIGGERING LEVEL: It selects mode of triggering.

TIMEBASE: This controls or selects sweep speeds.

VERNUIS: This control the fine adjustments associated with time base sweep.

SIGN SELECTOR: It selects different options of INT/EXT, NORM/TO.

STAB: Present on panel

EXITCAD: It allows time base range to be extended.

HORIZANTAL INPUT: It connects external signal to horizontal amplifier.

Ext SYN: it connects external signal to trigger circuit for synchronization.

OBSERVATIONS:-

Sinusoidal /Triangular waveform

Function generator (Input) CRO (Output)


S.No Voltage Frequency Voltage (Volt) Frequency(Hz)
(Volt) (Hz) No. of (Volts/div) Voltage No. of Time/div Time f=1/T
vertical (B) (Volt) horizontal D (T) =
divisions divisions (C ) C*D
(A ) =A*B

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Jaipur Engineering college and research centre, Shri Ram ki Nangal, via
Sitapura RIICO Jaipur- 302 022.

1 1.2 V 1.1 KHz 1.2 1 1.2 V 1 1 mSec 1 1


mSec KHz
2
3
4
5
6
7

Amplitude = (No. of vertical divisions)* (Volts/div)

Time period = (No. of horizontal divisions) * (Time/div)

Amplitude taken on vertical section (y).

Time period taken on horizontal section(x)

Model Wave Forms:

(ECE/LAB MANUAL/3EC4-21 EDC LAB) Page 21


Jaipur Engineering college and research centre, Shri Ram ki Nangal, via
Sitapura RIICO Jaipur- 302 022.

Fig.1.5 Wave form on CRO

Applications of CRO:

1. Measurement of current
2. Measurement of voltage
3. Measurement of power
4. Measurement of frequency
5. Measurement of phase angle
6. To see transistor curves
7. To trace and measuring signals of RF, IF and AF in radio and TV.
8. To trace visual display of sine waves.

Expected Output: The experiment should result in display of given input waveform (sine, square,
triangular wave etc) on CRT screen. The frequency, phase and amplitude are the desirable quantities from
the given experiment.

Viva Question:-

(ECE/LAB MANUAL/3EC4-21 EDC LAB) Page 22


Jaipur Engineering college and research centre, Shri Ram ki Nangal, via
Sitapura RIICO Jaipur- 302 022.

1. What is CRO?
2. Show the different component pattern on CRO?
3. Between which quantities CRO graph is represented?
4. How can you measure the AC and DC voltage and current on multimeter.
5. What is different part of CRT?
6. What is the method of focusing used in CRO?
7. How many types of sweeps used in CRO?
8. What are sources of synchronization?
9. What is function generator?
10. Difference between the digital and analog millimeter.
11. Explain the use of db in function generator.
12. What is the voltage range of function generator?
13. How we calculate the frequency in CRO?
14. How we calculate the Amplitude in CRO?
15. What is the frequency of DC wave?

(ECE/LAB MANUAL/3EC4-21 EDC LAB) Page 23


Jaipur Engineering college and research centre, Shri Ram ki Nangal, via
Sitapura RIICO Jaipur- 302 022.

LAB-MANUAL
(II Year III SEM ECE)

Lab Name : Electronics Devices Lab

Lab Code : 3EC4-21

Branch : Electronics & Communication Engineering

CO1 :- Understand the characteristics of different Electronic Devices

Experiment Object:-
Plot V-I characteristic of P-N junction diode & calculate cut-in voltage, reverse
Saturation current and static & dynamic resistances.

Jaipur Engineering College and Research Centre


Shri Ram ki Nangal, via Sitapura RIICO
Tonk Road, Jaipur-302 022, Rajasthan

(ECE/LAB MANUAL/3EC4-21 EDC LAB) Page 24


Jaipur Engineering college and research centre, Shri Ram ki Nangal, via
Sitapura RIICO Jaipur- 302 022.

EXPERIMENT NO:-2
Object:- Plot V-I characteristic of P-N junction diode & calculate cut-in voltage, reverse
Saturation current and static & dynamic resistances .

Apparatus Required:-

S No. Equipment Range Quantity


1 Power supply (0 to 30) Volt 1
2 P-N Diode IN4007. ---- 1
3 Resistor 1KΩ 1
4 Ammeters (0-100 mA, 0-500µA) 1
5 Voltmeter (0-20 V,0-1V) 1
6 connecting wires ----- -------

Theory:-
A p-n junction diode conducts only in one direction. The V-I characteristics of the diode
are curve between voltage across the diode and current through the diode. When external voltage is zero,
circuit is open and the potential barrier does not allow the current to flow. Therefore, the circuit current is
zero. When P-type (Anode is connected to +ve terminal and n- type (cathode) is connected to –ve terminal
of the supply voltage, is known as forward bias. The potential barrier is reduced when diode is in the
forward biased condition. At some forward voltage, the potential barrier altogether eliminated and current
starts flowing through the diode and also in the circuit. The diode is said to be in ON state. The current
increases with increasing forward voltage. When N-type (cathode) is connected to +ve terminal and P-type
(Anode) is connected –ve terminal of the supply voltage is known as reverse bias and the potential barrier
across the junction increases. Therefore, the junction resistance becomes very igh and a very small current

(ECE/LAB MANUAL/3EC4-21 EDC LAB) Page 25


Jaipur Engineering college and research centre, Shri Ram ki Nangal, via
Sitapura RIICO Jaipur- 302 022.

(reverse saturation current) flows in the circuit. The diode is said to be in OFF state. The reverse bias
current flows due to minority charge carriers.

Circuit Diagram:-
Forward Bias:-

Fig.2.1 Forward Bias Characteristics

Reverse Bias:-

Fig.2.2 Reverse Bias Characteristics


Expected Waveform:-

(ECE/LAB MANUAL/3EC4-21 EDC LAB) Page 26


Jaipur Engineering college and research centre, Shri Ram ki Nangal, via
Sitapura RIICO Jaipur- 302 022.

Fig.2.3 V-I characteristic of PN diode

Procedure:-
Forward Bias:-

1. Connections are made as per the circuit diagram.


2. For forward bias, the RPS +ve is connected to the anode of the diode and
RPS –ve is connected to the cathode of the diode,
3. Switch on the power supply and increases the input voltage (supply voltage) in steps.
4. Note down the corresponding current flowing through the diode and voltage across the diode for each
and every step of the input voltage.
5. The reading of voltage and current are tabulated.
6. Graph is plotted between voltage and current.

Observation:-

S.No Applied voltage (V) Voltage across diode Current through diode
(volt) (mA)

(ECE/LAB MANUAL/3EC4-21 EDC LAB) Page 27


Jaipur Engineering college and research centre, Shri Ram ki Nangal, via
Sitapura RIICO Jaipur- 302 022.

Table 2.1

Procedure:-
Reverse Bias:-
1. Connections are made as per the circuit diagram
2 . For reverse bias, the RPS +ve is connected to the cathode of the diode and
RPS –ve is connected to the anode of the diode.
3. Switch on the power supply and increase the input voltage (supply voltage) in steps.
4. Note down the corresponding current flowing through the diode voltage across the diode for each and
every step of the input voltage.
5. The readings of voltage and current are tabulated.
6. Graph is plotted between voltage and current.

(ECE/LAB MANUAL/3EC4-21 EDC LAB) Page 28


Jaipur Engineering college and research centre, Shri Ram ki Nangal, via
Sitapura RIICO Jaipur- 302 022.

Observation:-
S.No Applied voltage (V) Voltage across diode Current through diode
(volt) (µA)

Table2.2

Precautions:-
1. All the connections should be correct.
2. Parallax error should be avoided while taking the readings from the Analog meters.

Expected Output : - A plot of forward and reverse bias characteristics for a p-n junction diode, finding
the cut in voltage (~0 .3 V), reverse saturation current ( ~ micro amp), static resistance (< 100 Ohm) &
dynamic resistances (< 50 Ohms).

(ECE/LAB MANUAL/3EC4-21 EDC LAB) Page 29


Jaipur Engineering college and research centre, Shri Ram ki Nangal, via
Sitapura RIICO Jaipur- 302 022.

Viva Questions:-
1. Define depletion region of a diode?
2. What is meant by transition & space charge capacitance of a diode?
3. Is the V-I relationship of a diode Linear or Exponential?
4. Define cut-in voltage of a diode and specify the values for Si and Ge diodes?
5. What are the applications of a p-n diode?
6. Draw the ideal characteristics of P-N junction diode?
7. What is the diode equation?
8. What is PIV?
9. What is the break down voltage?
10. What is the effect of temperature on PN junction diodes?
11. What is the typical conduction voltage for a silicon diode?
12. What would be a typical magnitude for the reverse current in general purpose silicon diode?
13. What is diode current?
14. Difference between static &dynamic resistance?
15. What are drawbacks of reverse saturation current?

(ECE/LAB MANUAL/3EC4-21 EDC LAB) Page 30


Jaipur Engineering college and research centre, Shri Ram ki Nangal, via
Sitapura RIICO Jaipur- 302 022.

LAB-MANUAL
(II Year III SEM ECE)

Lab Name : Electronics Devices Lab

Lab Code : 3EC4-21

Branch : Electronics & Communication Engineering

CO2 :- Verify the rectifier circuits using diodes and implement them using hardware.

Experiment Object:-
Plot the output waveform of half wave rectifier and effect of filters on waveform. Also calculate its
ripple factor

Jaipur Engineering College and Research Centre


Shri Ram ki Nangal, via Sitapura RIICO
Tonk Road, Jaipur-302 022, Rajasthan

(ECE/LAB MANUAL/3EC4-21 EDC LAB) Page 31


Jaipur Engineering college and research centre, Shri Ram ki Nangal, via
Sitapura RIICO Jaipur- 302 022.

EXPERIMENT NO:-3
Object: Plot the output waveform of half wave rectifier and effect of filters on waveform. Also calculate
its ripple factor.

Apparatus Required:-

S.No. Apparatus Specification Quantity

1. Diode 1N 4007 1

2. Transformer (6-0-6) V 1

2. Capacitor 100 μF 1

3 Resistor 1KΩ 1

4. Connecting --- 10
wires

Theory: -

During positive half-cycle of the input voltage, the diode D1 is in forward bias and conducts through the
load resistor R1. Hence the current produces an output voltage across the load resistor R1, which has the same shape
as the +ve half cycle of the input voltage. During the negative half-cycle of the input voltage, the diode is reverse
biased and there is no current through the circuit. i.e, the voltage across R1 is zero. The net result is that only the +ve
half cycle of the input voltage appears across the load. The average value of the half wave rectified o/p voltage is the
value measured on dc voltmeter. For practical circuits, transformer coupling is usually provided for two reasons.

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Sitapura RIICO Jaipur- 302 022.

1. The voltage can be stepped-up or stepped-down, as needed.

2. The ac source is electrically isolated from the rectifier. Thus preventing shock hazards in the secondary
circuit.

Circuit Diagram:-

Fig.3.1 Circuit Diagram of Half Wave Rectifier

Procedure:-

1. Connections are made as per the circuit diagram.

2. Connect the primary side of the transformer to ac mains and the secondary side to the rectifier input.

3. By the multimeter, measure the ac input voltage of the rectifier and, ac and dc voltage at the output of the
rectifier.

4. Find the theoretical dc voltage by using the formula,

Vdc=Vm/π
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Where, Vm = 2 Vrms where Vrms= rms output ac voltage.)

The Ripple factor is calculated by using the formula

γ = (AC output voltage)/(DC output voltage)

Theoretical calculations for Ripple factor:-

Without Filter:-

Vrms=Vm/2

Vm=2Vrms

Vdc=Vm/π

Ripple factor γ = √ (Vrms/ Vdc )2 -1 =1.21

With Filter:-

Ripple factor, γ =1/ (2√3 f C R)

Where f =50 Hz

C =100 µF

RL=1 KΩ

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Practical Calculations:-
Vac = ---------------------

Vdc = ---------------------
Ripple factor without Filter =
Ripple factor with Filter =

Observations:-
Without Filter

USING S.No. Vac(volt) Vdc(volt) γ = Vac/ Vdc


DMM

Table.3.1

With Filter:

USING S.No. Vac(volt) Vdc(volt) γ = Vac/ Vdc


DMM
1

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Table.3.2

Without filter:-

Vdc = Vm/π, Vrms = Vm/2, Vac = √ ( Vrms2- Vdc 2)

Vm(V) Vac (V) Vdc (v) γ = Vac/ Vdc

USING
CRO

Table 3.3

Precautions:

1. The primary and secondary sides of the transformer should be carefully identified.
2. The polarities of the diode should be carefully identified.

Expected Outcome:-
The half wave rectified output waveform with the ripple factor of ~1.21 is expected (without filter). The
introduction of filters will reduce the ripple factor depending on the components chosen.

Viva Questions:

1. What is the efficiency of half wave rectifier?

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2. What is the rectifier?


3. What is the difference between the half wave rectifier and full wave Rectifier?
4. What is the o/p frequency of Bridge Rectifier?
5. What are the ripples?
6. What is the function of the filters?
7. What is TUF?
8. What is the average value of o/p voltage for HWR?
9. What is the peak factor?
10. If the ac supply is 60 Hz, what will be the ripple frequency of output the half wave rectifier?
11. A silicon diode in a half wave rectifier has a barrier potential of 0.7 V. What is the effect of this?
12. What is the VRRM for the IN4001rectifier diode?
13. An open circuit can have any voltage across its terminals then what will the current?

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LAB-MANUAL
(II Year III SEM ECE)

Lab Name : Electronics Devices Lab

Lab Code : 3EC4-21

Branch : Electronics & Communication Engineering

CO2 :- Verify the rectifier circuits using diodes and implement them using hardware.

Experiment Object:-
Study bridge rectifier and measure the effect of filter network on D.C. voltage output & ripple
factor.

Jaipur Engineering College and Research Centre


Shri Ram ki Nangal, via Sitapura RIICO
Tonk Road, Jaipur-302 022, Rajasthan

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EXPERIMENT NO:-4

Object: - Study bridge rectifier and measure the effect of filter network on D.C. voltage output & ripple
factor.

Apparatus Required:-

S.No. Apparatus Specification Quantity

1. Diode 1N 4007 4

2. Transformer (6-0-6). 1

2. Capacitor 100μf 1

Resistor 1KΩ 1

3. Connecting -
wires

THEORY:-

The bridge rectifier is also a full-wave rectifier in which four p-n diodes are connected in the form of a
bridge fashion. The Bridge rectifier has high efficiency when compared to half-wave rectifier. During every half
cycle of the input, only two diodes will be conducting while other two diodes are in reverse bias.

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Circuit Diagram:-

Fig.4.1 Circuit Diagram of Full Wave Rectifier

Procedure:-

1. Connections are made as per the circuit diagram.

2. Connect the ac main to the primary side of the transformer and secondary side to the bridge rectifier.

3. Measure the ac voltage at the input of the rectifier using the multi meter.

4. Measure both the ac and dc voltages at the output of the Bridge rectifier.

5. Find the theoretical value of dc voltage by using the formula,

Calculations:-

Theoretical calculations:-

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Vrms = Vm/ √2

Vm =Vrms/√2

Vdc=2Vm/π

(i)Without filter:

Ripple factor, γ = √ ( Vrms/ Vdc )2 -1 = 0.482

(ii)With filter:

Ripple factor ,γ = 1/ (4√3 f C RL) where f =50Hz , C =100µF RL=1KΩ

Observations:-

Without Filter

USING DMM S.No Vac(v) Vdc(v) γ= Vac/ Vdc

Table.4.1

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With Filter

USING DMM Vac(v) Vdc(v) r= Vac/ Vdc

Fig.4.2

Without Filter:-

Vrms = Vm/ √2 , Vdc=2Vm/π , Vac=√( Vrms2- Vdc 2)

Vm(v) Vac(v) Vdc(v) γ= Vac/ Vdc

USING CRO

Table.4.3

With Filter:-

V1(V) V2(V) Vdc= Vac= γ=


(V1+V2)/2
USINGCRO (V1- V2)/2√3 Vac/
Vdc

Table.4.4

Waveform:-

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Fig.4.2

Practical Calculations:-

Without filter:-

Vac= -------------------------------

Vdc= -------------------------------

Ripple factor, γ=Vac/Vdc

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With filters:-

Vac= ------------------------

Vdc= -------------------------

Ripple factor,γ=Vac/Vdc

Precautions:-

1. The voltage applied should not exceed in the ratings of the diode

2. The diodes will be connected correctly

Expected Outcome:-
The full wave rectified output waveform with the ripple factor of ~0.81 is expected (without filter). The
introduction of filters will reduce the ripple factor depending on the components chosen.

Viva questions:-

1. What is the PIV of Bridge rectifier?

2. What is the efficiency of Bridge rectifier?

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3. What are the advantages of Bridge rectifier?

4. What is the difference between the Bridge rectifier and full wave rectifier?

5. What is the o/p frequency of Bridge Rectifier?

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LAB-MANUAL
(II Year III SEM ECE)

Lab Name : Electronics Devices Lab

Lab Code : 3EC4-21

Branch : Electronics & Communication Engineering

CO2 :- Verify the rectifier circuits using diodes and implement them using hardware.

Experiment Object:-
Plot and verify output waveforms of different clipper and clamper.

Jaipur Engineering College and Research Centre


Shri Ram ki Nangal, via Sitapura RIICO
Tonk Road, Jaipur-302 022, Rajasthan

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EXPERIMENT NO:-5

Object: - Plot and verify output waveforms of different clipper and clamper.

Components Required:

S.No. Component Value Quantity

1. Regulated power supply (0-30 V) 1

2. Diode 1N3020 (10 V) 1

4. Resistor 100 k, 1 k 1

5. Signal generator 1 MHz 5

6. Connecting wire - -

7. CRO 20 MHz 1

8. Capacitor 1 µF 1

Theory:-
Clipper circuits have the ability to “clip” off a portion of the input signal without distorting the remaining
part of the alternating waveform. The half wave rectifier of the previous experiment is an example of the
simplest form of diode clipper. Depending on the orientation of thy diode, the positive or negative region
of the input signal is “clipped” off. There are two general categories of clippers: series and parallel. The
series c configuration is defined as one where the diode is in series with the load, while the parallel variety
has the diode in branch parallel to the load. Clippers are useful for protecting circuits from exceeding
various voltages (either positive or negative).

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Clippers clip off a portion of the input signal without distorting the remaining part of the waveform. In the positive
clipper shown below the input waveform above Vref is clipped off. If Vref = 0V, the entire positive half of the input
waveform is clipped off.

Plot of input Vi (along X-axis) versus output Vo (along Y-axis) called transfer Characteristics of the circuit can also
be used to study the working of the clippers.

For stiff clipper: 100RB < RS< 0.01RL, Where RB is bulk resistance of the diode. For diode IN914, value of RB is
30Ω.Series resistor RS must be 100times greater than bulk resistance R B and 100 times smaller than load resistance
RL.If RB=30 Ω select RS=1k Ω and RL=100k Ω .

Fig.5.1 circuit diagram and characteristics of positive clipper

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Procedure:

1. Before making the connections check all components using multimeter.

2. Make the connections as shown in circuit diagram.

3. Using a signal generator (Vi) apply a sine wave of 1KHz frequency and a peak-to peak amplitude of 10V to the
circuit. (Square wave can also be applied.)

4. Keep the CRO in dual mode; connect the input (Vi) signal to channel 1 and output waveform (Vo) to channel 2.
Observe the clipped output waveform which is as shown in fig 5.2. Also record the amplitude and time data from
the waveforms.

5. Now keep the CRO in X-Y mode and observe the transfer characteristic waveform.

Waveforms

Fig.5.2 Input and output waveform for positive Clipper

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Double Ended Clipper:-

Double ended clipper Circuit Transfer Characteristics

Fig.5.3

Apply Vi = 10 Vpp at 1kHz

V1= 2V

V2= -2V

Wave Forms

Fig.5.4 Input and output waveform for double-ended clipping circuit

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The clamping network is one that will “clamp” a signal to a different DC level. The network must have a capacitor, a
diode and a resistive element, but it can also employ an independent DC supply (Vref) to introduce an additional
shift. The magnitude of R and C must be chosen such that time constant τ = RLC is large enough to ensure the
voltage across capacitor does not discharge significantly during the interval of the diode is non-conducting.

Design:

For proper clamping, τ >100T where T is the time period of input waveform

If frequency is 1 kHz with peak-peak input voltage of 10V, T=1ms

τ = RL.C=100×T = 100ms

Let C=1μF

RL= 100×103 =100kΩ

Select C =1uF and RL =100 kΩ

Fig.5.5 Positive Clamper

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Procedure:

1. Before making the connections check all components using multimeter.

2. Make the connections as shown in circuit diagram

3. Using a signal generator apply a square wave input (Vi) of peak-to-peak amplitude of 10V (and frequency greater
than 50Hz) to the circuit.

4. Observe the clamped output waveform on CRO which is as shown in Fig.

Fig.6.6 Input and output waveform for positive clamper without reference voltage

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Fig.5.6 Input and output waveform for positive clamper circuit with reference voltage = 2V

Result:

Output voltage V0 =__________ during positive half cycle

=__________ during negative half cycle

With Vref =0, output voltage V0=_________

With Vref =2, output voltage V0=_________

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Expected outcome:

The clipper will prevent the output signal from exceeding the preset voltage limits set
by applying the dc voltage.

The clamper will insert the DC voltage

Viva Questions:-

1. What is clamper?
2. What does positive clamper do and how?
3. What does negative clamper?
4. Why clamper circuit is also known as DC restorer circuit?
5. What is the position of diode in positive and negative half cycle of positive clamper?
6. What is biased clamper?
7. What is the output voltage of the positive and negative half cycle of positive clamper?
8. What is the output voltage of the positive and negative half cycle of negative clamper?
9. What are the applications of clamper circuits?
10. What is Clipper?
11. What is biased clipper?
12. What does positive clipper do and how?
13. What does negative clipper?
14. What type of diode circuit is used to clip off potions of signal voltage above or below certain
levels?
15. What type of diode circuit is used to add or restore a dc level to an electrical signal?

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LAB-MANUAL
(II Year III SEM ECE)

Lab Name : Electronics Devices Lab

Lab Code : 3EC4-21

Branch : Electronics & Communication Engineering

CO1 :- Understand the characteristics of different Electronic Devices.

Experiment Object:-
Plot V-I characteristic of zener diode

Jaipur Engineering College and Research Centre


Shri Ram ki Nangal, via Sitapura RIICO
Tonk Road, Jaipur-302 022, Rajasthan

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EXPERIMENT NO:-6

Object: - Plot V-I characteristic of zener diode

Apparatus: -

S No. Equipment Range Quantity


1 Power supply (0 to 30) v 1
2 Zener diode. ----- 1
3 Resistor 1KΩ 1
4 Ammeters (0-100 mA, 0-50µA) 1
5 Voltmeter (0-20 V,0-1V) 1
6 connecting ----- 10
wires

Circuit Diagram:-

Input Characteristics:-

Fig.6.1 forward Bias Chacteristics

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Output Characteristics:-

Fig.6.2 Reverse Bias characteristics

Theory:-
A zener diode is heavily doped p-n junction diode, specially made to operate in the break
down region. A p-n junction diode normally does not conduct when reverse biased. But if the reverse bias
is increased, at a particular voltage it starts conducting heavily. This voltage is called Break down
Voltage. High current through the diode can permanently damage the device.To avoid high current, we
connect a resistor in series with zener diode. Once the diode starts conducting it maintains almost
constant voltage across the terminals what ever may be the current through it, i.e., it has very low
dynamic resistance. It is used in voltage regulators.

Procedure:-

Input characteristics:-

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1. Connections are made as per the circuit diagram.


2. The Regulated power supply voltage is increased in steps.
3. The zener current (lz), and the zener voltage (Vz.) are observed and then
noted in the tabular form.
4. A graph is plotted between zener current (Iz) and zener voltage (Vz).

Observations:-

Input characteristics:-

S.No Input Voltage Current (mA)


(Volt)
1

Table 6.1

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Procedure:-

Output characteristics:-
1. Connections are made as per the circuit diagram.
2. The Regulated power supply voltage is increased in steps.
3. The zener current (lz), and the zener voltage (Vz.) are observed and then noted in the tabular form.
4. A graph is plotted between zener current (Iz) and zener voltage (Vz).

Observations:-

Output characteristics:-

S.No Zener Voltage Zener current(iz)

Table 6.2

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Expected Waveforms:-

Fig.6.3 V-I characteristic of zener diode

Precautions:-
1. The terminals of the zener diode should be properly identified
2. While determined the load regulation, load should not be immediately shorted.
3. Should be ensured that the applied voltages & currents do not exceed the ratings of the diode.
Expected Result:-
a) Static characteristics of zener diode are obtained and drawn.
b) Breakdown Voltage should range 13 to 20 Volts .

Viva questions:-
1. What type of temp? Coefficient does the zener diode have?
2. If the impurity concentration is increased, how the depletion width effected?
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3. Does the dynamic impendence of a zener diode vary?


4. Explain briefly about avalanche and zener breakdowns?
5. Draw the zener equivalent circuit?
6. Differentiate between line regulation & load regulation?
7. In which region zener diode can be used as a regulator?
8. How the breakdown voltage of a particular diode can be controlled?
9. What are the difference between Avalanche and Zener breakdown?
10. By what type of charge carriers the current flows in zener and avalanche breakdown diodes?
11. Draw the V-I characteristic of zener diode?
12. Draw the symbol of zener diode?
13. Difference between zener diode and PN diode?
14. Doping level of zener diode is high or low?
15. The zener effect is valid approximately voltage level?

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LAB-MANUAL
(II Year III SEM ECE)

Lab Name : Electronics Devices Lab

Lab Code : 3EC4-21

Branch : Electronics & Communication Engineering

CO1 :- Understand the characteristics of different Electronic Devices.


CO2 : Verify the rectifier circuits using diodes and implement them using hardware.

Experiment Object:-
Study of Zener diode as voltage regulator. Observe the effect of load changes and determine load limits of the
voltage regulator

Jaipur Engineering College and Research Centre


Shri Ram ki Nangal, via Sitapura RIICO
Tonk Road, Jaipur-302 022, Rajasthan

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Sitapura RIICO Jaipur- 302 022.

EXPERIMENT NO:-7

Object: - Study of Zener diode as voltage regulator. Observe the effect of load changes and determine load limits
of the voltage regulator

Equipment Required:

S No. Equipment Range Quantity

1. Power supply (0 to 30) v 1

2. Voltmeter (0 to 20) v 1

3 Shunt voltage 1
regulator

Theory:
Regulator is a circuit, which maintains the terminal voltage constant even if input voltage varies or load current is
varying.

2.1 Shunt regulator: The simplest form of voltage regulator uses a zener diode. This circuit gives more or
less constant voltage irrespective of change in input voltage and load current. The unregulated voltage Vi is
applied to the series current limiting resistor Rs and the regulated output is taken across zener diode. A
zener diode is in parallel with load, it is known as shunt regulator.

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2.2 Series regulator: A low power zener diode is employed in simple regulator circuit, then the load current is
limited by the maximum load current. In series voltage regulator, output is continuously sampled and then compared
with a reference voltage any variation in the output is amplified and then fed to base of pass transistor. Negative
feedback is used in this circuit.

2.3 Load regulating is the change in output voltage for a given change in load current (for example:
"typically 15mV, maximum 100mV for load currents between 5mA and 1.4A, at some specified
temperature and input voltage").

2.4 line regulation or input regulation is the degree to which output voltage changes with input (supply)
voltage changes - as a ratio of output to input change (for example "typically 13mV/V"), or the output
voltage change over the entire specified input voltage range (for example "plus or minus 2% for input
voltages between 90V and 260V, 50-60Hz").

Circuit diagram:

Shunt regulator:

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RS
+
+
560E
+

D1 Vz

Unregulated Power -
Q1
Supply RL Vo
SL100 +
Q2 Vbe2
- R1
SL100 + 1k
Vbe1
-

- -

Fig 7.1 circuit diagram of Shunt voltage regulator

Series regulator:

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560.0 T1 !NPN
1.0k

Vout

Z1 BZD27-C5V1
+

1.0k
V
10 30v
Vin 1.0

Fig 7.2 circuit diagram of Series voltage regulator

Procedure:

Line regulation-

1) Connect the circuit as per the circuit diagram.


2) Connect the load resistance of higher wattage (say 1K /1W).
3) Vary the input DC supply in a regular step.
4) Note down the corresponding output voltage using a voltmeter.
Load regulation-

1) For the same circuit shown, fix the input dc supply voltage, more than the regulating value.
2) Replace the fixed resistance by resistors of 1K, 5K, 10K one by one.
3) Vary the load in regular steps.
4) Note down the corresponding output voltage across each load using voltmeter.

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Observation:

Shunt Regulator (line regulation)

S No. Input voltage (Vi) (v) Output voltage Vo (v)

Table 7.1

Shunt Regulator (load regulation) :

S No. Load resistance RL ( ) Output voltage (Vo) (v)

Table 7.2

Series Regulation (line regulation) :

S No. Input voltage (Vi) (v) Output voltage Vo (v)

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Table 7.3

Series Regulation (load regulation):


S No. Load resistance RL ( ) Output voltage (Vo) (volt)

Table 7.4

Precautions:
1) Connections on the breadboard should be tight.
2) Components should not touch each other.
3) Note down the reading carefully.
4) Connections should be neat and tight.
Calculation

Voltage regulation = (VNL-VFL)/VFL

Expected output :

Voltage regulator supply having good voltage regulation shows the ability of that power supply to provide
constant output voltage irrespective of change of input voltage, change in load current and temperature.

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Viva Quiz:
1. Define voltage regulator.
2. Give the advantages of series voltage regulator. .
3. Explain the feedback mechanism in series voltage regulator.
4. In series voltage regulator which is control element and explain its function.
5. Define load and line regulation. What is ideal value?
6. Which element determines output ripple?
7. What determines maximum load current allowed in this circuit?
8. Mention the applications of series voltage regulator.
9. Define no load voltage and full load voltage.
10. Explain the term percentage regulation.
11. Difference between zener diode and voltage regulation?
12. When used as voltage regulators, zener diodes are operated?
13. By what type of charge carriers the current flows in zener and avalanche breakdown diodes?
14. Differentiate between line regulation & load regulation?
15. In which region zener diode can be used as a regulator?

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LAB-MANUAL
(II Year III SEM ECE)

Lab Name : Electronics Devices Lab

Lab Code : 3EC4-21

Branch : Electronics & Communication Engineering

CO3 :- Design various amplifiers like CE, CC, common source amplifiers and implement them using
hardware and also observe their frequency responses.

Experiment Object:-

Plot input-output characteristics of BJT in CB, CC and CE configurations.

Jaipur Engineering College and Research Centre


Shri Ram ki Nangal, via Sitapura RIICO
Tonk Road, Jaipur-302 022, Rajasthan

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EXPERIMENT NO:-8

Object: - Plot input-output characteristics of BJT in CB, CC and CE configurations.

Exp. No:-8(a):-To observe and draw the input and output characteristics of a transistor connected in
common base configuration.

Apparatus Required:

S.No. Component Value Quantity

1. Transistor BC107 1

2. Voltmeter (0-20V) 2

4. Resistor 100Ω 1

5. Regulated power (0-30V) 1


supply
1

6. Ammeters (0-100mA) 2

7. Connecting wires

Theory:

A transistor is a three terminal active device. T he terminals are emitter, base, collector. In CB
configuration, the base is common to both input (emitter) and output (collector). For normal operation, the E-B
junction is forward biased and C-B junction is reverse biased.

In CB configuration, IE is +ve, IC is –ve and IB is –ve. So,

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VEB=f1 (VCB,IE) and IC=f2 (VCB,IB)

With an increasing the reverse collector voltage, the space-charge width at the output junction increases and the
effective base width ‘W’ decreases. This phenomenon is known as “Early effect”. Then, there will be less chance
for recombination within the base region. With increase of charge gradient within the base region, the current of
minority carriers injected across the emitter junction increases. The current amplification factor of CB
configuration is given by,

α= ∆IC/ ∆IE

Circuit Diagram:

Fig.8 (a).1 Circuit Diagram of characteristics of BJT in CB

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Procedure:

Input Characteristics:

1. Connections are made as per the circuit diagram.

2. For plotting the input characteristics, the output voltage VCE is kept constant at 0V and for different values of
VEB note down the values of IE.

3. Repeat the above step keeping VCB at 2V, 4V, and 6V.All the readings are tabulated.

4. A graph is drawn between VEB and IE for constant VCB.

Output Characteristics:

1. Connections are made as per the circuit diagram.


2. For plotting the output characteristics, the input IE iskept constant at 10m A and for different values of VCB,
note down the values of IC.
3. Repeat the above step for the values of IE at 20 mA, 40 mA, and 60 mA, all the readings are tabulated.
4. A graph is drawn between VCB and Ic for constant IE.

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Observations:

Input Characteristics:

VCB=0V VCB=1V VCB=2V


S.No
VEB(V) IE(mA) VEB(V) IE( mA) VEB(V) IE(mA)

Table 8 (a).1

Output Characteristics:
IE=10mA IE=20mA IE=30mA

S.No VCB(V) IC(mA) VCB(V) IC( mA) VCB(V) IC(mA)

Table 8 (a).1.2

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Graphs:

Expected Input Characteristics

Fig.8 (a).2 Input Characteristics of CB Amplifier

Output Characteristics:

Fig8 (a).3 Output Characteristics of CB

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Precautions:

1. The supply voltages should not exceed the rating of the transistor.
2. Meters should be connected properly according to their polarities.

Expected output:

1. The input and output characteristics of the transistor are drawn.


2. The α of the given transistor is calculated.

VIVA QUESTIONS:

1. What is the range of α for the transistor?


2. Draw the input and output characteristics of the transistor in CB configuration?
3. Identify various regions in output characteristics?
4. What is the relation between α and β?
5. What are the applications of CB configuration?
6. What are the input and output impedances of CB configuration?
7. Define α(alpha)?
8. What is EARLY effect?
9. Draw diagram of CB configuration for PNP transistor?
10. What is the power gain of CB configuration?

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Experiment No:-8(b)

To draw the input and output characteristics of transistor connected in CE


configuration

Apparatus Required:

S.No. Component Value Quantity

1. Transistor BC107 1

2. Voltmeter (0-20V) 2

4. Resistor 1KΩ 1

5. Dual power (0-30V) 1


supply
1

6. Ammeters (0-100mA,0-500µA) 1,1

7. Connecting ------------- 10
wires

Theory:

A transistor is a three terminal device. The terminals are emitter, base, collector. In common emitter
configuration, input voltage is applied between base and emitter terminals and output is taken across the collector
and emitter terminals. Therefore the emitter terminal is common to both input and output. The input characteristics
resemble that of a forward biased diode curve. This is expected since the Base-Emitter junction of the transistor is

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forward biased. As compared to CB arrangement IB increases less rapidly with VBE . Therefore input resistance of
CE circuit is higher than that of CB circuit. The output characteristics are drawn between I c and VCE at constant IB.
the collector current varies with VCE unto few volts only. After this the collector current becomes almost constant,
and independent of VCE. The value of VCE up to which the collector current changes with V CE is known as Knee
voltage. The transistor always operated in the region above Knee voltage, IC is always constant and is
approximately equal to IB. The current amplification factor of CE configuration is given by

Β = ΔIC/ΔIB

Circuit Diagram:

Fig.8(B).1 Circuit Diagram Of BJT Characteristics

Procedure:

Input Characteristics:

1. Connect the circuit as per the circuit diagram.


2. For plotting the input characteristics the output voltage VCE is kept constant at 1V and for different values of
VBE . Note down the values of IC

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3. Repeat the above step by keeping VCE at 2V and 4V.


4. Tabulate all the readings.
5. plot the graph between VBE and IB for constant VCE
Output Characteristics:

1. Connect the circuit as per the circuit diagram


2. for plotting the output characteristics the input current IB is kept constant at 10μA and for different values
of VCE note down the values of IC
3. repeat the above step by keeping IB at 75 μA 100 μA
4. tabulate the all the readings
5. plot the graph between VCE and IC for constant IB

Observations:

Input Characteristics :

VCE = 1Volt VCE = 2Volt VCE = 4Volt


S.NO
VBE(Volt) IB(μA) VBE(Volt) IB(μA) VBE(Volt) IB(μA)

3…

Table.8 (b).1

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Out Put Characteristics:

IB = 50 μA IB = 75 μA IB = 100 μA
S.NO
VCE(V) IC(mA) VCE(V) ICmA) VCE(V) IC(mA)

Table 8(b).2

Model Graphs:

Expected Characteristics:

Fig.8 (B).2 Input Characteristics of BJT

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Output Characteristics:

Fig.8(B).3 Output Characteristics of BIT

Precautions:

1. The supply voltage should not exceed the rating of the transistor

2. Meters should be connected properly according to their polarities

Expected Output

1. the input and output characteristics of a transistor in CE configuration are Drawn


2. the  of a given transistor is calculated

Viva Questions:

1. What is the range of  for the transistor?


2. What are the input and output impedances of CE configuration?
3. Identify various regions in the output characteristics?

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4. what is the relation between  and 


5. Define current gain in CE configuration?
6. Why CE configuration is preferred for amplification?
7. What is the phase relation between input and output?
8. Draw diagram of CE configuration for PNP transistor?
9. What is the power gain of CE configuration?
10. What are the applications of CE configuration?

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Experiment No 8(c):- To calculate the H-parameters of transistor in CE configuration.

Apparatus Required:

S.No. Component Value Quantity

1. Transistor BC107 1

2. Voltmeter (0-20V) 2

4. Resistor 100KΩ 1

100Ω 1

5. Dual power (0-30V) 1


supply
1

6. Ammeters (0-100mA,0- 1,1


500µA)

7. Connecting
wires

Theory:

Input Characteristics:

The two sets of characteristics are necessary to describe the behavior of the CE configuration one for
input or base emitter circuit and other for the output or collector emitter circuit. In input characteristics the emitter
base junction forward biased by a very small voltage VBB where as collector base junction reverse biased by a very
large voltage VCC. The input characteristics are a plot of input current IB Vs the input voltage VBE for a range of
values of output voltage VCE . The following important points can be observed from these characteristics curves.

1. The characteristics resemble that of CE configuration.

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2. Input resistance is high as IB increases less rapidly with VBE

3. The input resistance of the transistor is the ratio of change in base emitter voltage ΔVBE to change in base current
ΔIB at constant collector emitter voltage ( VCE) i.e... Input resistance or input impedance hie = ΔVBE / ΔIB at VCE
constant.

Output Characteristics:

A set of output characteristics or collector characteristics are a plot of output current I C VS output
voltage VCE for a range of values of input current IB .The following important points can be observed from these
characteristics curves:-

1. The transistor always operates in the active region. I.e. the collector current

IC increases with VCE very slowly. For low values of the VCE the IC increases rapidly with a small increase in VCE
.The transistor is said to be working in saturation region.

Output resistance is the ratio of change of collector emitter voltage ΔV CE , to change in collector current ΔIC
with constant IB. Output resistance or Output impedance hoe = ΔVCE / ΔIC at IB constant.

Input Impedance hie = ΔVBE / ΔIB at VCE constant

Output impedance hoe = ΔVCE / ΔIC at IB constant

Reverse Transfer Voltage Gain hre = ΔVBE / ΔVCE at IB constant

Forward Transfer Current Gain hfe = ΔIC / ΔIB at constant VCE

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Circuit Diagram:

Fig.8(c).1Circuit Diagram of characteristics of BJT

Procedure:

1. Connect a transistor in CE configuration circuit for plotting its input and output characteristics.
2. Take a set of readings for the variations in IB with VBE at different fixed values of output voltage VCE .
3. Plot the input characteristics of CE configuration from the above readings.
4. From the graph calculate the input resistance hie and reverse transfer ratio hre by taking the slopes of the
curves.
5. Take the family of readings for the variations of IC with VCE at different values of fixed IB.
6. Plot the output characteristics from the above readings.
7. From the graphs calculate hfe ands hoe by taking the slope of the curves.

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Observation Table:

Input Characteristics

VCE=0V VCE=6V
S.NO
VBE(Volt) IB(μA) VBE(Volt) IB(μA)

Table.8(c).1

Output Characteristics

IB = 20 µA IB = 40 µA IB = 60 µA
S.NO
VCE (V) IC(mA) VCE (V) IC(mA) VCE (V) IC(mA)

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Model Waveform:

Input Characteristics

Fig.8(c).2 Input Characteristics of BJT

Fig.8(c).3 Input Characteristics of BJT

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Output Characteristics

Fig.8(C).4 output Characteristics of BJT

Fig.8(c).5 output Characteristics of BJT

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Expected Output :To calculate h-Parameters for a transistor in CE configuration from the input and output
characteristics, the typical values expected are:

1. Input Impedance hie = …………………………


2. Reverse Transfer Voltage Gain hre =………….
3. Forward Transfer Current Gain hfe =………….
4. Output conductance hoe =………………………

Viva Questions:

1. What are the h-parameters?


2. What are the limitations of h-parameters?
3. What are its applications?
4. Draw the Equivalent circuit diagram of H parameters?
5. Define H parameter?
6. What are tabular forms of H parameters monoculture of a transistor?
7. What is the general formula for input impedance?
8. What is the general formula for Current Gain?
9. What is the general formula for Voiltage gain?

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LAB-MANUAL
(II Year III SEM ECE)

Lab Name : Electronics Devices Lab

Lab Code : 3EC4-21

Branch : Electronics & Communication Engineering

CO4 :- Understand the need and requirements to obtain frequency response from a transistor so that
Design of RF amplifiers and other high frequency amplifiers is feasible .

Experiment Object:-
Plot frequency response of two stage RC coupled amplifier & calculate its bandwidth

Jaipur Engineering College and Research Centre


Shri Ram ki Nangal, via Sitapura RIICO
Tonk Road, Jaipur-302 022, Rajasthan

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EXPERIMENT NO:-10

Object: - Plot frequency response of two stage RC coupled amplifier & calculate its bandwidth ..

Apparatus:
S.No. Component Value Quantity

1. Transistor BC107 2

2. CRO 20MHz 1

4. Resistor 1.5K 2

33k 2

15KΩ 2

5.6k 2

5. Regulated (0-30V) 1
power supply
1

6. Capacitors 47uF, 10uF 2,3

7. Function 3MHz 1
Generator

Theory:
This is most popular type of coupling as it provides excellent audio fidelity.
A coupling capacitor is used to connect output of first stage to input of second stage. Resistances R1,
R2,Re form biasing and stabilization network. Emitter bypass capacitor offers low reactance paths to
signal coupling Capacitor transmits ac signal, blocks DC. Cascade stages amplify signal and overall gain

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is increased total gain is less than product of gains of individual stages. Thus for more gain coupling is
done and overall gain of two stages equals to
A=A1*A2
A1=voltage gain of first stage
A2=voltage gain of second stage.
When ac signal is applied to the base of the transistor, its amplified output appears across the collector
resistor Rc.It is given to the second stage for further amplification and signal appears with more strength.
Frequency response curve is obtained by plotting a graph between frequency and gain in db .The gain is
Constant in mid frequency range and gain decreases on both sides of the mid frequency range. The gain
decreases in the low frequency range due to coupling capacitor Cc and at high frequencies due to junction
capacitance Cbe.

Circuit Diagram:

Fig.10.1 Circuit Diagram Of RC Coupled Amplifier

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Procedure:
1. Apply input by using function generator to the circuit.
2. Observe the output waveform on CRO.
3. Measure the voltage at
a. Output of first stage
b. Output of second stage.
4. From the readings calculate voltage gain of first stage, second stage and overall gain of two stages.
Disconnect second stage and then measure output voltage of first stage calculates voltage gain.
5. Compare it with voltage gain obtained when second stage was connected.
6. Note down various values of gain for different frequencies.
7. A graph is plotted between frequency and voltage gain.

Observations: -

S.No Frequency(hz) Input Output gain Gain in db


Av=(v0/vi)
Voltage (vi) Voltage (v0) Av=20log10
(v0/vi)

1 2Hz

2 4Hz

3 10Hz

4 30Hz

5 50hz

6 100hz

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7…….40 150Hz….1MHz

Table 10.1

Model graph:-
Input Wave Form:

Fig.10.2 Input Wave Form for circuit

First Stage Output:

Fig.10.3 Output Wave Form of First Stage

Second Stage Output:

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Fig.10.4 Output Wave Form of Second Stage

Frequency Response:

Fig.7.5 Frequency Response of RC Coupled Amplifier

Precautions:
1) All connections should be tight.
2) Transistor terminals must be identifying properly.
3) Reading should be taken without any parallax error.

Expected output : To calculate voltage gain and bandwidth of RC coupled amplifier using frequency
response .

Viva Questions:
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1) What is the necessity of cascading?


2) What is 3dB bandwidth?
3) Why RC coupling is preferred in audio range?
4) Which type of coupling is preferred and why?
5) Explain various types of Capacitors?
6) What is loading effect?
7) Why it is known as RC coupling?
8) What is the purpose of emitter bypass capacitor?
9) Which type of biasing is used in RC coupled amplifier?
10) What Gain of Two-Stage RC Coupled Amplifier?
11) What Frequency Response of Two-Stage RC Coupled Amplifier?
12) What is RC coupled amplifier?
13) How to improve the frequency response of amplifier?
14) What is the value of all resistor use in this experiment? Why we use them?

15) Which configuration is used in RC coupled amplifier?

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LAB-MANUAL
(II Year III SEM ECE)

Lab Name : Electronics Devices Lab

Lab Code : 3EC4-21

Branch : Electronics & Communication Engineering

CO4 :- Understand the construction, operation and characteristics of JFET and MOSFET, which can be
used in the design of amplifiers.

Experiment Object:-
Plot frequency response curve for FET amplifier and calculate its gain bandwidth product

Jaipur Engineering College and Research Centre


Shri Ram ki Nangal, via Sitapura RIICO
Tonk Road, Jaipur-302 022, Rajasthan

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EXPERIMENT NO:-11

Object: - Plot input-output characteristics of field effect transistor and measure I dss and Vp.

Apparatus:

S No. Equipment Range Quantity

1 Power supply (0 to 30) v 1

2 FET (BFW11) 1

3 Resistor 1KΩ 1

4 Ammeters (0-100 mA) 1

5 Voltmeter (0-20 V) 2

6 connecting wires ------- 10

Theory:

A FET is a three terminal device, having the characteristics of high input impedance and less noise, the Gate to
Source junction of the FET s always reverse biased. In response to small applied voltage from drain to source, the
n-type bar acts as sample resistor, and the drain current increases linearly with VDS. With increase in ID the ohmic
voltage drop between the source and the channel region reverse biases the junction and the conducting position of
the channel begins to remain constant. The VDS at this instant is called “pinch of voltage”.

If the gate to source voltage (VGS) is applied in the direction to provide additional reverse bias, the pinch off
voltage ill is decreased. In amplifier application, the FET is always used in the region beyond the pinch-off.

IDS=IDSS(1-VGS/VP)^2

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Circuit Diagram

Fig 11.1 Circuit Diagram FET characteristics

Procedure:

1. All the connections are made as per the circuit diagram.


2. To plot the drain characteristics, keep VGS constant at 0V.
3. Vary the VDD and observe the values of VDS and ID.
4. Repeat the above steps 2, 3 for different values of VGS at 0.1V and 0.2V.
5. All the readings are tabulated.
6. To plot the transfer characteristics, keep VDS constant at 1V.
7. Vary VGG and observe the values of VGS and ID.
8. Repeat steps 6 and 7 for different values of VDS at 1.5 V and 2V.
9. The readings are tabulated.
10. From drain characteristics, calculate the values of dynamic resistance (r d) by using the formula
rd = ∆VDS/∆ID

11. From transfer characteristics, calculate the value of transconductace (gm) By using the formula

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Gm=∆ID/∆VDS

12. Amplification factor (μ) = dynamic resistance. Tran conductance


μ = ∆VDS/∆VGS

Observations:

Drain Characteristics

VGS=0V VGS=0.1V VGS=0.2V


S.NO
VDS(V) ID(mA) VDS(V) ID(mA) VDS(V) ID(mA)

3…

Table.11.1

Transfer Characteristics:

VDS =0.5V VDS=1V VDS =1.5V


S.NO
VGS (V) ID(mA) VGS (V) ID(mA) VGS (V) ID(mA)

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Table.11.2

Model Graph:

Transfer Characteristics

Fig.10.2 Transfer characteristics of FET

DRAIN CHARACTERISTICS

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Fig.11.3 Drain Characteristics of FET

Precautions:

1. The three terminals of the FET must be carefully identified


2. Practically FET contains four terminals, which are called source, drain, Gate, substrate.
3. Source and case should be short circuited.
4. Voltages exceeding the ratings of the FET should not be applied.

Expected output

2. The drain and transfer characteristics of a given FET are drawn


3. The dynamic resistance (rd), amplification factor (μ) and Tran conductance (gm) of the given FET are
calculated.

Viva Questions:

1. What are the advantages of FET?

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2. Different between FET and BJT?


3. Explain different regions of V-I characteristics of FET?
4. What are the applications of FET?
5. What are the types of FET?
6. Draw the symbol of FET.
7. What are the disadvantages of FET?
8. What are the parameters of FET?
9. Why FET is used as voltage variable resistances?
10. Define Trans conduction, pinch off &drain resistance?
11. Junction Field Effect Transistor contains how many diodes?
12. In the constant current region, how will the I ds change in an n-channel JFET?
13. What is the input impedance of a common gate configured JFET?
14. When an input signal reduces the channel size the process is called?

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LAB-MANUAL
(II Year III SEM ECE)

Lab Name : Electronics Devices Lab

Lab Code : 3EC4-21

Branch : Electronics & Communication Engineering

CO4 :- Understand the construction, operation and characteristics of JFET and MOSFET, which can be
used in the design of amplifiers.

Experiment Object:-
Plot frequency response curve for FET amplifier and calculate its gain bandwidth product

Jaipur Engineering College and Research Centre


Shri Ram ki Nangal, via Sitapura RIICO
Tonk Road, Jaipur-302 022, Rajasthan

(ECE/LAB MANUAL/3EC4-21 EDC LAB) Page 105


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Sitapura RIICO Jaipur- 302 022.

EXPERIMENT NO:-11

Object: - Plot frequency response curve for FET amplifier and calculate its gain bandwidth product

Apparatus:

S No. Equipment Range Quantity

1 Power supply (0 to 30) v 1

2 Trainer kit (ME ---- 1


613)
3 Connecting 1KΩ 1
wires
4 multimeter (0-100 mA) 1

5 CRO 25 MHz 1

6 connecting wires ------- 10

THEORY:-

A JFET can be N-channel type or P-channel type. The structure of a P-channel JFET is similar to that of an
N-channel JFET. Except that in its structure, N-type is replaced by P-type and P-type by N-type. The
structure of an N-channel JFET is abar of N-type silicon. This bar behaves like a resistor between its two
terminals, called source and drain.

We introduce heavily doped P-type region on either side of bar. These P-regions are called gates. Usually
two gates are connected together. This gate is used to control current flow from source to drain. This flow
of electrons makes the drain current I d. The electrons in the bar pass through the space between the two P-

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regions. As width of this space between the p-regions can be controlled by varying gate voltage that is
called a channel.

We apply a small reverse bias to the gate. Because of the reverse bias, the width of depletion increases.
Since the N-type bar is lightly doped compared to the P-regions, the depletions region extends more into
the N-type bar. This reduced the width of the channel. Reduction in the width of the channel (the
conductive portion of the bar) increases its resistance. This reduces the drain current I d. There is one
important point about the channel shape. It is narrower at the drain end. This happens because the amount
of reveres bias is not same throughout the length of the P-N junction. When current flows through the bar,
a potential drop occurs across its length.

As a result the reverse bias between the gate and the drain end of the bar is more than that between the gate
and the source end of the bar. The width of depletion region is more at the drain end than at the source end.
As a result, the channel becomes narrower at the drain end. If the reverse gate bias is increased further, the
channel becomes narrower at the drain end and drain current further reduces. If the reverse bias is made
sufficiently large, the depletion region will extend into channel. This pinches off all current flow. The gate-
source voltage at which pinch-off occurs is called PINCH-OFF voltage Vp.

Circuit Diagram:

(ECE/LAB MANUAL/3EC4-21 EDC LAB) Page 107


Jaipur Engineering college and research centre, Shri Ram ki Nangal, via
Sitapura RIICO Jaipur- 302 022.

Fig 12.1 FET Common Source Amplifier

PROCEDURE:-
(1) Connect the circuit as per the circuit diagram.
(2) Apply Vi = 10 mV and Vdd = +20v.
(3) Now vary the frequency of the input signal and measure the
corresponding amplitude variation in output at different values frequency.
(4) Note down the readings and plot the graph between gain and frequency.
This curve is known as frequency response curve.

(ECE/LAB MANUAL/3EC4-21 EDC LAB) Page 108


Jaipur Engineering college and research centre, Shri Ram ki Nangal, via
Sitapura RIICO Jaipur- 302 022.

OBSERVATIONS:-

S. NO INPUT VOLTAGE INPUT FREQUENCY OUTPUT VOLTAGE GAIN


(Vi) (Fi) (Vo) (db)

1
2
3
4
5
6
7
8…30

Gain =Vo\Vin

(Gain)db=20Log(Vo\Vin)

Precautions:

1. The three terminals of the FET must be carefully identified


2. Practically FET contains four terminals, which are called source, drain, Gate, substrate.
3. Source and case should be short circuited.
4. Voltages exceeding the ratings of the FET should not be applied.

Expected Output :-

(ECE/LAB MANUAL/3EC4-21 EDC LAB) Page 109


Jaipur Engineering college and research centre, Shri Ram ki Nangal, via
Sitapura RIICO Jaipur- 302 022.

To calculate voltage gain and bandwidth of sing frequency response .

Thus we have plotted a graph between gain and frequency to obtain a frequency
response curve. The values of fL and fH from graph are given as
FH=…………………

FL=………………….

BW = FH - FL

Frequency Response

Q. What are advantages of the FET.


Q. What are disadvantages of the FET?
Q. What are the various applications of FET?

(ECE/LAB MANUAL/3EC4-21 EDC LAB) Page 110

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