Basic Computer Organization and Design

Instruction Codes
 A simple computer can be defined by its internal registers, a timing and control structure, and a set of
instructions that it uses.
 Each type of computer has its own unique instruction set.
 Each computer instruction is simply a binary code that specifies a sequence of microoperations for the
computer.
 Instructions, along with data, are stored in memory. This combination of instructions and data is called the
instruction code.
 To execute the instruction code, the computer reads it from memory and places it into a control register. The
control then interprets the binary code of the instruction and proceeds to execute it by issuing a sequence of
microoperations.
 Instruction codes are usually divided into parts, with each part having its own interpretation. For example,
many instruction codes contain three parts: an operation code part, a source data part, and a destination data
part.
 The operation code (opcode part of an instruction code specifies the instruction to be performed (i.e. add,
subtract, shift, etc.).
 From the previous chapter, we saw that some instructions can take more than one microoperation. Hence, an
opcode can be thought of as a macrooperation that specifies a set of microoperations to be performed.
 The source data part of an instruction code specifies where to find the operands (data) to perform the
instruction (i.e. location in memory or a register).
 The destination data part of an instruction code specifies where to store the results of the instruction (i.e.
location in memory or a register).
The Basic Computer
 The simplest type of computer organization is a machine with one processor register (accumulator (AC) and a
two part instruction code (opcode , address).
 Depending upon the opcode used, the address part of the instruction code may contain either an operand
(immediate value), a direct address (address of operand in memory), or an indirect address (address of a
memory location that contains the actual address of the operand).
 The effective address is the address of the operand in memory.

Example

Computer Registers
 Clearly a computer with only one register would be extremely inefficient.
 Hence, our basic computer can be significantly enhanced by adding more processor registers.
 The following table describes the set of registers for a basic computer using a 16-bit instruction code (4-bit opcode, 12-
bit address):
Register # of
Register Name Function
Symbol bits
DR 16 Data Register Holds memory operand
AR 12 Address Register Holds address for memory
AC 16 Accumulator Processor register
IR 16 Instruction Register Holds instruction code
PC 12 Program Counter Holds address of instruction
TR 16 Temporary Register Holds temporary data
INPR 8 Input Register Holds input character
OUTR 8 Output Register Holds output character

  The memory address register (AR) has 12 bits since this is the width of a memory address.
 The program counter (PC) has 12 bits since it also holds a memory address (i.e. the address of the next
instruction).
 The input register (INPR) and output register (OUTR) only need to be 8 bits since they store 8-bit characters.

Common Bus System

 Information is transported to and from registers, memory, and the control unit via a 16-bit common bus.
 All computer registers except for INPR and OUTR can place data on the bus. In addition, the memory unit can
place data on the bus as well.
 In order to apply an operation, the memory unit needs to be supplied with a memory address. If the system is
limited to only using addresses in the AR register, no additional address bus is needed.

The bus uses three select bits to determine which of the registers or memory unit can use the bus at any given
point in time.
 Hence, the information on the bus can only come from only one register or the memory unit at a time.
However, due to the additional connections between various registers and/or the memory unit, it is possible for
more than one operation to be executed simultaneously.

Computer Instructions
 A basic computer instruction has three instruction code formats.
 Each format has 16 bits with the opcode using three bits and the remaining 13 bits specifying an operation
based on the opcode as follows:
o Memory reference - 12 bit address, 1 bit address mode, 7 opcodes
o Register reference - 12 bit operation, 1 opcode, I=0
o Input/Output reference - 12 bit operation, 1 opcode, I=1

 There are a total of 7 memory reference instructions (14 if you distinguish between direct and indirect
instructions).
 In addition, there are twelve register reference instructions and six input/output instructions
 All instructions can be coded as a four digit hexadecimal number.

Instruction Set Completeness

 To be complete a computer must include a sufficient number of instructions in each of the following
categories:
1. Arithmetic, logical, and shift instructions.
2. Instructions for moving information to and from memory and processor registers.
3. Program control instructions together with instructions that check status conditions.
4. Input and output instructions.

Timing and Control

 Timing for all registers is controlled by a master clock that simply fires out clock pulses.
 There are two major types of control:
o Hardwired Control - Control logic is implemented with digital components.
 Primary advantage is speed
 Primary disadvantage is that logic is not easy to change or modify.

o Microprogrammed Control - Control logic is implemented in software.

 Primary advantage is that it is much easier to change than hardwired control.
 Primary disadvantage is that it is slower than hardwired control.
 The control unit receives instructions from the IR and timing signals from a 4-bit sequence counter. The
timing signals repeat a cycle of counting from 0 to 15 (T0..T15).
 All instructions using the timing cycle to control the sequence of their operations.
Instruction Cycle
 The instruction cycle of the basic computer consists of the following four phases which are continuously
repeated until a HALT instruction is encountered:
1. Fetch an instruction from memory.
2. Decode the instruction.
3. Read the effective address from memory if the instruction has an indirect address.
4. Execute the instruction.

Fetch and Decode

 The fetch and decode operation can be specified by the following register transfer statements:
T0: AR <- PC
T1: IR <- M[AR], PC <- PC + 1
T2: D0,...,D7 Decode IR(12-14), AR <- IR(0-11), I <- IR(15)

 The next timing signal, T3 determines which type of instruction was read from memory. This can by
symbolized as follows:
D'7IT3: AR <- M[AR] (Indirect Memory-Reference Instruction)
D'7I'T3: Do nothing (Direct Memory-Reference Instruction)
D7I'T3: Execute a Register-Register Instruction
D7IT3: Execute an Input/Output Instruction
 If the instruction is a register-register instruction, then only one of the 12 bits in the IR register is set, with the
set bit specifying which instruction to perform.
 If the instruction is a memory-reference instruction, then the least three significant bits of the opcode specify
which instruction to perform.
 If the instruction is an input-output instruction, then only one bits 6-11 in the IR register is set, with the set bit
specifying which instruction to perform.
 Register-register instructions and input-output instructions can be completed during time T 3.
 Memory reference instructions could require additional time T4...T6.
Microprogrammed Control

Control Memory
 The function of the control unit in a digital computer is to initiate sequences of microoperations.
 Hardwired control is when control signals are generated by actual hardware circuitry.
 Microprogrammed control is performed by software using a technique called microprogramming.
 Microprogramming is simply a series of sequential microoperations specifed by control words.
 A control word is simply a sequence of 0's and 1's that specify microinstruction.
 And, a sequence of microinstructions constitues a microprogram.
 A computer that employs a microprogrammed control has two separate memories: a main memory and a
control memory.
 User programs are loaded into main memory. However, control memory holds a fixed microprogram, stored in
ROM, that cannot be altered.
 What fundamental advantage does microprogrammed control have over hardwired control?

 Executing control microinstructions is similar to executing regular instructions.

o Address of microinstruction is placed in the control memory address register.
o The microinstruction is fetched from control memory and placed in the control data register.
o The microperations specified by the microinstruction are performed.
o The address of the next microinstruction is determined and the process repeats itself.
 The address sequencer is used to determine the address of the next microinstruction.
 The sequencer utilizes a pipeline register to hold the next address. Hence, while the current microinstruction is
being executed, the next instruction is being loaded into the pipeline register.
Central Processing Unit
The CPU
 The CPU of a computer is made up of three parts:
o Control Unit
o Arithmetic/Logic Unit
o Register Set

General Register Organization

 The set of registers in a computer are connected to the ALU using buses and multiplexers.
 A 14-bit control word specifies two source registers (SELA & SELB), a destination register (SELD), and an
operation (OPR).
 The registers can be specified using three bits each as follows:
Binary
SELA SELB SELD
Code
000 Input Input None
001 R1 R1 R1
010 R2 R2 R2
011 R3 R3 R3
100 R4 R4 R4
101 R5 R5 R5
110 R6 R6 R6
111 R7 R7 R7

 The remaining four bits of the control word can be used to specify the following ALU operations:
OPR
Operation Symbol
Select
00000 Transfer A TSFA
00001 Increment A INCA
00010 Add A + B ADD
00101 Subtract A - B SUB
00110 Decrement A DECA
01000 AND A and B AND
01010 OR A and B OR
01100 XOR A and B XOR
01110 Complement A COMA
10000 Shift right A SHRA
11000 Shift left A SHLA

Stack Organization
 A stack is a storage device that stores information in a last-in, first-out (LIFO) fashion.
 A stack has two operations: push, which places data onto the stack, and pop, which removed data from the
stack.
 A computer can have a separate memory reserved just for stack operations. However, most utilize main
memory for representing stacks.
 Hence, all assembly programs should allocate memory for a stack.
 The SP register is initially loaded with the address of the top of the stack.
 In memory, the stack is actually upside-down, so when something is pushed onto the stack, the stack pointer is
decremented.
SP <- SP - 1
M[SP] <- DR

 And, when something is popped off the stack, the stack pointer is incremented.
DR <- M[SP]
SP <- SP + 1

 The push and pop instructions can be expicitly executed in a program. However, the are also implicitly
executed for such things as procedure calls and interrupts as well.
 Care must be taken when performing stack operations to ensure that an overflow or underflow of the stack
does not occur.
Instruction Formats
 You have already been exposed to a couple different instruction formats. In fact, there are several different
types of formats.
 However each type of format usually has the following in common:
1. An operation code field that specifies the operation to be performed.
2. An address field that designates a memory address or processor register.
3. A mode field that specifies the way the operand or the effective address is determined.

 Instructions can also vary in length. The length is typically a factor of how many addresses are specified
within the instruction.
 The number of addresses used by instructions depends upon the internal organization of the computer
registers. Most computers fall into one of three types of CPU organizations:
1. General register organization
2. Single accumulator orgainization
3. Stack organization

Three-Address Instructions
 Computers with three-address instruction formats fall under the general register organization category. The
three addresses can be used to specify processor registers or memory addresses.
Example

Two-Address Instructions
 Computers with two-address instruction formats also fall under the general register organization category. The
two addresses can be used to specify processor registers or memory addresses.
Example
One-Address Instructions
 Computers with one-address instruction fall under the accumulator organization category. The one address
must specify a memory addresses as it is implied that the accumulator (AC) register will be used for all data
manipulations.
Example

Zero-Address Instructions
 Computers with zero-address instruction formats fall under the stack organization category. Although, called a
zero address instruction, one memory address must be specified when pushing or popping the stack. However,
instructions such as ADD or MUL require no addresses.
Example

Addressing Modes
 Implied Mode - Operands specified implicitly in the definition of the instruction (accumulator or zero-address
instruction).
 Immediate Mode - Operand specified in the instruction itself. Operand field contains the actual operand to be
used in conjunction with the operation specified in the instruction.
 Register Mode - Address field specifies processor register. Operands are registers.
 Register Indirect Mode - Instruction specified a register whose contents give the address of the operand in
memory (i.e. register contains address, not a value).
 Autoincrement & Autodecrement Mode - Same as register indirect except address of register is incremented
or decremented following operation.
 Direct Address Mode - Effective address equal to address part of instruction. Operand is in memory and
specified by address field.
 Indirect Address Mode - Address field gives address where effective address is stored in memory. Control
fetches instruction from memory and uses its address part again to read the effective address.
 Relative Address Mode - Content of PC is added to address part of instruction. Address part can be + or -
number. Result produces an effective address relative to current (or next) instruction (used for branching).
 Indexed Addressing Mode - Content of an index register is added to the address part of the instruction to
obtain the effective address. The address field specifies the beginning address of a data array in memory. Each
operand in the array is stored in memory relative to the beginning address. The distance between the beginning
address and the address of the operand is stored in the index register.
 Base Register Addressing Mode - The content of a base register is added to the address part of the
instruction to obtain the effective address. This is similar to the indexed addressing mode except that the
register is now called a base register instead of an index register.
Example