Harmonic Analysis of Pulse Width Modulat
Harmonic Analysis of Pulse Width Modulat
Imen Ouerdani *‡, Afef Bennani Ben Abdelghani **, Ilhem Slama Belkhodja *
* Université de Tunis El Manar, Ecole Nationale d'Ingénieurs de Tunis LR11ES15 Laboratoire des Systèmes Electriques,
1002, Tunis, Tunisie ;
** Université de Carthage, Institut national des sciences appliquées et de technologie, Tunis 1080, Tunisie
(imen.wardani@gmail.com, afef.bennani@gmail.com, ilhem.slamabelkhodja@gmail.com)
‡
Corresponding Author; Imen Ouerdani, BP 37, Le Belvédère, 1002 Tunis, Tunisia, Tel: +21671874700 Fax: +21671872729.
imen.wardani@gmail.com
Abstract- MMC converters are an interesting solution for HVDC applications and renewable energy transport. This paper
presents a mathematical analysis of the impact of various Phase Disposition PWM strategies on the circulating current which is
one of the important MMC converter issues. The considered strategies are: Phase Disposition PWM (PDPWM), Phase
Opposition Disposition PWM (PODPWM) and Alternative Phase Opposition Disposition PWM (APODPWM). Depending on
the adapted modulation strategy, the proposed analysis proves that the circulating current varies from a DC component to a
high current with high frequency components and a dominance of the second order harmonics. It is also demonstrated that
PODPWM and APODPWM modulation strategies satisfy the balanced operation condition where only N sub-modules among
the 2N available sub-modules are inserted into the phase leg and consequently ensure (N+1) voltage levels in the output
voltage. Simulation results of a 2.7 MVA MMC converter are presented to verify the validity of the proposed methodology and
analysis.
Keywords Modular Multilevel Converter; circulating current; THD; Pulse Width Modulation.
for MMC converters [20, 21]. This strategy has the modules (SM) and an inductor L. Different structures can be
advantage of a higher DC bus utilization ratio and more used to build the sub-modules. In this paper, a sub-module is
degrees of freedom; however, its implementation becomes a Half Bridge converter, as shown in fig.1. The dc side of the
complicated for high number of levels. The modularity and converter is modelled by two dc voltage sources Vdc/2. In the
simple implementation of PWM-based modulation strategies following, such a converter is labelled N-SM MMC
make them the most suitable for MMC converters [22]. In converter.
[19,21] the high performances of the Carrier Disposition
Sub-modules are bypassed or inserted in a sinusoidal
PMW (CDPWM) modulations versus the Phase Shifted
manner depending on the upper switch control signal Si: If
Carrier PWM (PSCPWM) methods are detailed.
Si=1, (i.e. the upper switch is ON), the SM is inserted and
Nevertheless, the MMC topology requires further control contributes in the output voltage with its capacitor voltage.
objectives in addition to those of a conventional voltage The capacitor is charged or discharged according to the arm
source converter. Indeed, one of the main issues of the MMC current sign. If Si=0, (i.e. the upper switch is OFF) the SM is
topology is the circulating current. Since upper and lower bypassed and its output voltage is null. The corresponding
arms are connected in series, the voltage difference creates a capacitor voltage is constant. Bypassing or inserting a given
current that flows within the phase units [23] [24]. The so SM depends on two main criteria: realizing the required
called circulating current flows through the power devices as output voltage while maintaining the capacitors voltages
well as the sub-modules capacitors without having any balanced. In this paper, the capacitor value is considered
impact on the ac-side voltages and currents [25]. However, it balanced, equal to Vdc/N.
increases the peak values of upper and lower arm currents
Kirchhoff voltage law applied to leg a gives:
and consequently increases the rated current of power
devices which further increases the system cost and power V dc di a,u
losses [26]. Also, the circulating current perturbs the V a,u L . V a 0 (1)
2 dt
capacitor voltage balancing of the sub-module capacitors and
requires, consequently, a more sophisticated balance control V dc
algorithm [25]. V a ,l V L ,l V a 0 (2)
2
Circulating current control has been the subject of
various researches. In [26],[27],28], various dedicated where V a ,u and V a ,l are the upper and the lower arm
control algorithms are investigated to suppress the second inductor voltages. They are expressed as:
order harmonic considered as the dominant component of the
circulating current spectrum. Although they lead to a idc Upper arm
sensitive circulating current reduction, the proposed iu,a iu,b iu,a
algorithms lead to a non-negligible control complication and SM SM SM
limit the extra degrees of freedom of the MMC topology, Ua1 Ub1 Uc1
which may be used to enhance further performances.
SM SM SM
The aim of this paper is to analyse the impact of PWM +
- 𝑽𝒂,𝒖 Ua2 Ub2 Uc2
based modulation strategies on the circulating current and
evaluate how the PWM technique could enhance the
circulating current issue without considering it as an
additional constraint. Unlike other multilevel topologies, the SM SM SM
UaN UbN UcN
MMC converter offer a number of output voltage levels that
depend not only on the semi-conductor devices number used 𝑽𝒂
L L L
to build the converter, but also on the adapted modulation
scheme. The proposed analysis is based on the double
Fourier integral method to demonstrate which PWM-based L L L
modulation strategies are the best adapted to control the
𝑉𝑑𝑐 SM SM SM
MMC converter while eliminating the circulating current. +
2 - La1 Lb1 Lc1
The paper is organized as follows: in section 2, the
model of a three phase MMC converter and the circulating SM SM SM
𝑽𝒂,𝒍 La2 Lb2 Lc2
current are introduced. The impact of the Phase Disposition
PWM modulation strategies on the converter’s performance
is analyzed in section 3. Section 4 presents the simulation C
results and is followed by conclusions in section 5. SM SM SM
LaN LbN LcN
2. MMC Converter: Operation Principles and il,a il,b il,c
Modelling
Lower arm
A three phase MMC converter topology is depicted in
fig.1. Each of its legs is composed by two identical arms. Fig. 1. Topology of an N-SM MMC converter
Each arm consists of a series connection of N identical sub-
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V n V dc
V a,u Si u V
. c Si u . dc u V
. dc (3) V a ,u V a (13)
i i N N 2
V a,l Si l V
V n
. c Si l . dc l V
V dc
N N
. dc (4) V a ,l V a (14)
i i 2
where nu and nl are the number of inserted sub-modules in As in grid connected generation systems and motor drive
the upper and lower arm respectively. field, where the MMC is used in DC/AC operation mode, leg
a voltage reference is defined as:
The subtraction of (2) from (1) gives:
V
di a,l di a,u V a,ref m . dc cos(2 ft )
2.V a V a ,u V a ,l L . L. 0 (5) 2 (15)
dt dt
where m is the modulation index.
Considering the symmetry of the converter, the leg
output current is equally split among the upper and lower Consequently, upper and lower arm voltage references
arms. Consequently, upper and lower inductor voltages are are 180° phase shifted.
equal as expressed in (6).
3. Harmonic Analysis of Level Shifted PWM Strategies
di a,u di a ,l
L. L. V L (6)
and Their Effect on Circulating Current for MMC
dt dt Converter
Inserting (6) in (5) yields to (7).
The harmonic analysis of voltage and current outputs can
V a ,l V a ,u be performed using double Fourier integral method [29,30].
Va (7) In [30], Holmes deeply analyzed PWM based modulation
2
strategies for multilevel converters. The provided
Kirchhoff current law applied to leg a gives: quantifications can be simply applied for MMC converters.
In fact, the upper and lower arms can be considered as two
i a i a,u i a,l (8) separated multilevel converters. Each of the considered
converters is controlled by an independent PWM block.
(7) and (8) show that the voltage and current outputs are
given by the instantaneous difference between the lower and 3.1. Harmonic Analysis for PDPWM Modulation Strategy
upper voltages and currents.
Similarly, the sum of (1) and (2) gives: Phase Disposition PWM modulation strategy consists in
the comparison of the reference with carriers that are defined
d (i a ,u i a,l ) V dc (V a ,u V a ,l ) with the same magnitude, frequency and phase. They are
V L L. (9)
2dt 2 Vdc/N level shifted and form contiguous bands that cover all
the linear modulation range. Each carrier is associated to a
According to (7), the inductor compensates the single sub-module. Upper arm control signals are obtained
difference between the dc bus and the sum of the upper and by comparing the carriers with the upper arm voltage
lower arms voltages. This instantaneous voltage difference reference. Similarly, lower arm control signals are the
generates the circulating current iza, which flows in the upper comparison result of the carriers with the lower arm voltage
arm, lower arm and the dc bus. Current iza has no influence reference. On the basis of [30], one arm output voltage
on the output current ia and is expressed as: Varm(t,φ) can be expressed as follows:
i a ,u i a ,l V V
i za (10) V arm (t , ) dc dc .m .cos(0t )
2 2 2
2V dc 1
Inserting (3) and (4) in (9) yields to: . C e .cos 2i c t 2 j 10t
N . 2 i 1 2i j (16)
V
V L dc .(N (nu nl ))
C 0 .cos 2i 1c t 2i 0t
4V dc 1
2.N (11)
N . 2 i 1 2i 1 j k 1
Ideally, the dc bus and the converter’s legs are balanced
and the inductor voltage is null. Hence, the converter’s where:
balance condition is derived from (11) and can be written as:
φ is the initial phase angle of reference waveform, i is the
N nu nl (12) carrier index and j is the baseband index. wc and w0 are the
Thus, for a correct N-SM MMC converter operation, the angular frequency of the carrier and the reference
modulation strategy has to ensure that N SMs among the 2N respectively.
available ones are inserted.
N
Under this condition, (1) an (2) become: C 0 J 2k 1 2i 1 m cos(k ) (A B ) (17)
2
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Replacing φ with 0 for the upper arm reference and 180° Thus,
for the lower arm reference, Va,u and Va,l can be deduced from V dc V dc
(16) and are expressed as: V a ,u V arm (t ,0) .m .cos(0t )
2 2
V V 2V dc 1 N
V a ,u (t ) V arm (t ,0) dc dc .m .cos(0t ) J 2 j 1 i m cos(i ) sin Ni 2 j 1
2 2 N i 1 i j 2 2 (26)
2V dc 1 j 0
. C e .cos 2i c t 2 j 10t
N 2 i 1 2i j cos i c t 2 j 10t
(21)
4V dc
2i 1 C 0 .cos 2i 1c t 2i 0t
1
And
N 2 i 1 j k 1
V dc V dc
.m .cos(0t )
V a ,l V arm (t ,180)
2 2
V V
V a ,l (t ) V arm (t ,180) dc dc .m .cos(0t ) 2V 1
N
2 2 dc J 2 j 1 i m cos(i ) sin Ni 2 j 1
N i 1 i j 2 2 (27)
C e .cos 2i c t 2 j 10t
2V 1
dc j 0
N i 1 2i j cos i c t 2 j 10t
2
(22)
4V dc
2i 1 C 0 .cos 2i 1c t 2i 0t
1
Inserting (26) and (27) into (9) gives an inductor voltage
N i 1
2
j k 1
that is equal to zero. This means that APODPWM ensures a
correct converter operation where circulating current is
Inserting (21) and (22) in (9) yields to: constant and the inserted sub-modules number is equal to N.
Consequently, the converter’s output voltage step is equal to
C 0 .cos 2i 1c t 2 j 0t
4V dc 1
VL
N i 2i 1 j k 1
2 (23)
Vdc/N and (N+1) voltage levels can be generated.
j 0 3.3. Harmonic Analysis for PODPWM Modulation Strategy
The circulating current expression is deduced from the PODPWM leads to the arm output voltage that is
integration of (23) and expressed as: expressed as:
4V dc V V
1 V arm (t , ) dc dc .m .cos(0t )
i z (t )
2
LN i 2i 1 2 2
1
2V dc 2i J 2 j 1 iN m cos(i )
C0 (24)
.cos 2i 1c t 2 j 0t
j
N i 1
j k 1 (2i 1).c 2 j 0 2 cos 2m c t 2 j 1 0t (28)
j 0
2V dc 1
N 2
2i 1 (C D )
Consequently, even carrier harmonics are cancelled from i 1 j
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m
J 2k 1 2 j 1 .2 . cos k
N
D
k 1 2
sin 2k 2 j . sin 2k 2 j 2 . (30)
kj
2k 2 j 2k 2 j 2
k j 1
1
1
where cos Zoom
2m
Upper and lower arm voltage expressions are
respectively given by (31) and (32):
V dc V dc
V a ,u (t ) V arm (t , 0) .m .cos(0t )
2 2
1
2V J 2 j 1. iN m cos(i )
dc
N
2i j
cos 2m c t 2 j 1 0t
i 1 (31)
Fig. 2. PDPWM for a 4-SM MMC converter
2V dc 1 (2i 1)c t The three line output currents are depicted in fig. 3. They
2i 1 (A B ) cos
2 j 1 .0t
N 2 form a balanced three phase system with 338 A as maximum
i 1 j
value and a THD equal to 0.07%.
V dc V dc
V a ,l (t ) V arm (t ,180) .m .cos(0t )
2 2
1
2V J 2 j 1. iN m cos(i )
dc
N
2i j
cos 2m c t 2 j 1 0t
i 1 (32)
2V dc 1 (2i 1)c t
2i 1 (A B ) cos
N 2 j 1.0t
2
i 1 j
Fig. 3. Phase a, b and c currents of a PDPWM modulated 4
SM-MMC converter
Summing Va,u(t) and Va,l(t) and subtracting the result
from the dc bus gives a null inductor voltage. Hence, the The line to neutral output voltages Vao, Vbo and Vco are
circulating current is constant. PODPWM also generates presented in fig. 4. Each phase presents 9 voltage levels with
(N+1) voltage level in the converter’s output voltage. a THD equal to 16.7%.
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(b)
(b) (c)
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(b)
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According to IEC TR 61000-3-6: 2008, the current Management; Proceedings of PCIM Europe 2015;
harmonics standards are equal to 1.2% for distribution lines International Exhibition and Conference for Power
and 0.4% for transmission ones. Voltage harmonics Electronics, Intelligent Motion, Nuremberg, pp. 1–6,
standards are equal to 1.5% for bus voltage at PCC greater 19-21 May 2015.
than 161 kV. The voltage THD for high voltage systems like
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lower than the one obtained with PODPWM and
Conversion Congress and Exposition (ECCE), 20-24
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three proposed modulation strategies achieve a low THD in
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