+

Machine Instruction
Characteristics

 The operation of the processor is determined by the

instructions it executes, referred to as machine instructions or
computer instructions

 The collection of different instructions that the processor can

execute is referred to as the processor’s instruction set

 Each instruction must contain the information required by the

processor for execution

© 2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved.

 Elements of a Machine Instruction

Operation code Source operand

(opcode) reference
• Specifies the operation • The operation may
to be performed. The involve one or more
operation is specified source operands, that
by a binary code, is, operands that are
known as the operation inputs for the operation
code, or opcode

Result operand Next instruction

reference reference
• The operation may • This tells the processor
produce a result where to fetch the next
instruction after the
execution of this
instruction is complete

© 2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved.

 Source and result operands can be
in one of four areas:
3) Processor register
 A processor contains one or
1) Main or virtual memory more registers that may be
 As with next instruction referenced by machine
references, the main or virtual instructions.
memory address must be
supplied  If more than one register
exists each register is
assigned a unique name or
number and the instruction
2) I/O device must contain the number of
 The instruction must specify the desired register
the I/O module and device for 4) Immediate
the operation. If memory-
mapped I/O is used, this is  The value of the operand is
just another main or virtual contained in a field in the
memory address instruction being executed

© 2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved.

+
Instruction Representation
 Within the computer each instruction is represented by a
sequence of bits

 The instruction is divided into fields, corresponding to the

constituent elements of the instruction
4 bits 6 bits 6 bits

Opcode Operand Reference Operand Reference

16 bits

Figure 10.2 A Simple Instruction Format

Figure 12.2 A Simple Instruction Format

© 2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved.

+
Instruction Representation
 Opcodes are represented by abbreviations
called mnemonics

 Examples include:
 ADD Add
 SUB Subtract
 MUL Multiply
 DIV Divide
 LOAD Load data from memory
 STOR Store data to memory

 Operands are also represented symbolically

 Each symbolic opcode has a fixed binary representation

 The programmer specifies the location of each symbolic operand

© 2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved.

 Instruction Types
• Arithmetic instructions provide • Movement of data into or
computational capabilities for out of register and or
processing numeric data memory locations
• Logic (Boolean) instructions operate
on the bits of a word as bits rather
than as numbers, thus they provide
capabilities for processing any
other type of data the user may wish
to employ

Data Data
processing storage

Data
Control
movement
• Test instructions are used to test the • I/O instructions are needed
value of a data word or the status of a to transfer programs and
computation data into memory and the
• Branch instructions are used to branch results of computations
to a different set of instructions back out to the user
depending on the decision made

© 2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved.

 Instruction Set Design
Very complex because it affects so many aspects of the computer system

Defines many of the functions performed by the processor

Programmer’s means of controlling the processor

Fundamental design issues:

Operation repertoire Data types Instruction format Registers Addressing

• How many and which • The various types of data • Instruction length in bits, • Number of processor • The mode or modes by
operations to provide and upon which operations are number of addresses, size registers that can be which the address of an
how complex operations performed of various fields, etc. referenced by instructions operand is specified
should be and their use

© 2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved.

 Types of Operands

© 2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved.

+ Numbers

 All machine languages include numeric data types

 Numbers stored in a computer are limited:

 Limit to the magnitude of numbers representable on a machine
 In the case of floating-point numbers, a limit to their precision

 Three types of numerical data are common in computers:

 Binary integer or binary fixed point
 Binary floating point
 Decimal

 Packed decimal
 Each decimal digit is represented by a 4-bit code with two digits
stored per byte
 To form numbers 4-bit codes are strung together, usually in multiples
of 8 bits

© 2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved.

+
Characters

 A common form of data is text or character strings

 Textual data in character form cannot be easily stored or

transmitted by data processing and communications systems
because they are designed for binary data

 Most commonly used character code is the International

Reference Alphabet (IRA)
 Referred to in the United States as the American Standard Code
for Information Interchange (ASCII)

 Another code used to encode characters is the Extended

Binary Coded Decimal Interchange Code (EBCDIC)
 EBCDIC is used on IBM mainframes

© 2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved.

+
Logical Data

 An n-bit unit consisting of n 1-bit items of data, each item

having the value 0 or 1

 Two advantages to bit-oriented view:

 Memory can be used most efficiently for storing an array of
Boolean or binary data items in which each item can take on only
the values 1 (true) and 0 (false)
 To manipulate the bits of a data item
 If floating-point operations are implemented in software, we
need to be able to shift significant bits in some operations
 To convert from IRA to packed decimal, we need to extract the
rightmost 4 bits of each byte

© 2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved.

+
Single-Instruction-Multiple-Data
(SIMD) Data Types

 Introduced to the x86 architecture as part of the extensions of the

instruction set to optimize performance of multimedia applications

 These extensions include MMX (multimedia extensions) and SSE

(streaming SIMD extensions)

 Data types:
 Packed byte and packed byte integer
 Packed word and packed word integer
 Packed doubleword and packed doubleword integer
 Packed quadword and packed quadword integer
 Packed single-precision floating-point and packed double-precision
floating-point

© 2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved.

 Data Transfer

Must specify:
• Location of the source and
destination operands
Most fundamental type of • The length of data to be
machine instruction transferred must be indicated
• The mode of addressing for each
operand must be specified

© 2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved.

+  Most machines provide the basic arithmetic
operations of add, subtract, multiply, and divide

 These are provided for signed integer (fixed-

point) numbers

 Often they are also provided for floating-point

and packed decimal numbers

 Other possible operations include a variety of

single-operand instructions:
 Absolute Arithmetic
 Take the absolute value of the operand
 Negate
 Negate the operand
 Increment
 Add 1 to the operand
Decrement
 Subtract 1 from the operand

© 2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved.

 Instructions that
change the
format or Conversion
operate on the
format of data

An example of a
more complex
editing
instruction is the
An example EAS/390
is converting Translate (TR)
from instruction
decimal to
binary

© 2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved.

+
Input/Output

 Variety of approaches taken:

 Isolated programmed I/O
 Memory-mapped programmed I/O
 DMA
 Use of an I/O processor

 Many implementations provide only a few I/O instructions,

with the specific actions specified by parameters, codes, or
command words

© 2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved.

 System Control

Instructions that can be executed only while the processor is in a

certain privileged state or is executing a program in a special
privileged area of memory

Typically these instructions are reserved for the use of the

operating system

Examples of system control operations:

A system control instruction An instruction to read or Access to process control

may read or alter a control modify a storage protection blocks in a
register key multiprogramming system

© 2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved.

+
Transfer of Control

 Reasons why transfer-of-control operations are required:

 It is essential to be able to execute each instruction more than
once
 Virtually all programs involve some decision making
 It helps if there are mechanisms for breaking the task up into
smaller pieces that can be worked on one at a time

 Most common transfer-of-control operations found in

instruction sets:
 Branch
 Skip
 Procedure call

© 2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved.

 Skip Instructions

Typically implies that one

instruction be skipped,
Includes an implied thus the implied address
address equals the address of the
next instruction plus one
instruction length

Because the skip

instruction does not Example is the
require a destination increment-and-skip-if-
address field it is free to zero (ISZ) instruction
do other things

© 2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved.

+
Procedure Call Instructions
 Self-contained computer program that is incorporated into a
larger program
 At any point in the program the procedure may be invoked, or called
 Processor is instructed to go and execute the entire procedure and
then return to the point from which the call took place

 Two principal reasons for use of procedures:

 Economy
 A procedure allows the same piece of code to be used many times
 Modularity

 Involves two basic instructions:

 A call instruction that branches from the present location to the
procedure
 Return instruction that returns from the procedure to the place from
which it was called

© 2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved.

+
x86 Operation Types
 The x86 provides a complex array of operation types including a
number of specialized instructions

 The intent was to provide tools for the compiler writer to produce
optimized machine language translation of high-level language
programs

 Provides four instructions to support procedure call/return:

 CALL
 ENTER
 LEAVE
 RETURN

 When a new procedure is called the following must be performed upon

entry to the new procedure:
 Push the return point on the stack
 Push the current frame pointer on the stack
 Copy the stack pointer as the new value of the frame pointer
 Adjust the stack pointer to allocate a frame

© 2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved.

+
x86 Single-Instruction, Multiple-
Data (SIMD) Instructions
 1996 Intel introduced MMX technology into its Pentium
product line
 MMX is a set of highly optimized instructions for multimedia tasks

 Video and audio data are typically composed of large arrays

of small data types

 Three new data types are defined in MMX

 Packed byte
 Packed word
 Packed doubleword

 Each data type is 64 bits in length and consists of multiple

smaller data fields, each of which holds a fixed-point integer

© 2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved.

ARM Operation Types

Load and store Branch Data-processing

instructions instructions instructions

Parallel addition
Multiply Extend
and subtraction
instructions instructions
instructions

Status register
access
instructions
© 2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved.
 Addressing Modes
Immediate

Direct

Indirect

Register

Register indirect

Displacement

Stack

© 2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved.

 Instruction Instruction Instruction
Operand A A
Memory Memory

Operand

Operand

(a) Immediate (b) Direct (c) Indirect

Instruction Instruction Instruction

R R R A
Memory Memory

Operand

Operand Operand
Registers Registers Registers
(d) Register (e) Register Indirect (f) Displacement

Instruction

Implicit

Top of Stack
Register

(g) Stack

Figure 13.1 Addressing Modes

© 2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved.
 Table 13.1
Basic Addressing Modes
Mode Algorithm Principal Advantage Principal Disadvantage
Immediate Operand = A No memory reference Limited operand magnitude
Direct EA = A Simple Limited address space
Indirect EA = (A) Large address space Multiple memory references
Register EA = R No memory reference Limited address space
Register indirect EA = (R) Large address space Extra memory reference
Displacement EA = A + (R) Flexibility Complexity
Stack EA = top of stack No memory reference Limited applicability

© 2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved.

+ Immediate Addressing

 Simplest form of addressing

 Operand = A

 This mode can be used to define and use constants or set initial
values of variables
 Typically the number will be stored in twos complement form
 The leftmost bit of the operand field is used as a sign bit

 Advantage:
 No memory reference other than the instruction fetch is required to
obtain the operand, thus saving one memory or cache cycle in the
instruction cycle

 Disadvantage:
 The size of the number is restricted to the size of the address field, which,
in most instruction sets, is small compared with the word length

© 2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved.

 Direct Addressing

Address field
contains the
effective address of
the operand

Effective address
(EA) = address field
(A)

Was common in
earlier generations
of computers

Requires only one

memory reference
and no special
calculation

Limitation is that it
provides only a
limited address
space

© 2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved.

+
Indirect Addressing

 Reference to the address of a word in memory which contains a

full-length address of the operand

 EA = (A)
 Parentheses are to be interpreted as meaning contents of

 Advantage:
 For a word length of N an address space of 2N is now available

 Disadvantage:
 Instruction execution requires two memory references to fetch the operand
 One to get its address and a second to get its value

 A rarely used variant of indirect addressing is multilevel or cascaded

indirect addressing
 EA = ( . . . (A) . . . )
 Disadvantage is that three or more memory references could be required
to fetch an operand

© 2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved.

 Register Addressing

Address field
refers to a
register rather EA = R
than a main
memory address

Advantages: Disadvantage:
• Only a small • The address space
address field is is very limited
needed in the
instruction
• No time-consuming
memory references
are required

© 2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved.

+
Register Indirect Addressing

 Analogous to indirect addressing

 The only difference is whether the address field refers to a
memory location or a register

 EA = (R)

 Address space limitation of the address field is overcome by

having that field refer to a word-length location containing an
address

 Uses one less memory reference than indirect addressing

© 2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved.

+
Displacement Addressing

 Combines the capabilities of direct addressing and register

indirect addressing

 EA = A + (R)

 Requires that the instruction have two address fields, at least one
of which is explicit
 The value contained in one address field (value = A) is used directly
 The other address field refers to a register whose contents are added
to A to produce the effective address

 Most common uses:

 Relative addressing
 Base-register addressing
 Indexing

© 2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved.

 Relative Addressing

The implicitly referenced register is the program counter (PC)

• The next instruction address is added to the address field to produce the EA
• Typically the address field is treated as a twos complement number for this
operation
• Thus the effective address is a displacement relative to the address of the
instruction

Exploits the concept of locality

Saves address bits in the instruction if most memory references

are relatively near to the instruction being executed

© 2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved.

+
Base-Register Addressing

 The referenced register contains a main memory address and

the address field contains a displacement from that address

 The register reference may be explicit or implicit

 Exploits the locality of memory references

 Convenient means of implementing segmentation

 In some implementations a single segment base register is

employed and is used implicitly

 In others the programmer may choose a register to hold the

base address of a segment and the instruction must reference it
explicitly

© 2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved.

 Indexing
 The address field references a main memory address and the referenced
register contains a positive displacement from that address

 The method of calculating the EA is the same as for base-register addressing

 An important use is to provide an efficient mechanism for performing

iterative operations

 Autoindexing
 Automatically increment or decrement the index register after each reference to it
 EA = A + (R)
 (R)  (R) + 1

 Postindexing
 Indexing is performed after the indirection
 EA = (A) + (R)

 Preindexing
 Indexing is performed before the indirection
 EA = (A + (R))

© 2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved.

+
Stack Addressing

 A stack is a linear array of locations

 Sometimes referred to as a pushdown list or last-in-first-out queue

 A stack is a reserved block of locations

 Items are appended to the top of the stack so that the block is partially filled

 Associated with the stack is a pointer whose value is the address of the top of
the stack
 The stack pointer is maintained in a register
 Thus references to stack locations in memory are in fact register indirect addresses

 Is a form of implied addressing

 The machine instructions need not include a memory

reference but implicitly operate on the top of the stack

© 2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved.

+ ARM Data Processing Instruction Addressing
and Branch Instructions

 Data processing instructions

 Use either register addressing or a mixture of register and
immediate addressing
 For register addressing the value in one of the register operands
may be scaled using one of the five shift operators

 Branch instructions
 The only form of addressing for branch instructions is immediate
 Instruction contains 24 bit value
 Shifted 2 bits left so that the address is on a word boundary
 Effective range ± 32MB from from the program counter

© 2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved.

 Instruction Formats

Must include
Define the
an opcode For most
layout of the
and, implicitly instruction
bits of an
or explicitly, sets more than
instruction, in
indicate the one
terms of its
addressing instruction
constituent
mode for each format is used
fields
operand

© 2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved.

+
Instruction Length
 Most basic design issue

 Affects, and is affected by:

 Memory size
 Memory organization
 Bus structure
 Processor complexity
 Processor speed

 Should be equal to the memory-transfer length or one should

be a multiple of the other

 Should be a multiple of the character length, which is usually

8 bits, and of the length of fixed-point numbers

© 2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved.

 Allocation of Bits

Number of Register
Number of
addressing versus
operands
modes memory

Number of Address Address

register sets range granularity

© 2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved.

+
Variable-Length Instructions

 Variations can be provided efficiently and compactly

 Increases the complexity of the processor

 Does not remove the desirability of making all of the

instruction lengths integrally related to word length
 Because the processor does not know the length of the next
instruction to be fetched a typical strategy is to fetch a number of
bytes or words equal to at least the longest possible instruction
 Sometimes multiple instructions are fetched

© 2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved.

+
Thumb-2 Instruction Set

 The only instruction set available on the Cortex-M microcontroller

products

 Is a major enhancement to the Thumb instruction set architecture (ISA)

 Introduces 32-bit instructions that can be intermixed freely with the older 16-
bit Thumb instructions
 Most 32-bit Thumb instructions are unconditional, whereas almost all ARM
instructions can be conditional
 Introduces a new If-Then (IT) instruction that delivers much of the functionality
of the condition field in ARM instructions

 Delivers overall code density comparable with Thumb, together with the
performance levels associated with the ARM ISA

 Before Thumb-2 developers had to choose between Thumb for size and
ARM for performance

© 2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved.