CENG 3420
Computer Organization & Design
Lecture 02: ISA Introduction
Bei Yu
CSE Department, CUHK
byu@cse.cuhk.edu.hk
(Textbook: Chapters 1.3 & 2.1)
2024 Spring
Organization – First Glance
What is a Computer?
Components
• processor (datapath, control)
• input (mouse, keyboard)
• output (display, printer)
• memory (cache, main memory, disk drive, CD/DVD)
• network
Our primary focus: the processor (datapath and control) and its interaction with
memory systems
• Implemented using tens/hundreds of millions of transistors
• Impossible to understand by looking at each transistor
• We need abstraction!
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Which one is not a component of a computer?
• A: processor
• B: I/O
• C: memory
• D: fan
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Major Components of a Computer
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Computer System
Text Music Video
Editors Players Players
Web Misc.
Games
Browsers Utilities
Applications
File Device
Kernel
Systems Drivers
User API
Security System Call
GUI
Operation System
Data
CPU Memory
Storage
Network User I/O
Display
Adapter Devices
Hardware
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Machine Organization
• Capabilities and performance characteristics of the principal Functional Units (FUs).
(e.g., register file, ALU, multiplexors, memories, ...)
• The ways those FUs are interconnected (e.g., buses)
• Logic and means by which information flow between FUs is controlled
• The machine’s Instruction Set Architecture (ISA)
• Register Transfer Level (RTL) machine description
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Processor Organization
Control needs to have circuitry to
• Decide which is the next instruction and input it from memory
• Decode the instruction
• Issue signals that control the way information flows between datapath components
• Control what operations the datapath’s functional units perform
Datapath needs to have circuitry to
• Execute instructions - functional units (e.g., adder) and storage locations (e.g.,
register file)
• Interconnect the functional units so that the instructions can be executed as required
• Load data from and store data to memory
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System Software
Applications software
Systems software
Hardware
Operating System
• Supervising program that interfaces the user’s program with the hardware (e.g.,
Linux, iOS, Windows)
• Handles basic input and output operations
• Allocates storage and memory
• Provides for protected sharing among multiple applications
Compiler
• Translate programs written in a high-level language (e.g., C, Java) into instructions
that the hardware can execute 9/33
Which one is not a task of an operating system?
• A: output images to the screen
• B: create files
• C: translate C program to assembly language
• D: switch the processes that run on the processor
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Advantages of Higher-Level Languages ?
• Allow the programmer to think in a more natural language and for their intended
use (Fortran for scientific computation, Cobol for business programming, Lisp for
symbol manipulation, Java for web programming, ...)
• Improve programmer productivity – more understandable code that is easier to
debug and validate
• Improve program maintainability
• Allow programs to be independent of the computer on which they are developed
(compilers and assemblers can translate high-level language programs to the binary
instructions of any machine)
• Emergence of optimizing compilers that produce very efficient assembly code
optimized for the target machine
As a result, very little programming is done today at the assembler level
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Traditional Compilation Flow
C program
Compiler
Assembly language program
Assembler
Machine language Library routine
Linker
Executable: Machine language
Loader
Memory 12/33
Below the Program
• High-level language program (in C)
swap (int v[], int k)
(int temp; one-to-many
temp = v[k];
v[k] = v[k+1]; C compiler
v[k+1] = temp;
)
• Assembly language program
swap: sll $2, $5, 2
add $2, $4, $2
lw $15, 0($2)
lw $16, 4($2) one-to-one
sw $16, 0($2)
sw $15, 4($2) assembler
jr $31
• Machine (object) code
000000 00000 00101 0001000010000000
000000 00100 00010 0001000000100000
. . .
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Below the Program
• High-level language program (in C)
swap (int v[], int k)
(int temp; one-to-many
temp = v[k];
v[k] = v[k+1]; C compiler
v[k+1] = temp;
)
• Assembly language program
swap: sll $2, $5, 2
add $2, $4, $2
lw $15, 0($2)
lw $16, 4($2) one-to-one
sw $16, 0($2)
sw $15, 4($2) assembler
jr $31
• Machine (object) code
000000 00000 00101 0001000010000000
000000 00100 00010 0001000000100000
. . .
Max # of operations?
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Input Device Inputs Object Code
000000 00000 00101 0001000010000000
000000 00100 00010 0001000000100000
100011 00010 01111 0000000000000000
100011 00010 10000 0000000000000100
101011 00010 10000 0000000000000000
101011 00010 01111 0000000000000100
000000 11111 00000 0000000000001000
Processor Devices
Network
Control Memory Input
Datapath Output
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Object Code Stored in Memory
Processor Memory Devices
000000 00000 00101 0001000010000000 Network
000000 00100 00010 0001000000100000
100011 00010 01111 0000000000000000
Control 100011 00010 10000 0000000000000100
101011 00010 10000 0000000000000000 Input
101011 00010 01111 0000000000000100
000000 11111 00000 0000000000001000
Datapath Output
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Object Code Stored in Memory
Processor Memory Devices
000000 00000 00101 0001000010000000 Network
000000 00100 00010 0001000000100000
100011 00010 01111 0000000000000000
Control 100011 00010 10000 0000000000000100
101011 00010 10000 0000000000000000 Input
101011 00010 01111 0000000000000100
000000 11111 00000 0000000000001000
Datapath Output
Processor fetches an instruction from memory
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Decode & Excute Codes
Processor Devices
Network
Control
000000 00100 00010 0001000000100000
Memory
Input
Datapath
Output
• Control decodes the instruction to determine what to execute
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Decode & Excute Codes
Processor Devices
Network
Control
000000 00100 00010 0001000000100000
Memory
Input
Datapath
contents Reg #4 ADD contents Reg #2
results put in Reg #2 Output
• Control decodes the instruction to determine what to execute
• Datapath executes the instruction as directed by control
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What Happens Next?
Processor Memory Devices
000000 00000 00101 0001000010000000 Network
000000
100011
00100
00010
00010
01111
0001000000100000
0000000000000000
Fetch
Control 100011 00010 10000 0000000000000100
101011 00010 10000 0000000000000000 Input
101011 00010 01111 0000000000000100
000000 11111 00000 0000000000001000
Datapath Output
Exec Decode
• Processor fetches the next instruction from memory
• How does it know which location in memory to fetch from next?
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Output Device Outputs Data
Processor Devices
Network
Control Memory Input
Datapath Output
00000100010100000000000000000000
00000000010011110000000000000100
00000011111000000000000000001000
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ISA
ISA – Bridge between Hardware & Software
Software
Applications
Operation System
Instruction Set Architecture
Hardware
20/33
Connection
C program
Text Music Video
Editors Players Players Compiler
Web Misc.
Games Assembly language program
Browsers Utilities
Applications
Assembler
Software
File Device Machine language Library routine
Kernel Applications
Systems Drivers
User API Operation System
Security System Call
GUI Linker
Operation System
Instruction Set Architecture Executable: Machine language
Data Hardware
CPU Memory Loader
Storage
Network User I/O
Display Memory
Adapter Devices
Hardware
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Instruction Set Architecture (ISA)
The interface description separating the software and hardware
software
instruction set architecture
hardware
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Instruction Set Architecture (ISA)
• ISA, or simply architecture – the abstract interface between the hardware and the
lowest level software that includes all the information necessary to write a machine
language program, including instructions, registers, memory access, I/O, ...
• Enables implementations of varying cost and performance to run identical software
• The combination of the basic instruction set (the ISA) and the operating system
interface is called the application binary interface (ABI)
• ABI: The user portion of the instruction set plus the operating system interfaces used
by application programmers. Defines a standard for binary portability across
computers.
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Two Key Principles of Machine Design
1 Instructions are represented as numbers and, as such, are indistinguishable from data
2 Programs are stored in alterable memory (that can be read or written to) just like data
Memory
Accounting prg
(machine code)
Stored-Program Concept
C compiler
• Programs can be shipped as files of binary numbers – binary (machine code)
compatibility
• Computers can inherit ready-made software provided they are Payroll
compatible with an existing ISA – leads industry to align data
around a small number of ISAs
Source code in
C for Acct prg
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Assembly Language Instructions
The language of the machine
• Want an ISA that makes it easy to build the hardware and the compiler while
maximizing performance and minimizing cost
Our target: the RISC-V ISA
• similar to other ISAs developed since the 1980’s
• RISC-V is originated from MIPS, the latter of which is used by Broadcom, Cisco,
NEC, Nintendo, Sony, ...
Design Goals
Maximize performance, minimize cost, reduce design time (time-to-market), minimize
memory space (embedded systems), minimize power consumption (mobile systems)
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RISC-V
CISC vs. RISC
Complex Instruction Set Computer (CISC)
Lots of instructions of variable size, very memory optimal, typically less registers.
• Intel x86
Reduced Instruction Set Computer (RISC)
Instructions, all of a fixed size, more registers, optimized for speed. Usually called a
“Load/Store” architecture.
• RISC-V, LC-3b, MIPS, ARM, Sun SPARC, HP PA-RISC, IBM PowerPC ...
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History of MIPS (cont.)
• Used in many embedded systems
• E.g., Nintendo-64, Playstation 1, Playstation 2
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Welcome to RISC-V
RISC-V
• An open standard instruction set architecture (ISA)
• A clean break from the earlier MIPS-inspired designs
• Modular ISA organization
• Open standards, numerous proprietary and open-source cores
• Managed by RISC-V Foundation
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The RISC-V ISA I
Instruction Categories
4 Base Instruction Formats: all 32 bits wide
• Load and Store instructions
• Bitwise instructions
• Arithmetic instructions
• Control transfer instructions
• Pseudo instructions
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Which one is not a part of ISA?
• A: load/store instructions
• B: arithmetic operations
• C: printf function
• D: control tranfer instructions
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Which one is not a part of ISA?
• A: load/store instructions
• B: arithmetic operations
• C: printf function
• D: control tranfer instructions
Ans: C
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Register names and descriptions
Register Names ABI Names Description
x0 zero Hard-wired zero
x1 ra Return address
x2 sp Stack pointer
x3 gp Global pointer
x4 tp Thread pointer
x5 t0 Temporary / Alternate link register
x6-7 t1 - t2 Temporary register
x8 s0 / fp Saved register / Frame pointer
x9 s1 Saved register
x10-11 a0-a1 Function argument / Return value registers
x12-17 a2-a7 Function argument registers
x18-27 s2-s11 Saved registers
x28-31 t3-t6 Temporary registers
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Which register cannot we store an operand when we call “max(a, b)”?
• A: x0 (zero)
• B: x3 (gp)
• C: x9 (s1)
• D: x11 (a1)
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Which register cannot we store an operand when we call “max(a, b)”?
• A: x0 (zero)
• B: x3 (gp)
• C: x9 (s1)
• D: x11 (a1)
Ans: A
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