CNE302

Computer Organization and

Architecture

Lecture 01 - Introduction
Instructor: Dr. Tarek Abdul Hamid
What is “Computer Architecture” ?
 Computer Architecture =

Instruction Set Architecture + Computer Organization

 Instruction Set Architecture (ISA)

 WHAT the computer does (logical view)

 Computer Organization

 HOW the ISA is implemented (physical view)

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Some Important Questions to Ask

 What is Assembly Language?

 What is Machine Language?

 How is Assembly related to a high-level language?

 Why Learn Assembly Language?

 What is an Assembler, Linker, and Debugger?

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A Hierarchy of Languages
Application Programs

High-Level Languages
Machine independent High-Level Language
Machine specific Low-Level Language
Assembly Language

Machine Language

Hardware

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Assembly and Machine Language
 Machine language
 Native to a processor: executed directly by hardware
 Instructions consist of binary code: 1s and 0s
 Assembly language
 Slightly higher-level language
 Readability of instructions is better than machine language
 One-to-one correspondence with machine language instructions
 Assemblers translate assembly to machine code
 Compilers translate high-level programs to machine code
 Either directly, or
 Indirectly via an assembler

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Compiler and Assembler

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Instructions and Machine Language

 Each command of a program is called an instruction (it instructs the computer

what to do).

 Computers only deal with binary data, hence the instructions must be in binary
format (0s and 1s) .

 The set of all instructions (in binary form) makes up the computer's machine
language. This is also referred to as the instruction set.

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Instruction Fields
 Machine language instructions usually are made up of several fields. Each field
specifies different information for the computer. The major two fields are:

 Opcode field which stands for operation code and it specifies the particular
operation that is to be performed.
 Each operation has its unique opcode.

 Operands fields which specify where to get the source and destination operands
for the operation specified by the opcode.
 The source/destination of operands can be a constant, the memory or one of the
general-purpose registers.

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Translating Languages
Program (C Language):
swap(int v[], int k) { A statement in a high-level
int temp; language is translated
temp = v[k]; typically into several
v[k] = v[k+1]; machine-level instructions
v[k+1] = temp;
}
Compiler

MIPS Assembly Language: MIPS Machine Language:

sll $2,$5, 2 00051080
Assembler
add $2,$4,$2 00821020
lw $15,0($2) 8C620000
lw $16,4($2) 8CF20004
sw $16,0($2) ACF20000
sw $15,4($2) AC620004
jr $31 03E00008
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Advantages of High-Level Languages
 Program development is faster

 High-level statements: fewer instructions to code

 Program maintenance is easier

 For the same above reasons

 Programs are portable

 Contain few machine-dependent details

 Can be used with little or no modifications on different machines

 Compiler translates to the target machine language

 However, Assembly language programs are not portable

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Why Learn Assembly Language?
Many reasons:
Accessibility to system hardware
Space and time efficiency
Writing a compiler for a high-level language

Accessibility to system hardware

Assembly Language is useful for implementing system software
Also useful for small embedded system applications

Space and Time efficiency

Understanding sources of program inefficiency
Tuning program performance
Writing compact code

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Assembly Language Programming Tools

 Editor
 Allows you to create and edit assembly language source files
 Assembler
 Converts assembly language programs into object files
 Object files contain the machine instructions
 Linker
 Combines object files created by the assembler with link libraries
 Produces a single executable program
 Debugger
 Allows you to trace the execution of a program
 Allows you to view machine instructions, memory, and registers

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Assemble and Link Process
Source Object
File Assembler File

Source Object Executable

File Assembler File Linker
File

Source Object Link

File Assembler File Libraries

A project may consist of multiple source files

Assembler translates each source file separately into an object file
Linker links all object files together with link libraries

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Components of a Computer System
 Processor Computer

 Datapath Memory
 Control
I/O Devices
 Memory & Storage
Control Input
 Main Memory B
Processor U Output
 Disk Storage
S
 Input devices Datapath Disk
 Output devices
 Bus: Interconnects processor to memory and I/O Network
 Network: newly added component for communication

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Memory
 Ordered sequence of bytes
 The sequence number is called the memory address

 Byte addressable memory

 Each byte has a unique address

 Supported by almost all processors

 Physical address space

 Determined by the address bus width

 Pentium has a 32-bit address bus

 Physical address space = 4GB = 232 bytes

 Itanium with a 64-bit address bus can support

 Up to 264 bytes of physical address space

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Computer Organization and Architecture Dr.Tarek Abdul Hamid
Address Space

Address Space is the

set of memory
locations (bytes) that
can be addressed

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Address, Data, and Control Bus
 Address Bus
 Memory address is put on address bus
 If memory address = a bits then 2a locations are addressed

 Data Bus: bi-directional bus

 Data can be transferred in both directions on the data bus

Processor Memory
 Control Bus address bus
Address Register a bits 0
 Signals control transfer
1
data bus
of data 2
Data Register d bits 3
 Read request
 Write request read

Bus Control
write ...
 Done transfer
done
2a – 1

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Memory Devices
 Volatile Memory Devices
 Data is lost when device is powered off
 RAM = Random Access Memory
 DRAM = Dynamic RAM
 1-Transistor cell + trench capacitor
 Dense but slow, must be refreshed
 Typical choice for main memory
 SRAM: Static RAM
 6-Transistor cell, faster but less dense than DRAM
 Typical choice for cache memory
 Non-Volatile Memory Devices
 Stores information permanently
 ROM = Read Only Memory
 Used to store the information required to startup the computer
 Many types: ROM, EPROM, EEPROM, and FLASH
 FLASH memory can be erased electrically in blocks

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The Need for a Memory Hierarchy

 Widening speed gap between CPU and main memory

 Processor operation takes less than 1 ns
 Main memory requires more than 50 ns to access
 Each instruction involves at least one memory access
 One memory access to fetch the instruction
 A second memory access for load and store instructions

 Memory bandwidth limits the instruction execution rate

 Cache memory can help bridge the CPU-memory gap
 Cache memory is small in size but fast

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Typical Memory Hierarchy
 Registers are at the top of the hierarchy
 Typical size < 1 KB
 Access time < 0.5 ns

 Level 1 Cache (8 – 64 KB) Microprocessor

 Access time: 0.5 – 1 ns
Registers
 L2 Cache (512KB – 8MB) L1 Cache
 Access time: 2 – 10 ns
L2 Cache

Bigger
 Main Memory (1 – 2 GB) Faster Memory Bus
 Access time: 50 – 70 ns
Memory

 Disk Storage (> 200 GB) I/O Bus

 Access time: milliseconds
Disk, Tape, etc

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Processor
 Datapath: part of a processor that executes instructions

 Control: generates control signals for each instruction

Next Program
Counter
Program Counter

A
Instruction

Instruction Data
Registers L
Cache U Cache

Control

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Datapath Components
 Program Counter (PC)
 Contains address of instruction to be fetched
 Next Program Counter: computes address of next instruction

 Instruction Register (IR)

 Stores the fetched instruction

 Instruction and Data Caches

 Small and fast memory containing most recent instructions/data

 Register File
 General-purpose registers used for intermediate computations

 ALU = Arithmetic and Logic Unit

 Executes arithmetic and logic instructions

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 Buses
Fetch - Execute Cycle
Fetch instruction
Infinite Cycle implemented in Hardware

Instruction Fetch
Compute address of next instruction

Generate control signals for instruction

Instruction Decode
Read operands from registers

Execute Compute result value

Memory Access Read or write memory (load/store)

Writeback Result Writeback result in a register

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 Microprocessors Building Blocks

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Microprocessor
Data
Cache
Memory
Bus Control Arithmetic
RAM Bus Unit & Logic
Interface Unit
I/O Unit
Instruction Registers
System Decoder
Bus
Floating
Point
Unit
Instruction
Cache Registers
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Bus Interface Unit

 Receives instructions & data from main memory

 Instructions are then sent to the instruction cache, data to the data cache

 Also receives the processed data and sends it to the main memory

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Instruction Decoder

 This unit receives the programming instructions and decodes them into a form that is
understandable by the processing units, i.e. the ALU or FPU

 Then, it passes on the decoded instruction to the ALU or FPU

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Arithmetic & Logic Unit (ALU)
 Also known as the “Integer Unit”

 It performs whole-number math calculations (subtract, multiply, divide, etc)

comparisons (is greater than, is smaller than, etc.) and logical operations (NOT, OR,
AND, etc)

 The new breed of popular microprocessors have not one but two almost identical
ALU’s that can do calculations simultaneously, doubling the capability

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Floating-Point Unit (FPU)
 Also known as the “Numeric Unit”

 It performs calculations that involve numbers represented in the scientific

notation (also known as floating-point numbers).

 This notation can represent extremely small and extremely large numbers in a
compact form

 Floating-point calculations are required for doing graphics, engineering and

scientific work

 The ALU can do these calculations as well, but will do them very slowly

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Registers

 Both ALU & FPU have a very small amount of super-fast private memory placed
right next to them for their exclusive use. These are called registers

 The ALU & FPU store intermediate and final results from their calculations in these
registers

 Processed data goes back to the data cache and then to main memory from these
registers

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Control Unit
 The brain of the microprocessor

 Manages the whole microprocessor

 Tasks include fetching instructions & data, storing data, managing input/output
devices

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 That was the structure, now let’s talk
about the language of a microprocessor

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Instruction Set
 The set of machine instructions that a microprocessor recognizes and can execute
– the only language microprocessor knows

 An instruction set includes low-level, a single step-at-a-time instructions, such as

add, subtract, multiply, and divide

 Each microprocessor family has its unique instruction set

 Bigger instruction-sets mean more complex chips (higher costs, reduced

efficiency), but shorter programs

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Instruction Set Architecture (ISA)
 Architecture is an interface between layers

 ISA is the interface between hardware and software

 ISA is what is visible to the programmer (and ISA might be different for O.S. and
applications)

 ISA consists of:

 instructions (operations and how they are encoded)
 information units (size, how they are addressed etc.)
 registers (or more generally processor state)
 input-output control

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Some Computer families
 Computers that have the same (or very similar) ISA
 Compatibility of software between various implementations

 IBM
 704, 709, 70xx etc.. From 1955 till 1965
 360, 370, 43xx, 33xx From 1965 to the present
 Power PC

 DEC
 PDP-11, VAX From 1970 till 1985
 Alpha (now Compaq, now HP) in 1990’s

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More computer families
 Intel
 Early micros 40xx in early 70’s
 x86 (086,…,486, Pentium, Pentium Pro, Pentium 3, Pentium 4) from 1980 on
 IA-64 (Itanium) in 2001

 SUN
 Sparc, Ultra Sparc 1985 0n

 MIPS-SGI
 Mips 2000, 3000, 4400, 10000 from 1985 on

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Information units

 Basic unit is the bit (has value 0 or 1)

 Bits are grouped together in information units:
 Byte = 8 bits
 Word = 4 bytes
 Double word = 2 words
 etc.

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Addressing words
 Although machines are byte-addressable, words are the most commonly used I-
units
 Every word starts at an address divisible by 4

Word at address 0
Word at address 4

Word at address 8

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