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Solution - Exercises II - Solution-1

The document contains solutions to exercises related to digital logic and computer systems, including floating-point representation to decimal conversion, Hamming distance calculations, ASCII translations, BCD arithmetic operations, and fault tolerance checks. It provides detailed step-by-step solutions for each problem, demonstrating the application of concepts in digital logic. The exercises cover a range of topics, including binary arithmetic, error detection, and coding techniques.

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0% found this document useful (0 votes)
26 views4 pages

Solution - Exercises II - Solution-1

The document contains solutions to exercises related to digital logic and computer systems, including floating-point representation to decimal conversion, Hamming distance calculations, ASCII translations, BCD arithmetic operations, and fault tolerance checks. It provides detailed step-by-step solutions for each problem, demonstrating the application of concepts in digital logic. The exercises cover a range of topics, including binary arithmetic, error detection, and coding techniques.

Uploaded by

v892qx5gkd
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EEL 3701C - Digit Logic & Computer Systems

EXERCISES III
Solutions

Problem I (Floating-point representation to Decimal) 32-bits


Convert them to decimal number
a. 01000001010100010000000000000000
Sing = 0
Exponent = 10000010 = 130 – 127 = 3 = 23 = 8
Mantissa = 10100010000000000000000
= 1 * (1/2) + 0 * (1/4) + 1 * (1/8) + 0 * (1/16) + 0 * (1/32) + 0 * (1/64) + 1 * (1/128)
= 0.5 + 0.125 + 0. 0078125 = 0. 6328125

Answer = 8 * (1. 6328125) = 13.0625

b. 10111110100010000000000000000000

Sing = 1
Exponent = 01111101= 125 – 127 = -2 = 2-2 = 0.25
Mantissa = 00010000000000000000000
= 0 * (1/2) + 0 * (1/4) + 0 * (1/8) + 1 * (1/16)
= 0.0625

Answer = (-1) * (0.25) * (1.0625) = 0. 265625

Problem II (Hamming Distance)

a) Compute the Minimum Hamming Distance (MHD) for the coding {1101011, 1010110, 0000011,
0001100}
b) Modify the code by changing a single bit to increment the previous MHD by 1.

1101011 1010110 0000011 0001100


1101011 - - - -
1010110 5 - - -
0000011 3 4 - -
0001100 5 4 4 -
MHD = 3

1101111 1010110 0000011 0001100


1101011 - - - -
1010110 4 - - -
0000011 4 4 - -
0001100 4 4 4 -
MHD = 4

Other combinations: 1101011 → 1111011, 1101011 → 1101001, 1101011 → 1101010

Problem III (ASCII)

Using the ASCII translation table to convert the following binary representation to alphanumeric.

#1
01000111 01101111 01101100 01100100 01100101 01101110 00100000 01000001 01110010
01100011 01101000 01100101 01110011 00100000 01000110 01101111 01101111 01100100
Solution: Golden Arches Food

#2

01000100 01101001 01100111 01101001 01110100 01100001 01101100 00100000 01000100


01100101 01110011 01101001 01100111 01101110

Problem IV (Arithmetic with BCD)

Convert the number into BCD representation and perform the following operations.

a) 11 + 26
0001 0011
+0010 0110
0011 0111 <- Answer
b) 541 – 216
One way we subtract BCD is by adding the 10’s complement of the subtrahend to the minuend.
0101 0100 0001
-0010 0001 0110 <- 9’s complement = 0111 1000 0011 (9’s complement is calculated by
subtracting each decimal digit by 9
<- 10’s complement = 9’s complement + 1 = 0111 1000 0100

111
0101 0100 0001
+0111 1000 0100
1100 1100 0101 Highlighted blue indicates overflow (value over 9), so we must
add 6 to those two nibbles.
11 1 1
1100 1100 0101
+0110 0110 0000
1 0011 0010 0101 <- Answer Highlighted red is ignored.
Another way we can subtract BCD is by using the 1’s complement.
0101 0100 0001
- 0010 0001 0110 <- Convert to 1’s complement = 1101 1110 1001

1 1 11 1 1
0101 0100 0001
+ 1101 1110 1001
1 0011 0010 1010 The extra 1 is added to the LSB.

0011 0010 1011 The highlighted blue value is larger than 9, so we have to correct for overflow.
+ 1010
0011 0010 1 0101 <- Answer The red overflow bit is ignored.

c) 27+36

0010 0111
+0011 0110
0101 1101 Highlighted blue indicates overflow (value over 9), so we must add 6 to
those two nibbles.
11 1
0101 1101
+0000 0110
0110 0011 <- Answer
Problem V (Codes)

Gray Code

Problem VI (Fault Tolerant)

a) C O m p u t e r
b) Yes, see below
c) C o m p u t e r

MSB 11111111 0

00111111 1

00011101 0

Databits 0 1 1 0 0 0 0 0 0 Check column

01101110 1

11000001 1

LSB 11101010 1

Parity bits 10111000 0

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