GOVERNMENT ENGINEERING COLLEGE,

VALSAD

ELECTRICAL ENGINEERING DEPARTMENT

ANALOG AND DIGITAL ELECTRONICS

(3130907)

B.E. SEM –3RD

LAB MANUAL

ACADEMIC YEAR: 2021-2022 (ODD TERM)

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 CERTIFICATE

This is to certify that Mr./Mrs

of Electrical Branch, Sem-III, Enrollment No. has
satisfactorily completed his/her term work for the subject Analog and
Digital Electronics (3130907) during odd-term 2021.

Date:

Sign of Faculty: Head of the Department

2
 INDEX

PRACTICAL TITLE GRADE DATE SIGN OF

NO. FACULTY

1 To study and design the Inverting and Non-Inverting

configuration of Op-Amp

2 To study the application of Op-Amp 741 as an Adder

and Subtractor

3 To study the application of Op-Amp 741 as

Comparator

4 To study and test an Op-Amp as Differentiator and

Integrator

5 To study the application of Op-Amp as Low Pass and

High Pass Filter

6 To generate Square and Triangular wave using Op-

Amp

7 To study different parameters of an Op-Amp

8 Verification of function of Hall/Full adder circuit

9 Verification of function of Latch and Flip-Flop

10 Verification of function of Binary to Gray code

conversion

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 EXPERIMENT NO. – 1

AIM: To study and design an inverting and non-inverting configuration of an op-amp.

OBJECTIVE: To study and to understand basic and comprehend working and also the
characteristics of an inverting and non-inverting circuit. And also establish the relation
between input and output.
APPARATUS:
1. CRO
2. Function Generator
3. Bread board
4. 741 IC
5. 12V supply
6. Resistor 1KΩ, 10KΩ
7. Connecting Leads
THEORY:
INVERTING AMPLIFIER:
In an inverting amplifier circuit, the operational amplifier inverting input receives
feedback from the output of the amplifier. The non-inverting input of the
operational amplifier is connected to ground. In this type of amplifier, the output
is precisely 180° out of phase to input.
The circuit diagram of an inverting amplifier is as shown. The output signal is
‘inverted’ as shown. Therefore, amplifier is known as inverting amplifier.

resistance 𝑅i . The other resistance 𝑅f connected between the output and

The signal to be amplified has been connected to the inverting terminal via the

inverting input terminals is called as the feedback resistance. It introduces

negative

4
amplified and inverted version of the input signal 𝑉i.
feedback. The input and output voltage waveform are as shown. Output is an

Applying KCL at the inverting node of the amplifier circuit

0− 𝑉o
𝑉i + 0 =0
𝑅f
𝑅i −
Rƒ
= −
𝐴v =
Therefore, voltage gain
Vo Ri
Vi

NON-INVERTING AMPLIFIER:
The non-inverting amplifier using op-amp is as shown. Here the signal which is to be

(-) input terminal to ground via resistance 𝑅f . The input and output voltages are in the phase
amplified is applied to the non-inverting (+) input terminal of the op-amp and the inverting

with each other.

The negative feedback is introduced in this circuit via the feedback resistance 𝑅f
which is connected between the output and inverting terminal of the op-amp.
Apply KCL at the inverting node in the circuit
𝑉i − 𝑉o
5
𝑅f 𝑉o − 0
+ =0
𝑅i

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 Rƒ
= 1 +
=
𝐴v
Vo Ri
Therefore, voltage gain
Vi

PROCEDURE:
INVERTING AMPLIFIER
1. Set up the circuit as shown in fig.
Rƒ
= −
𝐴v
2. The circuit gives a close loop gain
Ri
3. Test the circuit by applying the input signal of suitable amplitude from a function
generator.
4. Observe the output waveform on the CRO and determine actual gain.
NON-INVERTING AMPLIFIER
1. Set up the circuit as shown in fig.
R
= 1 +
ƒ

𝐴v
2. The circuit gives a close loop gain
Ri
3. Test the circuit by applying the input signal of suitable amplitude from a function
generator.
4. Observe the output waveform on the CRO and determine actual gain.
OBSERVATION TABLE:
INVERTING AMPLIFIER
SR NO. 𝑹𝒊 (𝑲Ω) 𝑹𝒇 (𝑲Ω) Voltage gain 𝑽𝒊 (V) 𝑽𝒐 (V)

NON-INVERTING AMPLIFIER
SR NO. 𝑹𝒊 (𝑲Ω) 𝑹𝒇 (𝑲Ω) Voltage gain 𝑽𝒊 (V) 𝑽𝒐 (V)

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8
CALCULATIONS:

CONCLUSION:

VIVA QUESTION:
1. Define an amplifier and state a few applications of the amplifier.

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2. What is an op-amp and what are its type?

3. Draw the symbol of an op-amp and pin diagram of 741 op-amp. Describe its pin itself.

4. What is the operating voltage range of 741 op-amp IC?

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 EXPERIMENT NO. – 2

AIM: To Study the applications of Op-Amp 741 as an Adder and Subtractor.

OBJECTIVE: To study the working of op-amp as adder, subtractor of IC 741.

APPARATUS:

1. IC 741
2. Resistors (1KΩ)—4
3. Function generator
4. Regulated power supply
5. Bread board
6. CRO, Multimeter
7. Patch cards and CRO probes

CIRCUIT DIAGRAM:

ADDER

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SUBTRACTOR

THEORY:

ADDER:
Op-Amp may be used to design a circuit whose output is the sum of several input
signals such as circuit is called a summing amplifier or summer. We can obtain either
inverting or non- inverting summer.
The circuit diagrams show a two-input inverting summing amplifier. It has two input
voltages V1 and V2, two input resistors R1, R2and a feedback resistor Rf.
Assuming that Op-Amp is in ideal conditions and input bias current is assumed to be
zero, there is no voltage drop across the resistor R comp and hence then on inverting input
terminal is at ground potential.
By taking nodal equations.
𝑉1 � 𝑉o
𝑅1 �+ =0
𝑅
+
2 f

𝑅
2

𝑉o = − [( 𝑅)f𝑉1 + (𝑅
𝑅 ) 𝑉2]
𝑅2
f
1

Also, here
1
𝑅1 = 𝑅2 = 𝑅f = 1𝑘Ω

𝑉o = −(𝑉1 + 𝑉2)

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Thus, the output is inverted and sum of applied inputs.

SUBTRACTOR:
A basic differential amplifier can be used as a subtractor. It has two input signals
V1and V2and two input resistances R1andR2 and a feedback resistor Rf. The input signals
scaled to the desired values by selecting appropriate values for the external resistors.
From the figure, the output voltage of the differential amplifier with a gain of ‘1’
(Unity Gain) is
𝑅
𝑉o = − (𝑉2 − 𝑉1)
𝑅 f
𝑉o = 𝑉1 − 𝑉2
Also, 𝑅1 = 𝑅2 = 𝑅f = 1𝑘Ω

Thus, the output voltage Vo is equal to the voltage V1 applied to then on inverting terminal
minus voltage V2 applied to inverting terminal. Hence the circuit is subtractor.
PROCEDURE:
1. Connect all the connection as shown in figure for adder and subtractor.

3. Applying input voltage 𝑉1 and 𝑉2.

2. Ensure that the Op-Amp is compensated for output offset voltage

5. For different values of 𝑉1 and 𝑉2 measure the output voltage.

4. Using multimeter, measure the dc output voltage of the output terminal.

PRECAUTION:
1. Make null adjustment before applying the input signal.
2. Maintain proper VCC levels.
3. Ensure proper ground connections. Also ensure that the circuit does not absorb other
electrical noise.

OBSERVATION TABLE:

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ADDER

Theoretical Practical
V1 (volts) V2 (volts)
Vo = - (V1 + V2) Vo = - (V1 + V2)

SUBTRACTOR

Theoretical Practical
V1 (volts) V2 (volts)
Vo = (V1 - V2) Vo = (V1 - V2)

CONCLUSION:

VIVA QUESTION:
1. What is an adder and subtractor?

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2. Write the formulae for sum of three inputs for an op-amp.

3. What are the various DC characteristics of op-amp?

4. What are the various AC characteristics of op-amp?

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 EXPERIMENT NO. – 3

AIM: To study the application of IC 741 as comparator.

APPARATUS:
1. IC 741
2. Resistors (1KΩ)—4
3. Function generator
4. Regulated power supply
5. IC bread board trainer
6. CRO
7. Patch cards and CRO probes

THEORY:
COMPARATOR:

A comparator is a circuit which compares a signal voltage applied a

tone input of an op-amp with a known reference voltage at the other input. It is
basically an open l o o p op-amp with output ± Vsat as in the ideal transfer
characteristics.
It is clear that the change in the output state takes place with an
increment in input Vi. This the uncertain where the output cannot be directly
defined. There are basically 2 types of comparators,
1. Non-inverting comparator
2. Inverting comparator
The applications of comparator are zero crossing detector, window
detector, time marker generator and phase meter.

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MODEL GRAPH:

PROCEDURE:
1. Connections are made as per the circuit diagram.
2. Select the sine wave of10V peak to peak ,1K Hz frequency.
3. Apply the reference voltage 2V and trace the input and output wave forms.
4. Superimpose input a n d output waveforms and measure sine
wave amplitude with reference to Vref.
5. Repeat steps3and 4with reference voltages as 2V,4V, -2V, -4Vand observe

6. Replace sine wave input with 5V DC and 𝑉ref =0V.

the waveforms.

7. Observe dc voltage at output using CRO.

8. Slowly increase Vrefvoltage and observe the change in saturation voltage

OBSERVATION TABLE:

VOLTAGE INPUT 𝑉r OBSERVED SQUARE

ef

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CONCLUSION:

VIVA QUESTION:
1) What is a comparator?

2) What is reference voltage?

3) Classify comparators?

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 EXPERIMENT – 4

OP-AMP AS AN INTEGRATOR

AIM: To design and test an op-amp amplifier.

OBJECTIVE: To study the effect of integrator on different waveform and measuring the
frequency and peak to peak voltages of the output waveform.
APPARATUS:
1. DC power supply
2. CRO
3. Bread board
4. Function generator
5. IC 741
6. Resistor
7. Capacitors
THEORY:
The operation amplifier can be used in many applications. it can be used as
differentiator and integrator. In integrator the circuit performs the mathematical operation of
integrator that is the output waveform is the integrative of the input waveform or good
integration .one must ensure that the time period of the input signal is smaller than or equal
to RfC1 the practical integrator eliminates the problem of instability and high frequency
noise.

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GRAPH:

PROCEDURE:
1. Connect the integrator circuit as shown in figure. Adjust the signal generator to
produce a volt peak time sin waves at 100 Hz.
2. Observe input Vi and Vo simultaneously on the oscilloscope measure and record the
peak value of Vo and the phase angle of Vo with respect to Vi.
3. Repeat step 2 while increasing the frequency of the input signal. Find the maximum
frequency at which circuit offers differentiation compare it with the calculated value
of fa.
4. Connect the integrator circuit as shown in figure. Set the function generator to
produce square waves of 1 V peak to peak amplitude at 500 Hz. view simultaneously
output Vo and Vi.
5. Slowly adjust the input frequency until the output is good triangular waveform.
measure the amplitude and frequency of the input and output waveform.
6. Verify the following relation between R1Cf and input frequency for good integration
f>fa &T<R1C1.
7. Now set the function generator to a sine wave of 1 V peak to peak and frequency 500
Hz. adjust the frequency of the input until the output is a negative going cosine wave.
measure the frequency and the amplitude of the input output waveform.
OBSERVATION:
1. The time period and amplitude of the output waveform of differential amplifier
circuit.
2. Time period and amplitude of the integrator waveform.
CALCULATION:
Integrator:
Design an integrator that integrates a signal whose frequencies are between1
KHz and10 KHz.

1
 𝟏
𝒇𝒃 =
𝟐𝑹𝟏𝑪𝒇
The frequency at which the gain is 0
𝟏
𝒇𝒂 =
dB.

𝟐𝑹
𝒇𝑪𝒇

fa = gain limiting
frequency
The circuit acta as integrator for frequencies between 𝒇𝒂 and 𝒇𝒃. Generally 𝒇𝒂 < 𝒇𝒃

𝒇𝒂 = 1KHz
𝒇𝒃 = 10KHz
Let F = 0.01 F
R1 = 1.59K

Rf = 15K
RESULT:

Integrator:
𝟏
𝒇𝒂 =
𝟐𝑹
𝒇𝑪𝒇

T=

CONCLUSION:

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VIVA QUESTION
1. What is an integrator?

2. In which condition an RC circuit acts as an integrator?

3. Define cut-off frequency of an integrator?

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 OP-AMP AS AN DIFFERENTIATOR

AIM: To design and test an op amp differentiator and integrator.

APPARATUS:
1. DC power supply
2. CRO
3. Bread board
4. Function generator
COMPONENTS:
1. 15KΩ Resistor
2. 820 Resistor
3. 1.5KΩ Resistor
4. 0.01 F Capacitor
5. 0.5 nF Capacitor
6. IC 741
THEORY:
The operational amplifier can be used in many applications. It can be used as
differentiator and integrator. In differentiator the circuit performs the mathematical operation
of differentiation that is the output wave form is the derivative of the input waveform or good
differentiation, one must ensure tha the time period of the input signal is larger than or equal
to RfC1.the practical differentiator eliminates the problem of instability and high frequency
noise.

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GRAPH:

PROCEDURE:
1. Connect the differentiation circuit as shown in figure. Adjust the signal generator to
produce 5 V peak sine wave at 100 Hz.
2. Input Vi and Vo simultaneously on the oscilloscope measure and record the peak
value of Vo and the phase angle of Vo with respect to Vi.
3. The integrator circuit as shown in figure. set the function generator to produce square
waves of 1V peak to peak amplitude at 500 Hz. view simultaneously output Vo and
Vi.
4. Slowly adjust the input frequency until the output is good triangular waveform.
Measure the amplitude and frequency of the input and output waveform.
5. Verify the following relation between R1Cf and input frequency for good integration
f>fa &T<R1C1
6. Now set the function generator to a sine wave of 1 V peak to peak and frequency 500
Hz. adjust the frequency of the input until the output is a negative going cosine wave.
measure the frequency and the amplitude of the input output waveform.

OBSERVATION:
1. The time period and amplitude of the output waveform of differential amplifier circuit.
2. Time period and amplitude of the integrator waveform.

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CALCULATION:
Design a differentiator to differentiate an input signal that varies infrequency from10
Hz to 1 kHz.

𝟏
𝒇𝒃 =
𝟐𝑹
𝒇 𝑪𝟏

fa=1 kHz, the highest frequency of

the input signal Let C1=0.01 F,
Then, Rf=15.9 k

𝟏
Therefore, choose Rf =15.0 k
𝒇𝒂 =
𝟐𝑹
𝟏𝑪𝟏

Choose: fb=20x fa=20

KHz Hence R1=795
Therefore, choose
R1=820 R1C1=RfCf
Cf=0.54 nF
Therefore, choose Cf=0.5nF
RESULT
:

DIFFERENTIATOR:

𝟏
𝒇𝒃 =
𝟐𝑹
𝒇 𝑪𝟏

T>Rf C1=

CONCLUSION:

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VIVA QUESTION
1. What is differentiator?

2. In which condition on RC circuit acts as differentiator?

3. Define cut-off frequency of differentiator?

4. Compare differentiator and integrator?

2
 EXPERIMENT NO. – 5
AIM: To study op-amp as first order LPF and first order HPF and to obtain frequency
response.
OBJECTIVE:
1. Determine the amplitude and frequency response characteristic of low and high pass
filter.
2. Compare passive and active LPF abs HPF filter configurations.
APPARATUS:
1. IC 741
2. Resistor 10kΩ
3. Capacitor 0.1F
4. Bread broad trainer
5. CRO
6. Function Generator
7. Connecting Wire
8. Patch cards
THEORY:
LOW PASS FILTER:

The first order low pass butter worth filter uses an RC network for filtering. The op-
amp is used in then on inverting configuration. Hence it does not load down the RC network.
Resistor R1 and R2. Determine the gain of the filter.

2
 𝑉o
= 𝐴
𝑉
i f 𝑗f
1+
𝑓n
Rf
Af = = pass band gain of
1+
R1
filter

F = frequency of the input signal

1
2πR
Fn =
C
= high cut off frequency of filter

Vo
Vin
= gain of the filter as a function of frequency

Vo
Vin
The gain magnitude and phase angle of the LPF that can be obtained by converting into
its equivalent polar form as follows.

𝑉
| = 𝐴f √1 +𝐹()
2

|
o
𝐹1
𝑉
in

𝑓
∅ = − tan − 1( )
𝑓h
Φ is the phase angle in degrees
From the gain magnitude equation

Aƒ
2. At f = fn | |=
Vo
1. At very low frequency i.e., f < fn

Vin √2
3. At f > fn | | < Af
Vo

Vin

HIGH PASS FILTER:

2
 High pass filters are often formed simply by interchanging frequency.
Determining resistors and capacitors in LPFs that is, a first order HPF is formed from
a first order LPF by interchanging components ‘R ’and ‘C’ figure. Shows a first order
butter worth HpF with a lower cutoff frequency of ‘Fl’. This is the frequency at which
magnitude of the gain is 0.707times its pass band value. Obviously, all frequencies, with
the highest frequency determinate by the closed loop band width of op-amp.

𝑅f
For the first order HPF, the output voltage is

[1+ ] 𝑗2𝜋𝑅𝐶𝑉
𝑉o = 𝑅1 in

1 − 𝑗2𝜋𝐹𝑅𝐶

𝑉 𝐴f ( 𝑓 )
𝑓1
𝑉in =1 − 𝑗2𝜋𝐹𝑅𝐶
o

Where Af + Rf/R1 is a pass band gain of the filter.

F = frequency of input signal
F1 = lower cut off frequency

𝑓
Hence magnitude of the voltage gain is,

𝐴f ( )
𝑉 |= 𝑓1

| 𝑓 2
1 + ( )
o

𝑉 √ 𝑓1
in

Since, HPFs are formed from LPFs simply by interchanging R’s and C’s. The design and
frequency scaling procedures of the LPFs are also applicable to HPF.
PROCEDURE:

1. Connect circuit as shown in figure.

2. Apply sine wave of amplitude 4 Vp-p to the noninverting input terminal.
2
3. Values the input signal frequency.

2
 4. Note down the corresponding output voltages.
5. Calculate gain.
6. Tabulate the values.
7. Plot the graph between frequency and gain.
8. Identify stop band and pass band from the graph.
OBSERVATION TABLE:
LOW PASS FILTER:

Gain in dB 𝟐𝟎 𝐥𝐨𝐠( )
𝑽𝒐
FREQUENCY 𝑽𝒐
(V) 𝑽𝒊

HIGH PASS FILTER:

Gain in dB 𝟐𝟎 𝐥𝐨𝐠( )
𝑽𝒐
FREQUENCY 𝑽𝒐
(V) 𝑽𝒊

2
CONCLUSION:

VIVA QUESTION:
1. What is a filter circuit?

2. Classify various filters?

3. Calculate the cut off frequency of low pass filter?

4. What is 3db frequency?

2
 EXPERIMENT - 6

AIM: To generate triangular and square waveforms and to determine the time period of
the waveforms.
OBJECTIVE: To construct and demonstrate square wave and triangular wave generate using
op-amp IC 741.
APPARATUS:
1. Op-amp IC 41
2. Bread board IC trainer
3. Capacitor 0.1 µF
4. Zener diodes 96.2 V
5. Resistor – 10KΩ,150 KΩ,1.5 KΩ,1mΩ,8.2 KΩ, CRO
6. Patch cards
7. Connecting wires
THEORY:
The function generator consists of a comparator V1 and an integrator A2. The
comparators V2 compares the voltage at point P continuously with inverting input. When
voltage at P goes slightly below or above zero voltages the output of V1 is at the negative or
positive saturation level.

3
 To illustrate the circuit operation let us set the output of V 1 at positive saturation +Vsat
approximately +Vcc. This +Vsat is an input to the integrator V2. The output of V2, therefore
will be a negative going ramp. Thus, one end of the voltage divider R 2-R3 is the positive
saturation voltage +Vsat of V1 and other the negative going ramp on V2. When the negative
going ramp

attains a certain value of Vramp, point P is slightly below zero volts. Hence the output of the
V1 will be switch from positive saturation to negative saturation. This means that the output
of V2 will continue to increase until it reaches +V ramp. At this time the point P is slightly
above zero volts. The sequence then repeats. The frequency of the square is a function of the
DC supply voltage. Desired amplitude can be obtained by using approximate zeners at the
output of V1.

THEORETICAL VALUES:

(R3+R4)
Time period T = 4Rs
R1+R2

= 0.492 msec

VzR5

R1+R2
Positive peak ramp =

= 0.05 volts
PRACTICAL VALUES:
Time period of triangular wave =
Time period of square waves =
Positive peak ramp =
Voltage of square wave =
PROCEDURE:
1. Connect circuit as shown in figure.
2. The output of the comparator V1 is connected to the CRO through channel 1 to
generate a square wave.

3
3. The output of the comparator V2 is connected to the CRO through channel 2, to
generate a triangular wave.

3
 4. The time period of the square wave and triangular wave are noted and they are found
to be equal.
PRECAUTION:
1. Make null adjustment before applying the input signal.
2. Maintain proper Vcc levels.

MODEL GRAPH:

CONCLUSION:

VIVA QUESTION:
1. What are basic waveforms available?

3
2. Define sine wave?

3. Calculate the time period of square wave?

3
 EXPERIMENT - 7

AIM: To study different parameters of op-amp.

OBJECTIVE: To study the basic characteristics of an op-amp and its parameters.
APPARATUS:
1. DC Power Supply
2. Experimental bands and corresponding compounds
3. Electronic Calculator
4. Multimeter
THEORY:
COMMON MODE REJECTION RATIO (CMRR):

The CMRR is the rejection ratio. If a 1V change in the both implets leads to an
unwanted offset of 1 mV, then we have a 1000-fold relationship between absolute changes
and different error.
SLEW RATE:

3
 This parameter is a characteristics of the large signal transient response of an op-amp.
Normally the transient behaviour is governed by the frequency response characteristics of
equation but because of internal current limitations there is a limit to the maximum rate at
which the output voltage can change with time. The maximum value for dVo is called the slew
dVt
rate. It is typically measured for an op-amp in the unity gain mode.
INPUT OFFSET VOLTAGE (𝑉I0):

𝑉+ = 𝑉– = 0, the output voltage is not zero. It arises due imperfect matching of

This parameter highlights a shortcoming in all practical op-amp namely that even if 0

components within the op-amp circuit. Its effect is modelled by connecting a dc voltage
source of value VIO to the non-inverting terminal as shown in Fig.

INPUT BIAS CURRENT(𝐼IB):

This represents the base current of the input transistors inside the op-amp circuit. It is

shown in Fig. 3. The difference of the two bias currents is called the Input offset current 𝐼IB.
modeled by connecting dc current sources to the inverting and non-inverting terminals as

3
BANDWIDTH (𝑓r):
As mentioned earlier, the bandwidth of a real op-amp is finite. The open loop voltage
gain of the amplifier can be described by the relation

𝐴oL 𝐴oL(0) (𝑓) =

𝑓
1 + 𝑗𝐴
oL 𝑓
T

where 𝑓T is called the unity gain frequency of the op-amp because the voltage gain drops to
unity at this frequency. Eq. (1) can be used to determine the frequency characteristics of any
op-amp circuit. For example, for an inverting amplifier, the voltage gain can be shown to
have the following relationship with frequency
𝑅2
𝑅
𝐴v (𝑓) = − 1
𝑓
1+𝑗
𝑓β
where,

𝑓β 𝑓T𝑅
=1 + 2
𝑅1

It is important to remember that virtual ground assumptions are not true whenever
frequency response of op-amp is considered important.

PROCEDURE:
1. Setup the circuit for finding CMRR. Apply a Dc signal of 0.5V at the input and
measure VO. Calculate CMRR using the expression,
R
ƒ ƒ(
V Ri )
Vo
CMRR =

2. Feed a square wave to input and calculate slew rate using the expression 𝑆𝑅 =
ðVo
Express CMRR in dB using the expression 20log (CMRR)

t
where, 𝛿𝑉o is the voltage swing and t is the time taken to change the voltage levels.

current. Measure the output voltage using the expression 𝑉o = 𝐼B𝑅 and 𝑉o =
3. Set up the circuit for measuring input bias current and input offset voltage

3
𝐼B2, 𝑅1, 𝑅1𝐼B1 𝑎𝑛𝑑 𝐼B2 are calculated. Use the expression,

3
 𝐼B = (𝐼B1 + 𝐼B2)2
𝐼os = 𝐼B1 − 𝐼B2
CONCLUSION:

3
 EXPERIMENT NO. – 8

AIM: To verify the truth table of half adder and full adder and analyse the working of half
adder and full adder circuit with the help of LEDs.

APPARATUS:
1. Digital IC trainer kit
2. AND GATE
3. NOT GATE
4. OR GATE
5. EX-OR GATE
6. Connecting wires
THEORY:
Adders are digital circuits that carry out addition of numbers. Adders are a key
component of arithmetic logic unit. Adders can be constructed for most of the numerical
representations like Binary Coded Decimal (BCD), Excess – 3, Gray code, Binary etc. out of
these, binary addition is the most frequently performed task by most common adders. Apart
from addition, adders are also used in certain digital applications like table index calculation,
address decoding etc.
HALF ADDER:

A half adder adds two 1-bit binary numbers A and B to generates a 1-bit sum (S) and
1-bit carry (C) as output. The carry is theoretically carried on the next bit position. The final
sum numerically equals 2C + S. the simplest half adder design incorporates an XOR gate for
S and an AND gate for C. Half adder cannot be composed to produce larger bit adder as they

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 back a carry in input. The output S and C can be expressed as logical function of input
variables A, B as follow
S = 1 either if ( A=0 and B=1) or if (A = 1 and B = 0) =A XOR B
C = 1 only if ( A = 1 and B = 1) = A AND B

TRUTH TABLE:

FULL ADDER:

A full adder adds two 1-bit binary numbers along with a carry brought in and
produces a sum and carry out as output 1-bit full adder adds three 1-bit numbers often written

addition. Circuit produces a 2-bit output sum typically represented by the signals 𝐶out and S
as A, B and Cin, where A and B are the operands and Cin is a bit carried in form a spatial

where the sum numerically equals 2𝐶out + S. A full adder can be implemented in many
different ways using custom transistor level circuit of using other gates

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 𝑪𝒊𝒏
S = A XOR B XOR

𝑪𝒐𝒖𝒕 = ( 𝑨 𝑨𝑵𝑫 𝑩) 𝑶𝑹 ( 𝑪𝒊𝒏 𝑨𝑵𝑫 (

TRUTH TABLE: 𝑨 𝑿𝑶𝑹 𝑩))

RIPPLE CARRY ADDER:

count of the previous adder as its 𝐶in. This kind of adder is a ripple carry adder. Since the
Multiple full adders can be used to create adders of greater bit length. Each full adder uses the

carry bits “ripple” through the full adder stages. note that the first and only the first adder
may be replaced by a half adder.

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PROCEDURE:
1. Connect the supply(+5V) to the circuit.
2. First press "ADD" button to add basic state of your output in the given table.
3. Press the switches to select the required inputs "A" and "B".
4. Enter the Boolean input "A" and "B".
5. Press "ADD" button to add your inputs and outputs in the given table.
6. Repeat steps 3 & 4 for next state of inputs and their corresponding outputs.
7. Click on "Circuit" button to check the circuit diagram for half adder
8. Click on "Check" Button to verify your output.
9. Press the "PRINT" button after completing your simulation to get your results.

CONCLUSION:

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 EXPERIMENT – 9

AIM: To verify the truth table and timing diagram of RS, JK, T and D flip-flops by using
NAND & NOR gates ICs and analyse the circuit of RS, JK, T and D flip-flops with the help
of LEDs display.
APPARATUS:
1. IC 7400, IC 7402
2. Digital trainer kit
3. Connecting leads
THEORY:
A flip flop is an electronic circuit with two stable states that can be used to store
binary data. The stored data can be changed by applying varying inputs. Flip-flops and
latches are fundamental building blocks of digital electronics systems used in computers,
communications, and many other types of systems.
1. R-S flip flop
2. D flip flop
3. J-K flip flop
4. T flip flop
1. RS Flip Flop:
The basic NAND gate RS flip flop circuit is used to store the data and thus provides
feedback from both of its outputs again back to its inputs. The RS flip flop actually has three
inputs, SET, RESET and clock pulse.

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TRUTH TABLE:

2. D Flip Flop:
A D flip flop has a single data input. This type of flip flop is obtained from the SR flip
flop by connecting the R input through an inverter, and the S input is connected directly to
data input. The modified clocked SR flip-flop is known as D-flip-flop and is shown below.
From the truth table of SR flip-flop, we see that the output of the SR flip-flop is in
unpredictable state when the inputs are same and high. In many practical applications, these
input conditions are not required. These input conditions can be avoided by making them
complement of each other.

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TRUTH

INPUT OUTPUT

D Reset Clock Q 𝑄'

0 0 0 0 1

0 0 1 0 1

0 1 0 0 1
0 1 1 0 1

1 0 0 0 1
1 0 1 1 0

1 1 0 0 1

1 1 1 0 1

3. J-K Flip Flop

In a RS flip-flop the input R=S=1 leads to an indeterminate output. The RS flip-flop
circuit may be re-joined if both inputs are 1 than also the outputs are complement of each
other as shown in characteristics table below.

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TRUTH

4. T Flip Flop:
T flip-flop is known as toggle flip-flop. The T flip-flop is modification of the J-K flip-
flop. Both the JK inputs of the JK flip – flop is held at logic 1 and the clock signal continuous
to change as shown in table below.

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TRUTH

PROCEDURE:
1. Make the circuit as shown in the figure.
2. Connect the supply(+5V) to the circuit.
3. First press "ADD" button to add basic state of your output in the given table.
4. Press the switches to select the required inputs "S" and "R" and apply the clock
pulse.
5. Press "ADD" button to add your inputs and outputs in the given table and their
corresponding graph.
6. Repeat steps 3&4 for next state of inputs and their corresponding outputs.
7. Press the "Print" button after completing your simulation to get your results.
8. Verify with the truth table.
CONCLUSION:

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 EXPERIMENT – 10

AIM: Verification of function of Binary to Gray code conversion.

APPARATUS:
1. NAND Gate
2. Digital trainer kit
THEORY:
Binary Numbers is default way to store numbers, but in many applications binary
numbers are difficult to use and a variation of binary numbers is needed. Gray code is an
ordering of the binary numeral system such that two successive values differ in only one bit
(binary digit). Gray codes are very useful in the normal sequence of binary numbers
generated by the hardware that may cause an error or ambiguity during the transition from
one number to the next. So, the Gray code can eliminate this problem easily since only one
bit changes its value during any transition between two numbers.
Gray code has property that two successive numbers differ in only one bit because of
this property gray code does the cycling through various states with minimal effort and used
in K-maps, error correction, communication etc.
In computer science many a times we need to convert binary code to gray code and
vice versa. This conversion can be done by applying following rules:
1. Binary to Gray conversion:
1. The Most Significant Bit (MSB) of the gray code is always equal to the MSB
of the given binary code.
2. Other bits of the output gray code can be obtained by Ex-Or binary code bit at
that index and previous index.

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 There are four inputs and four outputs. The input variable are defined as B3, B2, B1,
B0 and the output variables are defined as G3, G2, G1, G0. From the truth table,
combinational circuit is designed. The logical expressions are defined as:
B3 = G3
B2 ⊕ B3 = G2
B1 ⊕ B2 = G1
B0 ⊕ B1 = G0

TRUTH TABLE:

PROCEDURE:
1. Connect battery to supply 5V to the circuit.
2. Press Switches for different inputs.

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 3. The corresponding combination of input and output LEDs lit up for different
combination of inputs. The input Gray code LEDs are G3, G2, G1 and G0 and the
output binary code LEDs B3, B2, B1 and B0 glow accordingly.
4. Click "Add" to add the values to the Truth Table.
5. Click "Print" to get the print out of the Truth Table.

CONCLUSION: