COURSE: EMBEDDED SYSTEM

Chapter 1. Introduction to Embedded System

Assoc. Prof. Dr. Truong Ngoc Son

Faculty of Electrical and Electronics Engineering
HCMC University of Technology and Education
Definition of Embedded System
• It is a electronic systems designed to perform a specific function and
is a combination of both hardware and software
• A combination of hardware and software which together form a
component of a large machine
• An embedded system is an electronic system, which includes a single
chip microcomputers (Microcontroller) like the ARM, Cortex, etc.
• An embedded system is a combination of computer hardware and
software, and sometimes mechanical components as well
• It is configured to perform a dedicated application
• Every embedded microcomputer system accepts inputs, performs
computations, and generate outputs and run in “real-time”
Definition of Embedded System
• Computer is a multipurpose machine
• Embedded system differs from general-purpose computing devices
mainly in two aspects:
• An embedded system is designed simply for a specific function, whereas a
general-purpose computing device, such as smartphone, laptop, or desktop
computer
• an embedded system is traditionally built together with the software intended
to run on it. Such a parallel model of developing hardware and software
together is known as hardware-software co-design
Definition of Embedded System

Connected to sensors,
connected to actuators
Real-time operation
Programmed one

Microcomputer board
(CPU, Memory, Interface)
Embedded System examples
Embedded System applications
Classification of Embedded systems
• Small scale Embedded system
• Microcontroller –based system: 8051, AVR, PIC, …
• Single 8 bit or 16bit Microcontroller.
• Little hardware and software complexity
• They May even be battery operated
• Usually “C” is used for developing these system
• Programming tools: Editor, Assembler and Cross Assembler
Classification of Embedded systems
• Medium scale Embedded system
• Single or few 16 or 32 bit microcontrollers or Digital Signal Processors (DSP)
or Reduced Instructions Set Computers (RISC)
• Both hardware and software complexity
• Programming tools: RTOS, Source code Engineering Tool, Simulator,
Debugger and Integrated Development Environment (IDE).
Classification of Embedded systems
• Sophisticated Embedded system
• Enormous hardware and software complexity
• Which may need scalable processor or configurable processor and
programming logic arrays
• Programming Tools: local compiler, cross-compiler, linux
Characteristics of Embedded system
• Design an embedded system
• Application
• Requirements
• Characteristics
• Characteristics
• Dependability
• Efficiency
• Real-time constraints
Characteristics of Embedded system
•Dependability
• Make user to safely rely on the system
• Airplanes
• Nuclear power plants
• Automotive break system
• Automation system (car, airplane, robot, etc)
• Dependability is a critical importance
• Connected to the environment
• Immediate impact on environment
Characteristics of Embedded system
• Attributes of Dependability
• Reliable
• Available
• Maintainable
• Safe
• Secure
Characteristics of Embedded system
• Efficiency
• Energy efficiency
• Code size
• Weight
• Cost
Characteristics of Embedded system
• Real-time Constraints
• If real-time constraints are not met:
• Low quality
• Serious consequences
• Lack of dependability
Design flow of Embedded system
• Example of design flow
 COURSE: EMBEDDED SYSTEM

Chapter 2. EMBEDDED HARDWARE

Assoc. Prof. Dr. Truong Ngoc Son

Faculty of Electrical and Electronics Engineering
HCMC University of Technology and Education
Embedded system Architecture
Architecture of Embedded Hardware
•Processor
•Memory
•Input/output
 Microprocessor and Microcontroller
Fundamentals

Microprocessor

Semiconductor CMOS technology

65nm, 20nm, 17nm
Microprocessor and Microcontroller
Fundamentals
•Microprocessor (CPU)
• Read instructions
• Process binary data
Microprocessor and Microcontroller
Fundamentals
Microprocessor and Microcontroller
Fundamentals
•Microprocessor system
Microprocessor and Microcontroller
Fundamentals
•Microcontroller (MCU)
• An integrated electronic computing device that
includes three major components on a single chip
• Microprocessor (MPU)
• Memory
• I/O (Input/Output) ports
Microprocessor and Microcontroller
Fundamentals
• Microcontroller = Microprocessor system
Microprocessor and Microcontroller
Fundamentals
• Microcontroller = Microprocessor system
Microprocessor and Microcontroller
Fundamentals
•Block Diagram
Microprocessor and Microcontroller
Fundamentals
•Block Diagram of 8051 Microcontroller
Microprocessor and Microcontroller
Fundamentals
•Block Diagram
Microprocessor and Microcontroller
Fundamentals
Microprocessor and Microcontroller
Fundamentals
 RISC and CISC architecture
 The term RISC stands for ‘Reduced Instruction
Set Computer’. It is a CPU design strategy based
on simple instructions and fast performance.
 RISC is small or reduced set of instructions
 One Cycle Execution Time
 Pipelining: A technique that allows for
simultaneous execution of parts, or stages, of
instructions to more efficiently process
instructions
Microprocessor and Microcontroller
Fundamentals
 RISC and CISC architecture
 CISC: Complex Instruction Set Computer,
computers have shorted programs. It has a large
number of complex instructions, which takes long
time to execute
 The CISC machines have good performances,
based on the simplification of program compilers
 CISC Approach: The CISC approach attempts to
minimize the number of instructions per
program
 RISC Approach RISC does the opposite,
reducing the cycles per instruction at the cost of
the number of instructions per program
Memory
• Embedded system memory
• RAM
• ROM
• Hybrid
Memory
• ROM (read only memory)
• ROM stands for Read Only Memory
• The memory from which we can only read but cannot
write on it
• This type of memory is non-volatile.
• The information is stored permanently in such memories
during manufacture
• A ROM stores such instructions that are required to start
a computer. This operation is referred to as bootstrap
Memory
• PROM (Programmable Read Only Memory)
• PROM is read-only memory that can be modified only
once by a user
• The user buys a blank PROM and enters the desired
contents using a PROM program
• Inside the PROM chip, there are small fuses which are
burnt open during programming.
• It can be programmed only once and is not erasable
Memory
• EPROM (Erasable and Programmable Read Only Memory)
• EPROM can be erased by exposing it to ultra-violet light
for a duration of up to 40 minutes
• During programming, an electrical charge is trapped in an
insulated gate region.
• The charge is retained for more than 10 years because the
charge has no leakage path
Memory
• EEPROM (Electrically Erasable and Programmable Read
Only Memory)
• EEPROM is programmed and erased electrically.
• It can be erased and reprogrammed about ten thousand
times.
• Both erasing and programming take about 4 to 10 ms
(millisecond).
• In EEPROM, any location can be selectively erased and
programmed
Memory
• RAM (Random Access Memory)
• Static RAM (SRAM)
• Dynamic RAM (DRAM)
Memory
• Characteristic of Static RAM
• Long life
• No need to refresh
• Faster
• Used as cache memory
• Large size
• Expensive
• High power consumption
Memory
• Characteristics of Dynamic RAM
• Short data lifetime
• Needs to be refreshed continuously
• Slower as compared to SRAM
• Used as RAM
• Smaller in size
• Less expensive
• Less power consumption
Memory
• SDRAM (Synchronous DRAM)
• SDRAM (Synchronous DRAM) was designed to
synchronize the DRAM operation to the rest of the
computer system and to eliminate defining all the
different modes of memory operations based on the
sequence of CE# (Chip Enable active low), RAS#, CAS# and
WE# edge transitions.
• DDR – SDRAM (Double Data Rate SDRAM)
• DDR (Double Data Rate) SDRAMs increased the memory
data rate performance by increasing clock rates, bursting
of data and transferring two data bits per clock cycle
• DDR2 SDRAM, DDR3 SDRAM, DDR4 SDRAM, LPDDR (Low
Power DDR), GDDR2 (Graphics DDR2), GDDR3, GDDR4
and GDDR5
Memory
• Flash memory
• Flash memory is specially-arranged EEPROMs, occupying
a smaller area than EEPROM or DRAM arranged in other
structures
• Nor flash
• Nand flash
Memory
• NAND Flash
• Two basic types of flash devices are generally
available, NAND and NOR. These have quite
distinct physical characteristics
• NAND flash (also AND) is a newer flash chip
technology than NOR. The primary difference is:
• NAND can store approximately four times as
much data as NOR flash for about the same price.
• NAND has much faster erase and write times, so is
a superior choice for applications that require regular
data storage.
Memory
• NAND Flash
 Memory Allocation and Memory Map
• The memory addresses generated by the CPU are called virtual
addresses to distinguish them from the physical addresses used by
main memory. In between the CPU and main memory there’s a new
piece of hardware called the memory management unit (MMU). The
MMU’s job is to translate virtual addresses to physical addresses.
 Memory Allocation and Memory Map
• The MMU hardware translates virtual addresses to physical
addresses using a simple table lookup. This table is called the page
map or page table
Example of Memory Design
Example of Memory Design
 Memory map of Microcontroller
• Program memory and data memory
Microcontroller system – External memory design
Microcontroller system – External memory design
Communication
• UART
• SPI
• I2C
• One-wire
UART-Universal Asynchronous
Receiver/Transmitter
• Hardware that translates between parallel and serial forms
• Commonly used in conjunction with communication standards
such as EIA, RS-232, RS-422 or RS-485
• The universal designation indicates that the data format and
transmission speeds are configurable and that the actual electric
signaling levels and methods (such as differential signaling etc.)
typically are handled by a special driver circuit external to the
UART.
UART
• Each character is sent as
• a logic low start bit
• a configurable number of data bits (usually 7 or 8,
sometimes 5)
• an optional parity bit
• one or more logic high stop bits
• with a particular bit timing (“baud”)
• Examples
• “9600-N-8-1”  <baudrate><parity><databits><stopbits>
• “9600-8-N-1”  <baudrate><databits><parity><stopbits>
UART
• Start Bit
• The UART data transmission line is normally held at a high
voltage level when it’s not transmitting data. To start the
transfer of data, the transmitting UART pulls the transmission
line from high to low for one clock cycle. When the receiving
UART detects the high to low voltage transition, it begins
reading the bits in the data frame at the frequency of the baud
rate
• Data Frame
• The data frame contains the actual data being transferred. It
can be 5 bits up to 8 bits long if a parity bit is used. If no parity
bit is used, the data frame can be 9 bits long. In most cases, the
data is sent with the least significant bit first.
• Parity
• Parity describes the evenness or oddness of a number. The
parity bit is a way for the receiving UART to tell if any data
has changed during transmission
• Stop Bits
• To signal the end of the data packet, the sending UART drives
the data transmission line from a low voltage to a high voltage
for at least two bit durations.
UART
• The RXD signal of a UART is the signal receiving the data.
This will be an input and is usually connected to the TXD line
of the downstream device.

• The TXD signal of a UART is the signal transmitting the data.

This will be an output and is usually connected to the RXD
line of the downstream device.

• The RTS# (Ready to Send) signal of a UART is used to indicate

to the downstream device that the device is ready to receive
data. This will be an output and is usually connected to the
CTS# line of the downstream device.

• The CTS# (Clear to Send) signal of a UART is used by the

downstream device to identify that it is OK to transmit data
to the upsteam device. This will be an input and is usually
connected to the RTS# line of the upstream device.
 UART
DB9 stuff

Wiring a DTE device to a DCE device for communication is easy.

The pins are a one-to-one connection, meaning all wires go from pin x to pin x.
A straight through cable is commonly used for this application.
In contrast, wiring two DTE devices together requires crossing the transmit and
receive wires.
This cable is known as a null modem or crossover cable.
UART
RS-232 transmission example
UART
• Advantages
• Only uses two wires
• No clock signal is necessary
• Has a parity bit to allow for error checking
• The structure of the data packet can be changed as long
as both sides are set up for it
• Well documented and widely used method
• Disadvantages
• The size of the data frame is limited to a maximum of 9
bits
• Doesn’t support multiple slave or multiple master systems
• The baud rates of each UART must be within 10% of
each other
SPI- Basic Serial Peripheral Interface (SPI)
• What is it?
• Basic Serial Peripheral Interface (SPI)
• Capabilities
• Protocol
• Pro / Cons and Competitor
• Uses
• Conclusion
SPI- Basic Serial Peripheral Interface (SPI)

• Developed by Motorola
• Serial Bus protocol
• Synchronous Serial Communication
• Fast, Easy to use, Simple
• Everyone supports it
SPI- Serial Peripheral Interface (SPI)
 A communication protocol using 4 wires
 Also known as a 4 wire bus

 Used to communicate across small distances

 Multiple Slaves, Single Master

 Synchronized
SPI- Basic Serial Peripheral Interface (SPI)
 Always Full Duplex
 Communicating in two directions at the same
time
 Transmission need not be meaningful

 Multiple Mbps transmission speed

 Transfers data in 4 to 16 bit characters

 Multiple slaves

 Daisy-chaining possible
SPI- Basic Serial Peripheral Interface (SPI)
 Wires:
 Master Out Slave In (MOSI)

 Master In Slave Out (MISO)

 System Clock (SCLK)

 Slave Select 1…N

 Master Set Slave Select low

 Master Generates Clock

 Shift registers shift in and out data

SPI- Basic Serial Peripheral Interface (SPI)
MOSI – Carries data out of Master to
Slave
MISO – Carries data from Slave to Master
 Both signals happen for every transmission
SS_BAR – Unique line to select a slave
SCLK – Master produced clock to
synchronize data transfer
SPI- Basic Serial Peripheral Interface (SPI)
• Shifting Protocol
SPI- Basic Serial Peripheral Interface (SPI)

Some wires have been renamed

Master and multiple independent Master and multiple daisy-

slaves chained slaves
http://upload.wikimedia.org/wikipedia/commons/thumb/f/fc/SPI_three_sla http://www.maxim-ic.com/appnotes.cfm/an_pk/3947
ves.svg/350px-SPI_three_slaves.svg.png
SPI- Basic Serial Peripheral Interface (SPI)
Pros:
 Fast and easy

 Fast for point-to-point connections

 Easily allows streaming/Constant data inflow
 No addressing/Simple to implement
 Everyone supports it
Cons:
 SS makes multiple slaves very complicated

 No acknowledgement ability

 No inherent arbitration

 No flow control
SPI- Basic Serial Peripheral Interface (SPI)
 Uses
 Some Serial Encoders/Decoders, Converters, Serial LCDs, Sensors, etc.
 Pre-SPI serial devices
I2C- Inter-Integrated Circuit
• Invented by Philips in the early 1980’s
• Two-wire serial bus protocol
Version 1.0 was published in 1992. This version supports
standard (100 Kbps) and fast (400 Kbps) mode
Version 2.0 was published in 1998. The high-speed
mode (3.4 Mbps) was added.
 Classifies devices into slave and master
 Allow multiple masters to be attached to the same bus
 The master device uses either a 7-bit or 10-bit address
to specify the slave device as its partner of data
communication.
 Supports bi-directional data transfer
 Allow multiple masters (microcontrollers) to share the
same peripheral devices
I2C- Inter-Integrated Circuit
• I2C Signal Level
Float high and driven low
 Use the SCL signal to carry clock signal to
synchronize data transfer
 Use the SDA signal to carry data and address
 The SDA and SCL pins of I2C devices (masters
and slaves) are open-drain and need
• external pull up resistors
 The resistors 2.2 KW and 1 KW are
recommended for 100 kbps and 400 kbps baud
rate
I2C- Inter-Integrated Circuit
I2C- Inter-Integrated Circuit
• Signal Components
 I2C data transfer consists of 5 signal components:
• (a) Start (S)
• (b) Stop (P) SD A
• (c) Repeated Start (R)
• (d) Data SC L

• (e) Acknowledge (A) Figu re 11.2 I 2 C Start cond itio n

• Start Condition
 Used to indicate that a device would like to transfer
data on the I2C bus
 Represented by the SDA line going low when the
clock (SCL) signal is high
 Will initialize the I2C bus
I2C- Inter-Integrated Circuit
• Stop Condition
 A condition that a device wants to release the I2C
bus
 Is represented by the SDA signal going high when
the SCL signal is high
 Once the stop condition is complete, both the SCL
and SDA signals are high. This is
• the idle bus.

SDA

SCL

Figu re 11.3 Stop (P ) condition

I2C- Inter-Integrated Circuit
• Repeated Start (R) Condition
• A Start signal generated without first generating a
Stop condition to terminate the communication
used by the master to communicate with another
slave or change data transfer direction without
releasing the bus
• Also referred to as Restart condition

SDA

SCL

data transfer restart

start condtion condition
Figure 11.4 Restart condition
I2C- Inter-Integrated Circuit
• Data
 Represents the transfer of eight bits of information
 Data on the SDA line is considered valid only when
the SCL signal is high.
 When the SCL signal is low, data is allowed to
change.
 The eight-bit data may be a control code, an
address, or data.
I2C- Inter-Integrated Circuit
• Acknowledge (ACK) Condition
 Data transfer needs to be acknowledged either
positively (A) or negatively (NACK).
 A device acknowledges a byte it received positively by
bringing the SDA line low
• during the ninth clock pulse of SCL.
 If the device allows the SDA line to float high, it is
transmitting a negative
• acknowledge (NACK).

SDA SDA

SCL SCL

Figure 11.6 ACK condition Figure 11.7 NACK condition

I2C- Inter-Integrated Circuit
• I2C Addressing Methods
I2C protocol allows master devices to use either the 7-
bit and 10-bit address to specify the slave device for
data communication.
 The 7-bit addressing uses the upper 7 bits of the
address byte for address and the least significant bit to
specify the data transfer direction.
 The 10-bit addressing uses two bytes to carry the
address information.
• (a) The bit 0 of the high byte is used to indicate the
data transfer direction.
• (b) The upper 7 bits have the pattern of 1111 0xx with
xx representing the most significant two address bits of
the slave.
• (c) The second byte carries the lower 8 address bits.
A6 A5 A4 A3 A2 A1 A0 R/W

Figure 11.13a 7-bit I2C address

1 1 1 1 0 A9 A8 R/W A7 A6 A5 A4 A3 A2 A1 A0

Figure 11.13b 10-bit I2C address

I2C- Inter-Integrated Circuit
• Data Transfer Format (7-bit addressing)
 Master transmitter to slave receiver
 Master reads slave immediately after the first byte (address
byte)
I2C- Inter-Integrated Circuit
• Combined format
• A master may transfer some data to the slave and
then generate a restart condition to read data from
the slave or send/read data to/from other slave.
I2C- Inter-Integrated Circuit
• Circuit Connection

Typically, Rp =4.7K
One-wire
• One wire serial communication
• Network is defined with an open-drain (wired-AND)
master/slave multidrop architecture with resistor pull-
up to a nominal 5V supply at the master
One-wire
• One wire Operation
One-wire
Assignment #01
• Design a Microcontroller system:
• ATMEGA128
• 32 LEDs
• 8 seven-segment displays
• 08 relays
• 01 20x4 LCD
• 8 push buttons
• 2 DC motors
• Input sensor DS18B20 (one-wire)
• Input real-time DS1307 (I2C)
• Input sensor (PC…) SPI
• UART (terminal)
• Phase 1: Schematic design
• Phase 2: Write C program to interface all devices
• Define C function to read all sensor, control all devices
• Phase 3: Complete C program for the above system
• Write a C program to display the value reported from all sensor, turn on/off device
individually by selecting function on the menu list
 COURSE: EMBEDDED SYSTEM

Chapter 3. EMBEDDED SYSTEM DESIGN

Assoc. Prof. Dr. Truong Ngoc Son

Faculty of Electrical and Electronics Engineering
HCMC University of Technology and Education
Embedded System Prototype
• NXP i.MX6
Embedded System Prototype
• Allwinner R8 Cortex A8 processor,
Embedded System Prototype
• Orange Pi
Embedded System Prototype
• Raspberry Pi
Embedded System Prototype
• Orange Pi PC schematic
 COURSE: EMBEDDED SYSTEM

Chapter 3. EMBEDDED SOFTWARE

Assoc. Prof. Dr. Truong Ngoc Son

Faculty of Electrical and Electronics Engineering
HCMC University of Technology and Education
 Embedded Software Architecture
Traditional embedded system Embedded system based on operating
system
Embedded Software Architecture

Bootloader
Boot Parameters

Kernel

Root Filesystem
 Bootloader
• Initialize hardware elements
• Load kernel
• Passing control to the kernel
• Many bootloaders for each architecture
• LILO and GRUB for x86
• U-Boot for x86, ARM, PowerPC (http://u-
boot.sourceforge.net/)
• Bootloader also depends on various hardware
• Processor family
• Chipsets present on the hardware platform
• Boot device and OS running on the device
• All type CPU will execute the instructions from the
defined address when power on
• Normally, there exists some solid storage devices mapped to
defined address
• ROM, EEPROM, FLASH, etc
Bootloader
 Bootloader
• The only job of a boot loader:
• To load other software for the operating system to start
• To initialize platform:
• Load the Linux kernel
• Kernel can be downloaded by using tftp/bootp.
• Kernel is accessed from flash if it resides in Flash.
• Run the Linux kernel
• Setup various initialization parameters:
• Command line: root=/dev/nfs ….
• Platform ID (stored in r1)
Bootloader
Bootloader
Embedded Operating System
Typical Embedded Operating Systems
• Windows CE /Mobile Windows
• Palm OS
• EPOC
• uC/OS-II
• Symbian OS
• RTOS:
• VxWorks, pSOS…
• Linux:
• uClinux, Montavista Linux, ARM-Linux…
Linux Kernel
Kernel Space
• Kernel structure
• Data structure of Process
• Process ID, Priority, Status, Registers used, Interrupt,
Global variables
• Process Management
• User’s service routines in a forever loop
• Time Management
• Required time delay for interrupt
• Inter-process Communication & Synchronization
• Semaphores, message boxes, message queues
• Memory Management
• Mechanism of memory allocation and release
 Kernel Architecture of RTOS
• Kernel Primitive
• Issue system calls for Interrupts
• Interfacing the processes to the system
• Interrupt Service Routine (ISR)
• Software interrupt & hardware interrupt
• Process Scheduler
• A dispatcher
• First-come-first-serviced Scheduling (FCFS)
• Priority Scheduling (PS)
• Preemptive
• Non-preemptive
Kernel Directory Structure
 Root Filesystem
Filesystem Write Always Power Compress In
Down RAM
reliability

CRAMFS n n n y n
JFFS2 y y y y n
JFFS y y y n n
NFTL/Ext2 y y n n n
NFTL/Ext3 y y y n n
RAMDISK/ y n n n y
Ext2

NFTL:NAND Flash Transfer Layer

 The cramfs Filesystem
• Cramfs
• The compressed ROM filesystem (or cramfs)
• A free (GPL'ed) read-only Linux file system designed for simplicity
and space-efficiency
• Cramfs is used on a number of embedded systems and small
devices
• File size <16MB
• Capacity<256MB
• Kernel’s PAGE_CACHE_SIZE=4096B
 The ext2 Filesystem
• Advantages:
• Support up to 4TB memory
• Support 1012 bytes long file name
• symbolic link : index table speed up
• Disadvantages :
• IDE device design: 1block=512, 1024, 2048…
• NAND FLASH not support
• ERASE/Write
• No balance management
 The JFFS2 Filesystem
• JFFS2
• A log-structured file system designed for use on flash devices in
embedded systems.
• Features
• Compression ratio < cramfs
• Better than ext2 in (r/w/erase)
• Power down no crash
• If full slow down performance
Embedded System Development
• Building Linux kernel
• Building Device driver
• Install a module
• Application development
Building Linux kernel
• Building Linux kernel for embedded system
• The kernel can be built locally
• The kernel can be built using cross-compiler
 Embedded System Development
• Cross-Development Environment - cross-compiler
• A “cross-compiler” is a compiler that creates executable
code for a different architecture. In the case of developing
your Linux BSP, you’ll be compiling on your PC but the
code you make is targeting your custom board
• Toolchain: A toolchain is the set of tools that compiles
source code into executables that can run on your target
device, and includes a compiler, a linker, and run-time
libraries
• Cross compilation with Yocto
 Embedded System Development
• Cross-Development Environment
 Labs
• Build an OS for emdedded system
• Write a simple char driver for embedded system