Microprocessor and Peripherals
Microprocessor and Peripherals
Types of Microprocessor
Microprocessors are classified into five types, namely: CISC-Complex Instruction Set
Microprocessors, RISC-Reduced Instruction Set Microprocessor, ASIC- Application Specific
Integrated Circuit, Superscalar Processors, DSP’s-Digital Signal Microprocessors.
Complex Instruction Set Microprocessors
The short term of Complex Instruction Set Microprocessors is CISM and they classify
a microprocessor in which orders can be performed together along with other low level
activities. These types of processors performs the different tasks like downloading,
uploading, recalling data into the memory card and recalling data from the memory
card. Apart from these tasks, it also does complex mathematical calculations in a
single command.
Superscalar Microprocessors
Superscalar processor facsimiles the hardware on the processor to perform various
tasks at a time. These processors can be used for ALUs or multipliers. They have
different operational units and these processors can carry out more than a one
command by continuously transmitting several instructions to the extra operational
units inside the processor.
Classification of Microprocessor:
The microprocessor is identified with the word size of data. For E.g. The ALU can perform a 4- bit data
operation at a time these microprocessor is called as 4-bit microprocessor.
4-Bit Processors
8-Bit Processors
16-Bit Processors
32-Bit Processors
64-Bit Processors
Evolution of microprocessors
4-bit Microprocessors
The first microprocessor was introduced in 1971 by Intel Corp. It was named Intel
4004 as it was a 4 bit processor. It was a processor on a single chip. It could perform
simple arithmetic and logic operations such as addition, subtraction, boolean AND
and Boolean OR. It had a control unit capable of performing control functions like
fetching an instruction from memory, decoding it, and generating control pulses to
execute it. It was able to operate on 4 bits of data at a time.This
first microprocessor was quite a success in industry. Soon other microprocessors
were also introduced. Intel introduced the enhanced version of 4004, the 4040. Some
other 4 bit processors are International’s PPS4 and Thoshiba’s T3472.
8-bit Microprocessors
The first 8 bit microprocessor which could perform arithmetic and logic operations
on 8 bit words was introduced in 1973 again by Intel. This was Intel 8008 and was
later followed by an improved version, Intel 8088. Some other 8 bit processors are
Zilog-80 and Motorola M6800.
16-bit Microprocessors
The 8-bit processors were followed by 16 bit processors. They are Intel 8086 and
80286.
32-bit Microprocessors
The 32 bit microprocessors were introduced by several companies but the most
popular one is Intel 80386.
Pentium Series
Instead of 80586, Intel came out with a new processor namely Pentium processor.
Its performance is closer to RISC performance. Pentium was followed by Pentium
Pro CPU. Pentium Pro allows allow multiple CPUs in a single system in order to
achive multiprocessing. The MMX extension was added to Pentium Pro and the
result was Pentiuum II. The low cost version of Pentium II is celeron.
The Pentium III provided high performance floating point operations for certain
types of computations by using the SIMD extensions to the instruction set. These
new instructions makes the Pentium III faster than high-end RISC CPUs.
Interestingly Pentium IV could not execute code faster than the Pentium III when
running at the same clock frequency. So Pentium IV had to speed up by executing
at a much higher clock frequency.
Accumulator
It is an 8-bit register used to perform arithmetic, logical, I/O &
LOAD/STORE operations. It is connected to internal data bus & ALU.
These registers can work in pair to hold 16-bit data and their pairing
combination is like B-C, D-E & H-L.
Program counter
It is a 16-bit register used to store the memory address location of the
next instruction to be executed. Microprocessor increments the program
whenever an instruction is being executed, so that the program counter
points to the memory address of the next instruction that is going to be
executed.
Stack pointer
It is also a 16-bit register works like stack, which is always
incremented/decremented by 2 during push & pop operations.
Temporary register
It is an 8-bit register, which holds the temporary data of arithmetic and
logical operations.
Flag register
It is an 8-bit register having five 1-bit flip-flops, which holds either 0 or 1
depending upon the result stored in the accumulator.
Sign (S)
Zero (Z)
Parity (P)
Carry (C)
D7 D6 D5 D4 D3 D2 D1 D0
S Z AC P CY
Interrupt control
As the name suggests it controls the interrupts during a process. When a
microprocessor is executing a main program and whenever an interrupt
occurs, the microprocessor shifts the control from the main program to
process the incoming request. After the request is completed, the control
goes back to the main program.
There are 5 interrupt signals in 8085 microprocessor: INTR, RST 7.5, RST
6.5, RST 5.5, TRAP.
8085 Architecture
We have tried to depict the architecture of 8085 with this following image
−
Address bus
A15-A8, it carries the most significant 8-bits of memory/IO address.
Data bus
AD7-AD0, it carries the least significant 8-bit address and data bus.
WR − This signal indicates that the data on the data bus is to be written into
a selected memory or IO location.
ALE − It is a positive going pulse generated when a new operation is started
by the microprocessor. When the pulse goes high, it indicates address. When
the pulse goes down it indicates data.
IO/M
This signal is used to differentiate between IO and Memory operations, i.e.
when it is high indicates IO operation and when it is low then it indicates
memory operation.
S1 & S0
These signals are used to identify the type of current operation.
Power supply
There are 2 power supply signals − VCC & VSS. VCC indicates +5v power
supply and VSS indicates ground signal.
Clock signals
There are 3 clock signals, i.e. X1, X2, CLK OUT.
X1, X2 − A crystal (RC, LC N/W) is connected at these two pins and is used
to set frequency of the internal clock generator. This frequency is internally
divided by 2.
CLK OUT − This signal is used as the system clock for devices connected with
the microprocessor.
RESET OUT − This signal is used to reset all the connected devices when the
microprocessor is reset.
READY − This signal indicates that the device is ready to send or receive data.
If READY is low, then the CPU has to wait for READY to go high.
HOLD − This signal indicates that another master is requesting the use of the
address and data buses.
HLDA (HOLD Acknowledge) − It indicates that the CPU has received the
HOLD request and it will relinquish the bus in the next clock cycle. HLDA is set
to low after the HOLD signal is removed.
SOD (Serial output data line) − The output SOD is set/reset as specified by
the SIM instruction.
SID (Serial input data line) − The data on this line is loaded into accumulator
whenever a RIM instruction is executed.
Control Instructions
1
Following is the table showing the list of Control instructions with their
meanings.
Logical Instructions
2 Following is the table showing the list of Logical instructions with their
meanings.
Branching Instructions
3 Following is the table showing the list of Branching instructions with their
meanings.
Arithmetic Instructions
4 Following is the table showing the list of Arithmetic instructions with their
meanings.
Problem demo −
(3005H) = 14H
(3006H) = 89H
Result −
MOV D, M
MOV M, A
DCX H
MOV M, D
JNZ START
The 8085 instruction set is classified into the following three groups
according to word size:
1 One-Byte Instructions
A 1-byte instruction includes the opcode and operand in the same byte.
Operand(s) are internal register and are coded into the instruction
MOV rd, rs
Coded as 01111000 = 78H = 170 octal (octal was used extensively in instruction
design of such processors).
ADD r
AA+r
2 Two-Byte Instructions
In a two-byte instruction, the first byte specifies the operation code and the
second byte specifies the operand. Source operand is a data byte immediately
following the opcode. For example:
r data
ADI data
A A + data
OUT port
0011 1110
DATA
Since the byte is not the data but points directly to where it is located this is called
direct addressing.
3 Three-Byte Instructions
In a three-byte instruction, the first byte specifies the opcode, and the
following two bytes specify the 16-bit address. Note that the second byte is the
low-order address and the third byte is the high-order address.
rp is one of the pairs of registers BC, DE, HL used as 16-bit registers. The two
data bytes are 16-bit data in L H order of significance.
rp data16
LXI H,0520H coded as 21H 20H 50H in three bytes. This is also immediate
addressing.
LDA addr
Example: LDA 2134H coded as 3AH 34H 21H. This is also an example of direct
addressing.
Instruction Set and Format
The instruction set of the 8085 microprocessor as mentioned before consists of 74
instructions with 246 different bit patterns and all these instructions can be broadly
classified into five functional groups depending upon the operations that they can perform.
These functional groups are: data transfer (or copy)
operations; arithmetic operations; logic operations; branching operations; and machine-
control operations.
Let us see the operations that the various instructions of each of these functional groups
are capable of performing:
(i) Data transfer (or copy) operations: data transfer is more of a misnomer for such
instructions since these instructions copy data (and not transfer them) from one location
called the source to another location called the destination without affecting the contents
of the source location. Data transfer operations can further be classified into five
different types. They are:
(a) Transfer of data between registers: example is the instruction MOV B,C which copies
data from register C into register B.
(b) Placing of specific data byte into a register or a memory location: example is the
instruction MVI B, 67H (or MVI M, 4FH) which places the data byte 67H (or the data
byte 4FH) into the register B (or the memory location M whose address is contained in
the register pair HL).
(c) Transfer of data between a memory location and a register: example is the
instruction LDA 2005H which copies data from a memory location having the
address 2005H into the accumulator.
(d) Transfer of data between and I/O device and the accumulator: example is the
instruction IN 4BH which copies data from an input device having port address 4BH into
the accumulator.
(e) Transfer of data between a register pair and the stack: example is the
instruction PUSH B which places the two data bytes from register pair BCinto the user
defined memory locations called the stack.
(ii) Arithmetic operations: instructions falling under this category perform arithmetic operations such
as addition, subtraction, increment (by one) and decrement (by one).
(a) For addition any 8-bit number (for example by using the instruction ADI 8-bit), or the contents of a
register (using the instruction ADD R) or of a memory location (using the instruction ADD M) can be
added to the contents of the accumulator and the sum is stored in the accumulator. It is to be noted that
no two 8-bit registers can be added directly such as adding the contents of register B with that of
register D is not permissible. However, you will see later that the instruction DAD Rp (where Rp stands
for register pair) is an exception to this rule. It is used for the addition of two 16-bit data directly in
register pairs.
(b) Like addition even for subtraction any 8-bit number (for example by using the instruction SUI 8-bit),
or the contents of a register (using the instruction SUB R) or of a memory location (using the
instruction SUB M) can be subtracted from the contents of the accumulator and the difference is stored
in the accumulator. The subtraction is performed by the 2’s complement method and the difference if
negative is expressed in the 2’s complement form. Again direct subtraction of two registers not involving
the accumulator is not permissible. The accumulator has to be the minuend in all subtractions.
(c) For increment or decrement the 8-bit contents of a register (using the instruction INR R or DCR R)
or of a memory location (using the instruction INR M or DCR M) can be incremented or decremented
by 1. Moreover, the 16-bit data of a register pair (such as BC, DE, HL or SP) can also be incremented
or decremented by 1 using the instructions INX Rp or DCX Rp respectively.
(iii) Logic operations: instructions under this category perform various logical operations
with the contents of the accumulator such as:
(a) OR, AND, XOR: any 8-bit number (using the instructions ORI 8-bit, ANI 8bit, XRI 8-
bit), or the contents of a register/memory location (using the instructions ORA R/M, ANA
R/M, XRA R/M) can be logically ORed, ANDed, or Exclusively-ORed with the contents of
the accumulator and the result is stored in the accumulator.
(b) Rotate: each bit in the accumulator can be shifted one position to the left (using the
instruction RLC) or to the right (using the instruction RRC).
(c) Compare: any 8-bit number or the contents of a register/memory location (using
instructions like CPI 8-bit and CMP R/M) can be compared for greater than, less than or
equality with the contents of the accumulator.
(d) Complement: the accumulator contents can be complemented (that is performing the
NOT operation, logical inversion) using the instructionCMA where all 1s are replaced by 0s
and vice-versa.
(iv) Branching operations: instructions belonging to this group change the sequence of
program execution either unconditionally or after testing a certain condition. Following are
the two types of branching operations:
(a) Jump: there are unconditional (like JMP) as well as conditional Jump instructions
(like JC and JNC) that alter the program sequence within the main program either
unconditionally or conditionally (depending on the status of a flag).
(b) Call, Return and Restart: such instructions alter the program sequence either by
calling a subroutine (or restarting at a service routine) or by returning to the main program
from a subroutine. Both the Call and the Return operations have unconditional as well as
conditional instructions such as CALL 16-bit, CNC 16-bit, RET and RNC. Details about these
instructions and others of such type are discussed later.
(v) Machine control operations: instructions of this category basically control the machine
functions such as HLT (indicating the end of program) and NOP(indicating no operation to
be performed by the computer).
We will again be returning to the these five categories of operations and discussing the
instructions belonging to each of these categories in much greater detail, but before we
do that we need to get a fair idea about the way instructions are designed and formatted.
As was mentioned earlier an instruction is a command to the microprocessor to carry out
a task on some data. This means that an instruction should have two parts in it: one
should be the task (or the operation) to be performed and the other should be the data
on which the operation is to be performed. Let us call the first part as opcode (short for
operation code) and the second as operand. The operand (that is the data) can be specified
directly as an 8-bit or a 16-bit data or indirectly through a register or a register pair or a
memory location. Sometimes the operand is implicit in the opcode (that is included in
the opcode itself). Now depending on the word size the instructions of the 8085
microprocessor are classified into three categories: 1-byte, 2-byte, and 3-byte
instructions.
(a) 1-byte instructions: a 1-byte instruction includes both the operation as well as the data
in a single byte called the opcode. Such instructions need one memory location to store in
the user memory. Given below are a few examples of such instructions:
MOV B,A Move content Data specified through 47H (opcode for the
of A intoB. register A. instruction)
DCR B Decrement content Data specified through 05H (opcode for the
ofB by 1. register B. instruction)
CMA Complement the Data specified through 2FH (opcode for the
content of A. register A (implicit instruction)
inCMA).
(b) 2-byte instructions: in a 2-byte instruction the first byte is always the opcode of
the instruction and the second byte a data byte. Such instructions need two memory
locations to store in the user memory. Given below are a few examples of such
instructions:
MVI B,8-bit Move immediate 8- 8-bit data is specified 06H (opcode for the
bitdata into B. as the second byte of instruction)
the instruction.
ADI 8-bit Add immediate 8- 8-bit data is specified C6H (opcode for the
bitdata with content as the second byte of instruction)
of A. Store the sum in the instruction.
A.
(c) 3-byte instructions: in a 3-byte instruction the first byte is always the opcode of the
instruction and the second and third bytes are data bytes. The second byte is the lower
order data byte and the third byte is the higher order data byte of a 16-bit data (generally
a 16-bit address of a memory location). Such instructions need three memory locations to
store in the user memory. Given below is an example of such instructions:
JMP 16-bit Jump to memory 16-bit data (memory C3H (opcode for the
location having address) is specified instruction)
the16-bit memory as the second byte
address. (lower order byte of
the address) and
third byte (higher
order byte of the
address) of the
instruction.
Now let us see how instructions are formatted in the 8085 microprocessor that is
how opcodes are designed. All registers, register pairs and operations have been given
specific binary codes. Given below are some of these codes:
Register Code
B 000
C 001
D 010
E 011
H 100
L 101
A 111
BC 00
DE 01
HL 10
Rotate each bit of accumulator by 00000111 The operation has an 8-bit code.
one position to the left.
Add the contents of a register to that 10000sss The operation ADD has a 5-bit
of the accumulator. code 10000. The 3 bits sss are
reserved for the code of a
register.
Move the contents of the source 01dddsss The operation MOVE has a 2-bit
register Rs to the destination register code 01. The 3 bits ddd are
Rd. reserved for the code of
destination register Rd and the 3
bits sss are reserved for the
code of source register Rs.
As an example let us see how the opcodes for various ADD and MOVE instructions are
designed:
Now with the knowledge on the instructions of the 8085 microprocessor that we have
gained till now we are in a position to understand and write simple and basic programs in
its assembly language. A program in general is a sequence of instructions that tells the
computer to perform a particular task. In the assembly language program the instructions
are to be chosen from the instruction set of the 8085 microprocessor. Let us suppose that
we want to write a simple program to add two bytes of data (say 45H and A3H) and store
the sum in register H. The logical steps required for performing this task should be:
Let us see how these steps can now be translated into an assembly language program
which can then be loaded into the user memory for execution
2003H A3H
For running the program in a computer we need to first look up for the opcode for each
instruction in the instruction set given in the manual of the 8085 microprocessor. Once we
have written the program with all the hex codes in proper sequence (matching one to one
with the mnemonics) we can then load the program in the user memory sequentially
starting preferably with its first memory location (2000H in the above example). After the
program has been loaded in the user memory execution should begin from the first
memory location. Initially the first hex code (which will be the opcode of the first
instruction) will be fetched by the microprocessor from the user memory, decoded and
then finally the appropriate action will be executed. This cycle of fetch-decode-execute will
then carry on sequentially, one instruction after the other, till the microprocessor
encounters the halt instruction.
TRAP
It is a non-maskable interrupt, having the highest priority among all
interrupts. Bydefault, it is enabled until it gets acknowledged. In case of
failure, it executes as ISR and sends the data to backup memory. This
interrupt transfers the control to the location 0024H.
RST7.5
It is a maskable interrupt, having the second highest priority among all
interrupts. When this interrupt is executed, the processor saves the
content of the PC register into the stack and branches to 003CH address.
RST 6.5
It is a maskable interrupt, having the third highest priority among all
interrupts. When this interrupt is executed, the processor saves the
content of the PC register into the stack and branches to 0034H address.
RST 5.5
It is a maskable interrupt. When this interrupt is executed, the processor
saves the content of the PC register into the stack and branches to 002CH
address.
INTR
It is a maskable interrupt, having the lowest priority among all interrupts.
It can be disabled by resetting the microprocessor.
When INTR signal goes high, the following events can occur −
The microprocessor checks the status of INTR signal during the execution of
each instruction.
When the INTR signal is high, then the microprocessor completes its current
instruction and sends active low interrupt acknowledge signal.
When instructions are received, then the microprocessor saves the address of
the next instruction on stack and executes the received instruction.
It is the graphical representation of process in steps with respect to time. The timing diagram
represents the clock cycle and duration, delay, content of address bus and data bus, type of
operation ie. Read/write/status signals.
Important terms related to timing diagrams:
1. Instruction cycle: this term is defined as the number of steps required by the cpu to
complete the entire process ie. Fetching and execution of one instruction. The fetch and
execute cycles are carried out in synchronization with the clock.
2. Machine cycle: It is the time required by the microprocessor to complete the operation
of accessing the memory devices or I/O devices. In machine cycle various operations like
opcode fetch, memory read, memory write, I/O read, I/O write are performed.
3. T-state: Each clock cycle is called as T-states.
2. If the addressing mode is indirect then No. of machine cycles = No. of bytes + 1. Add +1 to the
No. of machine cycles if it is memory read/write operation.
3. If the operand is 8-bit or 16-bit address then, No. of machine cycles = No. of bytes +1.
Timing Diagram:
Opcode fetch:
The microprocessor requires instructions to perform any particular action. In order to
perform these actions microprocessor utilizes Opcode which is a part of an instruction which
provides detail(ie. Which operation µp needs to perform) to microprocessor.
Fig: Opcode fetch timing diagram
Operation:
During T1 state, microprocessor uses IO/M(bar), S0, S1 signals are used to instruct
microprocessor to fetch opcode.
During this operation 8085 transmits 16-bit address and also uses ALE signal for address
latching.
At T2 state microprocessor uses read signal and make data ready from that memory
location to read opcode from memory and at the same time program counter increments by 1
and points next instruction to be fetched.
In this state microprocessor also checks READY input signal, if this pin is at low logic
level ie. '0' then microprocessor adds wait state immediately between T2 and T3.
At T3, microprocessor reads opcode and store it into instruction register to decode it
further.
During T4 microprocessor performs internal operation like decoding opcode and providing
necessary actions.
The opcode is decoded to know whether T5 or T6 states are required, if they are not
required then µp performs next operation.
Read and write timing diagram for memory and I/O
Operation
Memory Read:
Operation:
It is used to fetch one byte from the memory.
It requires 3 T-States.
During T1, A8-A15 contains higher byte of address. At the same time ALE is high.
Therefore Lower byte of address A0-A7 is selected from AD0-AD7.
During T2 ALE goes low, RD(bar) goes low. Address is removed from AD0-AD7 and data
D0-D7 appears on AD0-AD7.
Memory Write:
Figure: Memory write timing diagram
Operation:
It is used to send one byte into memory.
It requires 3 T-States.
During T1, ALE is high and contains lower address A0-A7 from AD0-AD7.
During T2, ALE goes low, WR(bar) goes low and Address is removed from AD0-AD7 and
then data appears on AD0-AD7.
IO Read:
Figure: I/O read timing diagram
Operation:
It requires 3 T-States.
During T1, The Lower Byte of IO address is duplicated into higher order address bus A8-A15.
During T2, ALE goes low, RD (bar) goes low and data appears on AD0-AD7 as input from IO
device.
IO Write:
Figure:I/O write timing diagram
Operation:
It requires 3 T-States.
During T1, the lower byte of address is duplicated into higher order address bus A8-A15.
During T2, ALE goes low, WR (bar) goes low and data appears on AD0-AD7 to write data
into IO device.