Syllabus Revision
Program: B.Tech – Computer Science & Engineering
Batch: 2024–2028
Syllabus Changes
S. No. Course Title Course Code Topics Topics Change in
Added Removed Syllabus (%)
Justification
for
Change(s)
1 Computer CSE305 Arithmetic Basic The syllabus
Organization logic shift overview of has been
and unit, Booth’s computer revised by
Architecture Algorithm, generations, 15% to
Virtual redundant improve
Memory, micro- conceptual
DMA operations clarity and
practical
relevance in
computer
system
design.
Revised Course Outcomes (COs)
S. No Course Title Course Code Semester Existing COs Revised COs
1 Computer CSE305 3rd CO1: CO1: Explain
Organization Understand the structure
and basic and
Architecture structure of functional
computers units of a
and micro- computer
operations. system.
CO2: CO2:
Analyze Demonstrate
instruction instruction
cycle and formats,
address cycles, and
modes. addressing
CO3: Explain techniques.
memory CO3:
types and Compare
hierarchy. memory
CO4: types,
Understand hierarchy,
I/O and
interfacing implement
techniques. virtual
memory
schemes.
CO4:
Illustrate
DMA,
interrupt
handling, and
asynchronous
data transfer.
Mapping of COs with Bloom’s Taxonomy
CO No. Remember Understand Apply Analyze Evaluate Create
(KL1) (KL2) (KL3) (KL4) (KL5) (KL6)
CO1 2 2 0 0 0 0
CO2 0 2 3 3 0 0
CO3 2 2 3 0 0 0
CO4 0 2 3 3 0 0
Course Articulation Matrix
COs PO1 PO2 PO3 PO4 PO5 PO6 PO7 PO8 PO9 PO10 PO11 PO12 PSO1 PSO2
CO1 3 2 - - - - - - - - - - 2 -
CO2 3 3 2 2 - - - - - - - - 3 2
CO3 2 2 2 - - - - - - - - 3 -
CO4 2 3 2 3 - - - - - - - - 3 2
Course Content
Unit 1: Register Transfer and Micro-operations
• - Register Transfer Language
• - Bus and Memory Transfers
• - Arithmetic Micro-operations
• - Logic Micro-operations
• - Shift Micro-operations
• - Arithmetic Logic Shift Unit
Unit 2: Basic Computer Organization and CPU Design
• - Instruction Cycle
• - Memory-Reference Instructions
• - Register Reference and I/O Instructions
• - General Register Organization
• - Stack Organization
• - Instruction Formats
• - Addressing Modes
Unit 3: Computer Arithmetic
• - Addition & Subtraction (Signed Magnitude and 2’s Complement)
• - Binary Multiplication
• - Booth’s Algorithm
• - Restoring Division
• - Non-Restoring Division
Unit 4: Memory Organization
• - Memory Hierarchy
• - Main and Auxiliary Memory
• - Associative Memory
• - Cache Memory
• - Virtual Memory
• - Memory Management Hardware
Unit 5: Input-Output Organization
• - Peripheral Devices
• - I/O Interfaces
• - Asynchronous Data Transfer
• - Modes of Data Transfer
• - Interrupts and Priority
• - Direct Memory Access (DMA)
