Digital Circuits
Assignment 8- Week 8
TYPE OF QUESTION: MCQ
Number of questions: 15 Total mark: 15 X 1 = 15
QUESTION 1:
An 8-bit Digital-to-Analog converter (DAC) using two identical 4-bit DACs with
equal reference voltage is shown in Figure. If b 0 represents LSB, b7 MSB and the op-
amp is ideal, to obtain correct analog values corresponding to an 8-bit DAC at the
output VO, what should be the value of resistor R?
a) 8 k𝛺
b) 0.25 k𝛺
c) 1 k𝛺
d) 0.5 k𝛺
Correct Answer: c
Detailed Solution:
QUESTION 2:
An 8-bit DAC produces an out voltage of 1V for a digital input of 00110010.
Determine the largest value of the output voltage from the DAC?
a) 12.75 kV
b) 5.1 V
c) 255 V
d) 20 mV
Correct Answer: b
Detailed Solution:
QUESTION 3:
For a 4-bit DAC shown below, the output voltage V 0 is ______________ V?
A) 9 V
B) 10 V
C) 11 V
D) 12 V
Correct Answer: A
Detailed Solution:
QUESTION 4:
A 5-bit ladder has a digital input of 11010. Assuming that 0 corresponds to ) V and 1
corresponds to +10 V, it’s output voltage will be:
a) + 6.5 V
b) – 6.5 V
c) -8.125 V
d) + 8.125 V
Correct Answer: d
Detailed Solution:
QUESTION 5:
An 8-bit weighted resistor digital-to analog converter (DAC) has the smallest
resistance of 500 𝛺. The largest resistance has a value of ___________ k𝛺.
a) 64 k𝛺
b) 64 𝛺
c) 6.4 k𝛺
d) 6.4 𝛺
Correct Answer: a
Detailed Solution:
QUESTION 6:
If the resolution of a digital-to-analog converter is approximately 0.4% of it’s full
scale range, then it is a/an ____________ ?
a) 16 - bit converter
b) 10 – bit converter
c) 8 – bit converter
d) 12 - bit converter
Correct Answer: c
Detailed Solution:
QUESTION 7:
An analog-to-digital converter with resolution 0.01V converts analog signals
between 0 V to +10 V to an unsigned binary output. The minimum number of bits
(in integer) in the output is ___________ ?
a) 10
b) 20
c) 30
d) 40
Correct Answer: A
Detailed Solution:
For an ADC,
𝑉𝑚𝑎𝑥 − 𝑉𝑚𝑖𝑛
𝑅𝑒𝑠𝑜𝑙𝑢𝑡𝑖𝑜𝑛 =
22
10 − 0
0.01 =
2𝑛
2𝑛 = 1000
QUESTION 8:
An 8-bit DAC produces an out voltage of 1 V for a digital input of 00110010.
Determine the largest value of the output voltage from the DAC?
a) 12.75 kV
b) 5.1 V
c) 255V
d) 20 mV
Correct Answer: b
Detailed Solution:
QUESTION 9:
How many comparators are used ina 4 – bit flash Analog-to-Digital Converter
(ADC)?
a) 15
b) 4
c) 5
d) 16
Correct Answer: a
Detailed Solution:
For an n-bit flash ADC, the number of comparators required is:
N=2n−1
Substitute n=4
N=24−1=16
QUESTION 10:
For a 10-bit digital ramp ADC using 500kHz clock, the maximum conversion time is?
a) 2084 µs
b) 2064 µs
c) 2046 µs
d) 2084 µs
Correct Answer: c
Detailed Solution:
QUESTION 11:
Size of the priority encoder required for 4-bit flash ADC?
A) 16 : 4
B) 4 : 2
C) 8 : 3
D) 32 : 5
Correct Answer: a
Detailed Solution:
QUESTION 12:
A 4-bit weighted-resistor DAC with inputs b3, b2, b1, and b0, and (MSB to LSB) is
designed using an ideal opamp, as shown below. The switches are closed when the
corresponding input bits are logic ' 1 ' and open otherwise.
When the input b3, b2, b1,b0 changes from 1110 to 1101, the magnitude of the change
in the output voltage V0 (in mV , rounded off to the nearest integer) is ____________.
a) 245 mV
b) 250 mV
c) 255 mV
d) 260 mV
Correct Answer: b
Detailed Solution:
QUESTION 13:
The advantage of using a dual slope ADC in a digital voltmeter is that
a) Its conversion time is small
b) Its accuracy is high
c) It gives output in BCD format
d) It does not require a comparator.
Correct Answer: b
Detailed Solution:
The key feature of a dual-slope ADC (commonly used in digital voltmeters) is that it
integrates the input voltage over a fixed period, then de-integrates using a reference.
This process cancels out errors due to noise, offset, and component drift, making the
method highly accurate even if it is slower.
QUESTION 14:
For a sequence detector detecting ‘1 0 1 1 0’ (Mealy Type), how many states and
transitions are there in a state diagram?
a) 6, 10
b) 6, 12
c) 5, 10
d) 5, 12
Correct Answer: c
Detailed Solution:
QUESTION 15:
In a 5-bit successive approximation ADC with reference voltage of 1V, if an input
voltage of 0.9V is applied, after 5 clock cycles the content of SAR is
A) 10100
B) 01100
C) 10011
D) 11100
Correct Answer: D
Detailed Solution:
Vin = 0.9 V
1st iteration: VDAC = ½ = 0.5
Vin>VDAC SAR content = 10000
2nd iteration: VDAC = 0.5 + 0.25 = 0.75
Vin>VDAC SAR content = 11000
3rd iteration: VDAC = 0.5 + 0.25 + 0.125 = 0.875
Vin>VDAC SAR content = 11100
4th iteration: VDAC = 0.5 + 0.25 + 0.125 + 0.0625 = 0.9375
Vin<VDAC SAR content = 11100
5th iteration: VDAC = 0.5 + 0.25 + 0.125 + 0.03125 = 0.90625
Vin<VDAC SAR content = 11100
After 5 clock cycles SAR content = 11100
Another Solution:
