Intro to Buses (Computer Architecture)

Intro to Buses (Computer Architecture)

• 1.
  Buses By: Kyle Kowalskiand Matt Levandowski
• 2.
  What is it ●A Bus is a system that moves data from one source to another ● First implementation was in early computing with a System bus
• 3.
  Why is itneeded ● The purpose of buses is to reduce the number of "pathways" needed for communication between the components, by carrying out all communications over a single data channel. This is why the metaphor of a "data highway" is sometimes used. ● Synchronization between components ● HIGH speed transfer between CPU/CPU/MEMORY
• 4.
  Characteristics We measure datatransfer by two metrics: 1. Total number of bits we can transfer in parallel. This is called the width of the data. 2. The clock rate or frequency (in Hertz) of the bus Each time data is sent or received is considered one cycle
• 5.
  Total Transfer Speed:Bandwidth A bus with a width of 16 bits and a frequency of 133 MHz, therefore, has a transfer speed equal to: ● 16 * 133.106 = 2128*106 bit/s, ● or 2128*106/8 = 266*106 bytes/s ● or 266*106 /1000 = 266*103 KB/s ● or 259.7*103 /1000 = 266 MB/s
• 6.
  BUS Timeline ● 1982- ISA by IBM - 4.77 MB/s (8 bits wide at 4.77 MHz) ● 1988 - Standard Architecture (EISA) - 33.32 MB/s (32 bits at 8 MHz) ● Early 90's - PCI Peripheral Component Interconnect - 133MB/s (32-bit at 33 MHz) ● Mid 90's - USB 1.0 1.5 MB/sec ● 2000 - USB 2.0 60 MB/sec ● 2010 - USB 3.0 500 MB/sec ● 2011 - PCI Express 3.0: 31.5 GB/s
• 7.
  Usually two mainbuses in a PC The internal bus (sometimes called the front-side bus or FSB for short or the system bus). The expansion bus (sometimes called the input/output bus or the control bus)
• 8.
  Front Side Busor System Bus ● A Standard CPU system bus is comprised of a Control bus, an Address bus and a Data bus. ● The FSB can range from speeds of 66 MHz, 133 MHz, 100 MHz, 266 MHz, 400 MHz, and up. ● Most CPU today add a third bus known as an Expansion bus.
• 9.
  Expansion Bus ● Usedto add additional expansion cards into the CPU. ● Comes in Internal and External ● Common internal buses are PCI, PCI express and SATA ● Common external buses are USB, CAN and IEEE 1394(Firewire)
• 10.
  New Motherboard Design
• 11.
  Chipsets ● The Northbridgeis an integrated circuit (e. g.,Intel orVIA) that is responsible for communications between the CPU interface,AGP,PCI, and the memory. The Northbridge gets its name for commonly being North of the PCI bus. ● The Southbridge is responsible for the hard- drive controller, I/O controller and integrated hardware such as sound card, video card if present on the motherboard, USB, and Ethernet.
• 12.
  How it Worksan overview When the CPU needs data from RAM, a request is sent to the Northbridge memory controller. After the request has been received, it responds with how long the processor will need to wait in order to read the memory over the front side bus(FSB). Some newer motherboards have replaced the
• 13.
  Multipliers ● In computinga multiplier, CPU multiplier, clock ratio, clock multiplier, CPU Core Ratio is the speed ratio between the CPU and the FSB. ● For example, a CPU with a multiplier of 20 and an external clock of 133 MHz will have a CPU speed of 2.66GHz. ● Memory often has a multiplier to it which some BIOS let you tweak for different performance.
• 14.
  Overclocking ● CPU speedis generally calculated by a bus speed (often called the FSB) and a multiplier. ● Multiply these together and you get the actual speed the CPU runs at. The bus speed is typically the speed that other components (such as the memory) in a system run at. ● You overclock your CPU by increasing one or the other or both. Bus speed tends to have the best effect so if possible people will
• 15.
  Overclocking (continued) Even thoughthe CPU is at the same speed the computer will be MUCH faster with a 200MHz bus then with a 100MHz bus. This is because the bus is what carriers the data to and from the CPU, the faster you make the bus the less of a bottleneck it becomes. The CPU no longer has to wait as long for the next instruction. Just make sure to have better cooling, and you need to have more voltage going to the components (CPU and chipsets)
• 16.
  PCI Express Whyit's so fast Each lane of a PCI Express connection contains two pairs of wires -- one to send and one to receive. Packets of data move across the lane at a rate of one bit per cycle. A x1 connection, the smallest PCIe connection, has one lane made up of four wires. It carries one bit per cycle in each direction. A x2 link contains eight wires and transmits two bits at once, a x4 link transmits four bits, and so on. Other configurations are x12, x16 and x32.
• 17.
  PCI Express Howit works ● Prioritization of data, which allows the system to move the most important data first and helps prevent bottlenecks ● Time-dependent (real-time) data transfers ● Better handshaking and error detection ● Each device has its own dedicated, point-to-point connection to the switch, signals from multiple sources no longer have to work their way through the same bus.
• 18.
  References http://www.d-silence.com/feature.php?id=237 http://en.kioskea.net/contents/pc/bus.php3 http://arstechnica.com/features/2004/07/pcie/ http://old.pinouts.ru/Slots/ http://www.hardwaresecrets.com/article/Everything-You-Need-to-Know-About-the-PCI-Express/190/3 http://www.waste.org/~winkles/hardware/pci.htm http://dangerousprototypes.com/docs/Bus_Pirate http://www.cpushack.com/cpu-overclocking.html Tyson, Jeff, andEd Grabianowski. "How PCI Works" 02 May 2001. HowStuffWorks.com. <http://computer. howstuffworks.com/pci.htm> 02 December 2012. Null, Linda, and Julia Lobur. The Essentials of Computer Organization and Architecture. Sudbury, MA: Jones and Bartlett, 2006. Print. Lucas, S.E. (2008). The Art of Public Speaking (10th ed.). McGraw-Hill: New York. Street, N.J. (2009). Packet for Public Speaking: Comm. 203, Spring 2009.