In .NET 7.0, we will continue our efforts to improve the Arm64 code quality and closing the performance gap with x64. Similar to how we did this in .NET 5 in #35853 , we will continue the trend of tracking all the Arm64 issues in a top level issue.

• Arm64: Better addressing mode for float/double array access Arm64: Better addressing mode for float/double array access #64819
• (kunalspathak) Hoisting the invariant out of multi-level nested loops Hoisting the invariant out of multi-level nested loops #61420
• ARM64: Optimize a % b operation ARM64: Optimize a % b operation #34937
• Arm64: Add support for loop alignment
  • Arm64: Align methods containing loops to 32B Arm64: Align methods containing loops to 32B #59828
  • Loop Alignment support for Arm64 Loop Alignment support for Arm64 #60135
  • Hide 'align' instruction behind jmp Hide 'align' instruction behind jmp #60787
• Arm64: Have CpBlkUnroll and InitBlkUnroll use SIMD registers  #68085
• Arm64: Forward memset/memcpy to CRT implementation  #67326 @a74nh
• Tooling support for Arm64 performance investigation
  • jitdump output not accepted by ARM streamline jitdump output not accepted by ARM streamline #62456
• (@kunalspathak) gcenv.interlocked's Interlocked use full memory barriers even with 8.1 Atomics #67824
• (@mangod9) Arm64: Revisit the heuristics for IO completion poller threads #67266 - Revisit after concurrent queue fix
• (@EgorBo, @kunalspathak) x64 vs ARM64 Microbenchmarks Performance Study Report x64 vs ARM64 Microbenchmarks Performance Study Report #67339
• (@EgorBo) Arm64: Better addressing mode for array access whose elements are accessed byref #67981
• (@a74nh) Conditional comparison and selection instructions Arm64: Generate conditional comparison and selection instructions #55364, Arm64: Use csel and ccmp for conditional moves #67894
• Intrinsify some .NET libraries with Arm64 intrinsics
  • (@a74nh) Optimize System.Text.ASCIIUtility for arm64 using cross-platform intrinsics #41292
  • Optimize System.Buffers for arm64 using cross-platform intrinsics #35033

Moved to Future Work

• Arm64: Evaluate if it is possible to combine subsequent field loads in a single load Arm64: Evaluate if it is possible to combine subsequent field loads in a single load #64815
• [Arm64] Peephole optimization opportunities [Arm64] Peephole optimization opportunities #55365
• [ARM64/Linux] Inefficient conditionals branching #12735
• JIT: Redundant fmov's on arm64 for a simple function #58954
• Enable multi-register intrinsics support for Arm64 #64921
• [LSRA] Add support for allocating consecutive registers #39457
• Arm64: Consider using "DC ZVA" instruction #67244
• Arm64: Environment.ProcessorCount returns wrong value on higher core machine #67180, Closed Account for availability of multiple processor groups on Windows 11+ #68639 to try a different approach (AntonLapounov)
• [ARM64] Performance regression: Utf8Encoding #41699
• API Proposal : Arm TableVectorLookup and TableVectorExtension intrinsics #1277
• (TiHan) Arm64: In mod operation happening inside the loop, if divisor is an invariant, hoist the divisor checks Arm64: In mod operation happening inside the loop, if divisor is an invariant, hoist the divisor checks #64795
• (@EgorBo) Optimize jump stubs on arm64 #62302
• (@TIHan) Double constants usage in a loop can be CSEed Double constants usage in a loop can be CSEed #35257