WEEK 8
❖ Synchronous Sequential Logic
❖ Flip-flop
SEQUENTIAL CIRCUIT
consists of a combinational circuit to which storage
elements are connected to form a feedback path.
the state of the output depends not only on the logic
levels of the present input but also on the binary
information stored in the elements
the memory element is capable of storing one bit of
information
is specified by a time sequence of inputs, outputs, and
internal states
Inputs Combinational Outputs
Circuit Memory
Elements
TYPES OF INPUTS
External input
an input not controlled by the circuit but can also
determine the condition for changing the state
Internal input
an input function of a previous output state
state variables produced by storage elements and
output
TYPES OF SEQUENTIAL CIRCUIT
Synchronous
A circuit that use pulsed or level inputs and a clock input to
drive the circuit
A circuit whose behavior can be defined from the
knowledge of its signals at discrete instants of time.
Asynchronous
A circuit that do not use a clock signal but use pulses of the
inputs to drive the circuit.
A circuit whose behavior depends upon the input signals at
any instant of time and the order in which the inputs
change.
Pulsed output - an output that lasts for the duration of a
particular input pulse but can be less in some cases
Level Output - output that changes state at the start of an
input pulse or clock pulse and remains in that state until
the next input or clock pulse.
SYNCHRONOUS SEQUENTIAL CIRCUIT
Clocked Sequential Circuit - use identical clock pulses
in the inputs of all the flip-flops
seldom show instability problems
timing is easily broken down into independent
discrete steps
Clock Generator- is a timing device that provides
clock signal having the form of a periodic train
LATCHES
Latches are level sensitive storage elements that
operate with signal levels and is a basic circuit
through which all flip-flops are constructed .
RS LATCH
RS Latch is a circuit with (a) 2 cross-coupled NAND
gates or (b) 2 cross-coupled NOR gates and 2 inputs S
(set) and R (reset)
S’ Q
Q’
R’
(a) (b)
RS LATCH USING NAND
Table 1.a NAND Latch
S’ R’ Q Q'
0 0 Race
0 1 1 0
1 0 0 1
1 1 No Change
Case 1: S’=R’ = 1
https://www.geeksforgeeks.org/latches-in-digital-logic/
RS LATCH USING NAND
Case 2: S’ =0, R’ = 1 Case 3: S’=1, R’ = 0
https://www.geeksforgeeks.org/latches-in-digital-logic/
RS LATCH USING NOR
Table 1.b NOR Latch
S R Q Q'
0 0 No Change
0 1 0 1
1 0 1 0
1 1 Race
Try simulating using this link or any simulator:
http://electronics-course.com/sr-nor-latch
FLIP-FLOP
Flip-flops are edge sensitive binary storage devices
which are controlled by clock transition and is capable
of storing one-bit of information. It has two stable states
and remains in one state until triggered into another
state.
Types of Flip-fllops
• RS Flip-flop
• JK Flip-flop
• D Flip-flop
• T Flip-flop
FLIP-FLOP SYMBOLS
S Q J Q
R Q’ K Q’
RS Flip-flop JK Flip-flop
D Q T Q
Q’ Q’
D Flip-flop T Flip-flop
Complemented
Output
Input
Clock InputOutput
FLIP-FLOP TRUTH TABLE
TRUTH TABLE : RS FLIP-FLOP
S R Q Q'
0 0 No Change
0 1 0 1
1 0 1 0
1 1 Race
TRUTH TABLE : JK FLIP-FLOP
J K Q Q'
0 0 No Change
0 1 0 1
1 0 1 0
1 1 Toggle
FLIP-FLOP TRUTH TABLE
TRUTH TABLE : D FLIP-FLOP
D Q Q'
0 0 1
1 1 0
TRUTH TABLE : T FLIP-FLOP
T Q Q'
0 No Change
1 Toggle
FLIP-FLOP CHARACTERISTICS TABLE
The characteristics table describes the
logical properties of a flip-flop by describing
its operation in tabular form defining the
next state as a function of inputs and present
state.
The characteristics equation is defined by
the next state of the output which will be
equal to the input of the flip-flop in the
present state.
FLIP-FLOP CHARACTERISTICS TABLE
CHARACTERISTICS TABLE : RS FLIP-FLOP
S R Q(t+1)
0 0 No Change (NS = PS)
0 1 0 (Reset)
Copy S
1 0 1 (Set)
1 1 x (Race)
FLIP-FLOP CHARACTERISTICS TABLE
CHARACTERISTICS TABLE : RS FLIP-FLOP
Q(t) S R Q(t+1)
0 0 0 0
0 0 1 0
0 1 0 1
0 1 1 X
1 0 0 1
1 0 1 0
1 1 0 1
1 1 1 X
FLIP-FLOP CHARACTERISTICS TABLE
CHARACTERISTICS TABLE : JK FLIP-FLOP
J K Q(t+1)
0 0 No Change (NS = PS)
0 1 0 (Reset)
Copy J
1 0 1 (Set)
1 1 Toggle (NS = PS’)
FLIP-FLOP CHARACTERISTICS TABLE
CHARACTERISTICS TABLE : JK FLIP-FLOP
Q(t) J K Q(t+1)
0 0 0 0
0 0 1 0
0 1 0 1
0 1 1 1
1 0 0 1
1 0 1 0
1 1 0 1
1 1 1 0
FLIP-FLOP CHARACTERISTICS TABLE
CHARACTERISTICS TABLE : D FLIP-FLOP
D Q(t+1)
0 0
1 1
CHARACTERISTICS TABLE : D FLIP-FLOP
Q(t) D Q(t+1)
0 0 0
0 1 1
1 0 0
1 1 1
FLIP-FLOP CHARACTERISTICS TABLE
CHARACTERISTICS TABLE : T FLIP-FLOP
T Q(t+1)
0 No Change (NS = PS)
1 Toggle (NS = PS’)
CHARACTERISTICS TABLE : T FLIP-FLOP
Q(t) T Q(t+1)
0 0 0
0 1 1
1 0 1
1 1 0
FLIP-FLOP EXCITATION TABLE
The excitation table lists the required
inputs for a given change in state.
EXCITATION TABLE : RS FLIP-FLOP
Q(t) Q(t+1) S R
0 0 0 X
0 1 1 0
1 0 0 1
1 1 X 0
EXCITATION TABLE : JK FLIP-FLOP
Q(t) Q(t+1) J K
0 0 0 X
0 1 1 X
1 0 X 1
1 1 X 0
FLIP-FLOP EXCITATION TABLE
EXCITATION TABLE TABLE : D FLIP-FLOP
Q(t) Q(t+1) D
0 0 0
0 1 1
1 0 0
1 1 1
EXCITATION TABLE TABLE : T FLIP-FLOP
Q(t) Q(t+1) T
0 0 0
0 1 1
1 0 1
1 1 0
ANALYSIS OF CLOCKED SEQUENTIAL
CIRCUIT
The clocked sequential circuit is analyzed by obtaining
the state table , state diagram and state equations.
A
DA = Ax + Bx
A’
DB = A’x
y = (A+B)x’
ANALYSIS OF CLOCKED SEQUENTIAL CIRCUIT
A state equation (transition equation) specifies the
next state as a function of the present state and
inputs .
where the equation for the next state is determined
as follows:
-left-hand side expression pertains to the next
state of the flip-flop
-right-hand side expression specifies the present
state and the conditions that make the next
state equal to 1
Example: A(t+1) = A(t) x(t) + B(t) x(t)
B(t+1) = A’(t) x(t)
ANALYSIS OF CLOCKED SEQUENTIAL CIRCUIT
A state table (transition table) specifies the time
sequence of inputs, outputs, and flip-flop states.
Example:
Two Alternative forms of State Table
ANALYSIS OF CLOCKED SEQUENTIAL CIRCUIT
A state diagram is a graphical representation of state
table in which the state is represented by a circle and
the transitions between states are being indicated by
directed lines connecting the circles.
Example:
0/0
0/1 00
0/1
0/1 1/0
1/0
11 01
1/0
10
1/0
FLIP-FLOP INPUT EQUATION
Flip-flop input equations (excitation equations)are
set of Boolean functions used to algebraically describe
the part of the circuit that generates the input to flip-
flops.
Example: JA = B; KA = Bx’
JB =x’; KB = A’x + Ax’
Output equation
Example: Y = AB
