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Direct Memory Access (DMA) in Computer
Architecture
For the execution of a computer program, it requires the synchronous working of more than one
component of a computer. For example, Processors — providing necessary control information,
addressos...te, buses ~ to transfer information and data to and from memory to WO devices...ete. The
interesting factor of the system would be the way it handles the transfer of information among processor,
memory and /O devices. Usually, processors control all the process of transferring data, right from
initiating the transfer to the storage of data at the destination. This adds load on the processor and mast of
the time it stays in the ideal state, thus decreasing the efficiency of the system. To speed up the transfer of
data between 1/0 devices and memory, DMA controller acts as station master. DMA controller transfers
data with minimal intervention of the processor.
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What is a DMA Controller?
The term OMA stands for direct memory access. The hardware device used for direct memory access is
called the DMA controller. DMA controller is a control unit, part of /0 device's interface circuit, which can
transfer blocks of data between 1/0 devices and main memory with minimal intervention from the
processor.
DMA Controller Diagram in Computer Architecture
DMA controller provides an interface between the bus and the input-output devices. Although it transfers
data without intervention of processor, itis controlled by the processor, The processor initiates the DMA
controller by sending the starting address, Number of words in the data block and direction of transfer of
data ..0, from VO devices to the memory or from main memory to VO devices. More than one external
device can be connected to the DMA controller.
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DMA controller contains an address unit, for generating addresses and selecting (lO device for transfer. It
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also contains the control unit and data count for keeping counts of the number of blocks transferred and reais (
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indicating the direction of transfer of data. When the transfer is completed, DMA informs the processor by
raising an interrupt. The typical block diagram of the DMA controller is shown in the figure below,
=| Data count]
Data lines = [Data resists]
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