DMC COLLEGE FOUNDATION, INC.

College of Computer Studies

Center of Development in I.T. Education

COURSE SYLLABUS

Course Title Digital Electronics

Course Code IT23
Course Credit IT23 – 3 units
Prerequisite Discrete Mathematics
Professor LEMUEL D. PANGILINAN
E-mail Address LEMDAGPANGS@YAHOO.COM
Consultation Schedule Day Time Room
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I. COURSE DESCRIPTION

This course introduces the fundamental principles, technology, and current development of Cloud Computing. Cloud Computing is “A large-
scale distributed computing paradigm that is driven by economies of scale, in which a pool of abstracted, virtualized, dynamically-scalable, managed
computing power, storage, platforms, and services are delivered on demand to external customers over the Internet.” It has become a driving force
for information technology over the past several years, and it is hinting at a future in which we won’t compute on local computers, but on centralized
facilities operated by third-party compute and storage utilities.

II. DESIRED LEARNING RESULTS

Expected DMCian Graduate Desired Learning Results: By the end of the course, the students are enabled to:
Attributes
God-Fearing  Inculcate to the minds, and hearts of the students the way of loving their classmates through helping each other in
acquiring honest solutions to the given programming problems.
Knowledgeable  Mastering the fundamentals of programming and meet the deadlines in submitting course requirements.
Socially responsible  Become a good model in promoting good ethics in I.T. in the province of Zamboanga del Norte.

III. FINAL OUTPUT/FINAL PERFORMANCE

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 At the end of the course, students are gain competence in evaluating the performance and identifying bottlenecks when mapping applications to the
cloud. At the same time, a successful IT project also has to start with a smart, tough, convincing and capable leader who can nurture it and advocate for it
from concept to planning and from implementation through final deployment.

Final Performance Task Rubric: Field Programmable Gate Arrays (FPGAs)

God-loving
Characteristics Excellent Satisfactory Fair Not Competent Score
(4) (3) (2) (1)
Honesty The project is perfectly done A small portion of the project A small portion of the project More than 50% of the project
and original. was copied from his classmate was copied from his classmate portion was copied from his
but he understands his works but he understands his works. classmate and yet the program
very well. However, there are some minor is not running.
flaws in it.

A. Knowledgeable
Characteristics Excellent Satisfactory Fair Not Competent Score
(4) (3) (2) (1)
Delivery& Mastery Highly competent in terms of Competent in either practical, or Understanding the basic Cannot comprehensively
practical, and oral skills oral skills knowledge requirements in all explain the basic knowledge
assessment, and assessment/presentation, but not areas. requirements of the course.
presentation. to all areas.

B. Socially Responsible
Characteristics Excellent Satisfactory Fair Not Competent Score
(4) (3) (2) (1)
Submit Project Submitted requirements Submitted requirements on time. Late submission of requirements Submitted the requirements on
Designs ahead of time. but submitted the requirements the day of presentation.
before the final presentation.

Project Design Project design is excellent Project design has some flaws Project design has some syntax Project design has errors and
Reliability and 100% running. but the logic flow is correct. and logical errors but he is able the student was not able to fix
to fix it. it on the given amount of time.

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IV. ACCEPTABLE EVIDENCE/GRADING PROCEDURE

Preliminary Grade (PG) Midterm Grade (MG) Pre-final Grade (PFG) Final Semestral Grade (SG)
Main Task 20% Main Task 20% Main Task 20% Main Task 30%
Other Task 20% OtherTask 20% Practical Skills Exam 20% Final Exam 30%
Practical Skills Exam 20% Practical Skills exam 20% Attendance 10% Lab 20% SG = (PG x .20) + (MG
Attendance 10% Attendance 10% Final Output 50% Attendance 10% x .25)
Prelim Exam 30% Midterm Exam 30% Total 100% Other 10% +(SFG x .25 )+ (F x .30)

Total Total 100% Total 100%

100%

POSSIBILITY: Prelim and Midterm Periods have Similar Set of Assessments

Preliminary/ Criteria Final Criteria
Midterm
Main Task (May include minor tasks connected to main task) 40% Final Task (May include minor tasks connected to main task) 60%
Other Tasks (Homework/ Class Activities/ Exercises/ Projects) Other Tasks (Homework/ Class Activities/ Exercises/ Projects)
20% 15%
Formative written language test 15% Class Participation (Recitation, and other verbal and non- 15%
Class Participation (Recitation, and other verbal and non-verbal verbal evidence of student participation)
evidence of student participation) 15%
Attendance 10% Attendance 10%
Total 100% Total 100%

V. LEARNING PLAN
PRELIM Major Task: Brief overview of the implementation of abstract algebra and mathematical logic are more
important. This algebra helps to define the logical operations of digital circuits. So it is a very
important function of digital electronics and it helps in smooth running of the system.
Enabling Topics/Skills Foci Learning Activities/Teaching Assessment Expected Output No. of
Strategies Hours
Identifying Logic NOT, AND, OR, EXCLUSIVE Lectures NOT, AND, OR, Students will understand when asked about 5
Variables OR (XOR), NOT AND EXCLUSIVE OR (XOR), NOT the NOT, AND, OR, EXCLUSIVE OR

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 (NAND), NOT OR (NOR) AND (NAND), NOT OR (NOR) (XOR), NOT AND (NAND), NOT OR
Gates, Boiler Example Gates, Boiler Example (NOR) Gates, Boiler Example . Their level
, and data vis-a-vis information. of understanding will be measured through
the following: quizzes, board work, and
seatwork

Boolean Algebra OR, AND, Boolean Principles, Students will be able to identify and 10
(Commutation, Association, compute OR, AND, Boolean Principles,
Distribution, Absorption, De (Commutation, Association, Distribution,
Morgan's Theorem, De Morgan's in Absorption, De Morgan's Theorem, De
Gates, Logic Minimisation, Truth Morgan's in Gates, Logic Minimisation,
tables, Disjunctive Normal Forms, Truth tables, Disjunctive Normal Forms,
Conjunctive Normal Forms, Minterms
Conjunctive Normal Forms, Minterms and
and Maxterms.
Maxterms and passed the quizzes

Understanding Logic Students can easily determine the logic 2.5

Discuss on Karnaugh Maps, K-
Simplication. simplication.
maps examples, POS simplication,
Expression in POS form, Don't Care
Conditions.
5
Lectures on some definition of terms
used.

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MIDTERM Major Task: We will discuss all kinds of data, be it alphabets, numbers, symbols, sound data or video data,
are represented as combination of bits i.e. 0’s and 1’s. Each character is a unique combination of
bits. We shall now discuss how to perform basic arithmetic operations in the binary number
system.
Enabling Topics/Skills Foci Learning Activities/Teaching Assessment Expected Output No. of
Strategies Hours
Number representation, Binary numbers, unsigned Lectures on Number representation Students can organize number 2.5
Addition and binary numbers, octal, representation
Subtraction hexadecimal, negative numbers,
2's complement, 2's Compliment
addition, 2's complement
overflow, binary coded decimal
Understanding Binary adding circuits, half Lectures and discussions on Students can identify and compute
alphanumeric character adder,full adder, ripple carry alphanumeric character codes alphanumeric character codes 2.5
codes adder, combination logic design

Learning Multilevel Building larger gates, Common Lecture/presentation Quizzes, assignments, oral 2.5
logic expression Elimination participation/recitation

Learned on gate Hazards, timing diagrams, static

propagation delay hazard, dynamic hazard, hazard
removal, removing the static 1
hazard, speeding up ripple carry Students learned on Gate propagation 5
adder, fast carry generation. delay
Other ways to ROM Overview, ROM example, Quizzes, assignments, oral 10
implement basic PAL Structure, other participation/recitation, and pass the major
combinational logic memory devices, memory exam.
applications, bus contention,
tristate buffer and control
signals.
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SEMI-FINAL Major Task: In this section, we looked at synchronous operation; we looked at the inputs and outputs that we
would have. We also looked at the asynchronous operation and this is where we would use the
set and the reset and remember that those would be lows. Remember that these bubbles would
indicate that a low is what would activate the condition. We briefly introduced Flip Flops.
Enabling Topics/Skills Foci Learning Activities/Teaching Assessment Expected Output No. of
Strategies Hours
Learning Sequential Memory elements, RS Latch, Series of lectures and A student has to perform oral and practical 5
logic. RS Latch operations, RS latch demonstrations skills tests, pass the quizzes, and
transition table, RS Latch state Hands-on activities illustration
diagram, clocks and
synchronous circuits,
transparent D Latch, Master-
Slave Flip-flops,Master - Slave
D Flip-flop, D flip-flops, and
other types of flip-flops, J -K 5
Flip-flops, T Flip-flop,
Asynchronous inputs, Timing,
applications of Flip-flops,
Counters, Ripple counters,
Synchronous counters,
Characteristic table, Excitation
table, modified state transition Pass the semi-final major exam 10
table, synchronous counter
example, shift register, serial
data link

FINAL Major Task: Provide a brief overview of Synchronous State Machine . We introduced the NI Circuit Design

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 Suite combines NI Multisim and Ultiboard software for a complete circuit design, simulation,
validation, and layout platform. Multisim is an intuitive environment for circuit design. With
advanced mixed-mode simulation and validation, this software offers professional tools for your
research and prototyping. And using a comprehensive library of components, you can easily
build and validate circuit behavior. Ultiboard is a flexible PCB layout and routing environment.
Easily transfer completed. Multisim schematics to Ultiboard and layout, route, and export
completed designs for fabrication.
Enabling Topics/Skills Foci Learning Activities/Teaching Assessment Expected Output No. of
Strategies Hours
Synchronous State Know the types of state Lectures, demonstrations, hand-on A student has to perform and pass the oral 22.5
Machine & machines, machine schematics activities and practical skills test, pass the quizzes,
NI CIRCUIT DESIGN and projects
Designing circuits using NI
Circuit Design Suite

Pass the final written major exam

VI. COURSE POLICIES

A. You are allowed seven 18 hours (20% of the total hours) of absences, inclusive of tardiness. All absences after this shall mean excessive
absences, which is equivalent to a grade of 5.0
B. Assignments, laboratory exercises, projects must be submitted before the class begins; unless otherwise directed.
C. Special and make-up written outputs (long quizzes, assignments, seatwork) will be given only if you have justifiable reason/s for falling to
submit them.
D. Special major exams will be given one week after the administration of the regular major examination.
E. The use of cellular phones is prohibited during class hours, unless a special permission to use it is granted. In addition, the use of any
electronic gadget is prohibited unless otherwise relevant to the class lesson/discussion.
F. You are encouraged to discuss your class-related concerns with your subject-teacher

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VII. BASIC TEXTBOOK

Digital Electronics
Part I Combinational and Sequential Logic
All rightsreserved
By: Dr. I. J. Wassell

VII. REFERENCES

Digital Electronics: Principles, Devices and Applications

By: Anil K. Maini

Prepared by:

ENGR. LEMUEL D. PANGILINAN

Second Semester, SY 2013- 2014

Endorsed by: Approved by:

PROF. MARIA DARA C. SAQUIN DR. GERALD T. CONCHA

Supervising Coordinator Dean, College of Computer Studies

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