Analog Layout Road Map
Arabic and English Content
Table of Contents
1. Basic Analog Knowledge .......................................................................................................2
1.1 Semiconductor Physics [Mandatory] ...................................................................2
1.2 Single Stage Amp, Differential Amp, Current Mirror .............................................................2
[Recommended] ......................................................................................................................2
2. VLSI Knowledge....................................................................................................................3
2.1 MOSFET Fabrication Process [Mandatory] .............................................................3
2.2 MOSFET capacitance and on-chip capacitors
[Mandatory]..............................................................................................................................3
2.3 On-chip resistors [Mandatory] ..............................................................3
2.4 Multi Finger Transistors and Multipliers [Mandatory] .............................................................3
2.5 Mismatches and Matching Techniques [Mandatory] .............................................................4
2.6 Layout dependent effects [Mandatory] ..............................................................4
2.7 Shot Channel Effects [Mandatory] .....................................................................4
2.8 Analog Layout Flow [Mandatory] ......................................................................4
2.9 Evolution from Bulk transistor to PDSOI, FDSOI,FINFET and GAA [ Advanced] .....5
3. General Notes for Studying and interviews. ...........................................................................5
3.1 Studying .......................................................................................................................5
3.2 Interviews ....................................................................................................................6
1. Basic Analog Knowledge
1.1 Semiconductor Physics [Mandatory]
• Chapter 1 and 2 from refrence Design-of-Analog-CMOS-
Integrated-Circuit-2nd-Edition by Razavi [Reference ]
• First 5 lectures from Analog Design Playlist by Professor Hesham
Omran from ASU Playlist Link [Videos in Arabic]
1 lecture of the playlist lecture1
st
5th lecture of the playlist lecture5
• Both the reference and the playlist have the same content
1.2 Single Stage Amp, Differential Amp, Current Mirror
[Recommended]
• Single Stage Amp :
Chapter 3 from Razavi Reference [Reference]
Lecture 6 from Prof Hesham Omran Playlist
Lecture 6 Link [Videos in Arabic]
• Differential Amp :
Chapter 4 from Razavi Reference
Lecture 11 from Prof Hesham Playlist
Lecture 11 Link
• Current Mirror : [ Highly Recommended]
Chapter 5 from Razavi Reference
Lecture 10 from Prof Hesham Playlist
Lecture 10 Link
Professor Ayman Lecture about Current Mirrors
Lecture Link
2. VLSI Knowledge
2.1 MOSFET Fabrication Process [Mandatory]
• Chapter 18 from Razavi Reference.
• CMOS Fabrication Lecture by Hesham Omran
Lecture Link
2.2 MOSFET capacitance and on-chip capacitors
[Mandatory]
• Analog Layout Lab Link [ English Videos ]
Lecture 2
2.3 On-chip resistors [Mandatory]
• Analog Layout Lab resistors lecture [ English Videos]
Lecture 1 Lecture 2
2.4 Multi Finger Transistors and Multipliers [Mandatory]
• Professor Hesham Omran Lecture from Minute 25 to the
end Lecture Link [Arabic Videos ]
• Analog Layout Lab Lecture Link [English Videos]
2.5 Mismatches and Matching Techniques [Mandatory]
• Analog Layout Lab Lec. Link From Minute 13
• Analog Layout Laboratory Link
• Analog Layout Techniques Video Link
• IC Mask Layout Reference Chapter 5 Ref Link
2.6 Layout dependent effects [Mandatory]
• WPE :
Analog Layout Video Video Link
Prof Hesham Lecture from Minute 17 to 19 Lecture Link
• Electromigration effect :
Professor Hesham Lecture from Minute 21 Lecture Link
also you may search for the topic EMIR Simulations
or EMIR in Analog Design for more information
• Antenna Effect :
Professor Hesham Lecture from Minute 30 Lec Link
Can be also found in the
IC Mask Layout Reference Chapter 2
• I/O &ESD :
Professor Hesham Lecture from Start to Minute 14 Lec Link
Analog Layout Lab Lec 1 Lec 2 Lec3
• Latch Up :
Professor Hesham Lecture from Minute 6:40 Link
Analog Layout Lab Lec 1 Lec2
• Parasitics : Chapter 4 of IC Mask Layout Reference Link
2.7 Shot Channel Effects [Mandatory]
• Lecture of Professor Ayman Lecture Link
2.8 Analog Layout Flow [Mandatory]
• Floor Planning: Chapter 7 IC mask layout Reference
• Verification: Chapter 10 IC mask layout Reference
DRC , LVS , PEX , Post Layout Simulations
2.9 Evolution from Bulk transistor to PDSOI,
FDSOI,FINFET and GAA [ Advanced]
• Professor Hany Helmy 2 Lectures
SOI Lec FINFET and GAA
3. General Notes for Studying and
interviews.
3.1 Studying
• First of all if you have basic analog knowledge and you never did layout before or
didn’t study the VLSI Topic its highly recommended for you to watch
professor Hesham Omran Videos of Layout Lecture 2 ,4 and 5 from this Playlist
• If you are on a graduation project and you are asked to perform the layout of a circuit
you already designed using Virtuoso I recommend you to watch this Video of
designing the Layout mask for an OR Gate using TSMC 65 nm technology .
• If you are from a college that provides a strong courses about analog design and
circuits for example ( ASU , Cairo , AUC , Zewail) I recommend you to go for the full
topics of Basic Analog Design (I.E the part of Single stage ,differential and Current
Mirror is mandatory for you ) Since most interviewers know that you already studied
this part in the college .
• If you are from a college which doesn’t provide strong courses about analog design
you may postpone the recommended part of the analog basic knowledge until you
are already strong in the mandatory parts then you would be ready to study this part.
• Don’t think that you can study this topic without taking notes for yourself
there are no way to study the analog field without taking notes each video or chapter .
• Before any interview you are recommended to answer all the questions you are
revising in a writing way because you will be asked to illustrate your answer on a
paper or jam board if you are in an online interview .
3.2 Interviews
• Here are some Notes about some question that you may be asked in an analog
Layout Interview …. Those are the most common questions :
• What is the Cross Section of MOSFET and the operation Regions ?
• Draw C-V and I-V Characteristics
• Why do we make Bulk Ties for the MOSFET ?
• What are Guard Rings and what do we use it for ?
• What is Latchup ? Can you draw both the structure and circuit of it ?
• How do we prevent latchup effect ?
• What is electromigration and how do we overcome it ? What simulation do we use to
detect it ?
• What are the fabrication process of MOSFET ?
• What is the difference between STI and FOX Isolation Techniques ? which better ?
• How many Masks are used to manufacture MOSFET Till Metal 1 ?
• What is ESD? Does it occur more at I/O Devices or devices far from I/O ?
• Draw the ESD Protection Circuit. Show each part’s name .
• What is Shielding and what do we use it for? What are the disadvantages?
• Tell me about On-Chip Capacitors and which one has high density, and which one
has more linearity, and which one is higher in cost of fabrication.
• Which on Chip Resistor do we prefer to use? Poly or N-well and why?
• What is Deep N-well and what is used for?
• When do we use Common Centroid Matching and When do we use Interdigitation
Matching?
• Why do we use Multipliers and Multi-fingers in Transistors?
• If you are routing Clock signal, do you prefer to route with Metal 1 or Metal 3 or 4 for
example and why?
• Why don’t we use Poly for routing?
• Tell me the analog design flow. Tell me more about verification steps in Layout.
• What do we use Dummies for?
• Can you match these Current Mirror Devices? (Very Common Question)
Hint: Make sure to make all units same Width. (Width*Fingers*Multipliers=Const)
• Can you match these Differential Pair Devices? (Very Common Question)
Hint: Make sure to make all units Same Width (Width*Fingers*Multipliers=Const)
• If you have a 5T OTA make me the floor plan of it .
• Why did we go from Bulk to SOI then to FinFET? (Advanced topic )
• Why do we try to make the diffusion continuous while designing the Layout Mask ?
• In general you are going to be asked in these topics some or most of them in an
interview :
1. CMOS Structure and operation regions
2. MOSFET I/V and C/V Charactersitcs
3. MOSFET Fabrication Process
4. On-chip Resistors and Capacitors and difference between each capacitor or
resistor.
5. Short Channel Effects and how did we overcome each effect
6. Matching Techniques
7. Layout Dependent Effects: EM , Latch up , Antenna , WPE , ESD.
8.Analog Layout Flow: Design Flow, Floor planning, DRC, LVS , PEX, Post Layout Sim.
9. PDSOI,FDSOI,FinFET (Advanced Topic)
10. Packaging (Advanced Topic )
By Eng. Mohamed Nabil
27/2/2024
