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21 views29 pagesPower Electronics - Class Note
Power electronics note to understand in simple way
Uploaded by
Akash ChakrabortyCopyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF or read online on Scribd
/ 29
Chapter 8
Inverters
UKs)
Single-Phase Voltage Source Inverters : Operating Principle
Fourier Analysis of Single-Phase Inverter Output Voltage
Force-Commutated Thytistor Inverters
Three Phase Bridge Inverters
Voltage Control in Single-Phase Inverters
Pulse-Width Modulated Inverters
Reduction of Harmonics in the Inverter Output Voltage
Current Source Inverters
Series Inverters
Single-Phose Parallel Inverter
Good Inverter
A device that converts de power into ac power at desired output voltage and frequency
is called an inverter. Some industrial applications of inverters are for adjustable-speed ac
drives, induction heating, stand by air-craft power supplies, UPS (uninterruptible power
supplies) for computers, hvde transmission lines etc. Phase-controlled converters, when
operated in the inverter mode, are called line-commutated inverters, Chapter 6. But
line-commutated inverters require at the output terminals an existing ac supply which is
used for their commutation. This means that line-commutated inverters can’t function as
isolated ac voltage sources or as variable frequency generators with de power at the input.
Therefore, voltage level, frequency and waveform on the ac side of line-commutated
inverters cannot be changed. On the other hand, force commutated inverters provide an
independent ac output voltage of adjustable voltage and adjustable frequency and have
therefore much wider applications. In this chapter, force-commutated and load commutnted
inverters are described.
The de power input to the inverter is obtained from an existing pow:
from a rotating alternator through a rectifier or a battery, fuel ‘el hotoroltas areee 7
magneto hydrodynamic (MHD) generator. The configuration of ac to de converter and dew oe
inverter is called a de-link converter. The rectification is carried out by standard diedes cr
thyristor converter circuits discussed in Chapter 6. The inversion j
discussed in this chapter, Pee ese
Inverters can be broadly classified into two types ; volta; i
; r ; voltage source in
Source inverters, A voltage-fed inverter (VFI), or voltage-souree inverter (SDs Gist ‘which
rs m a dc igh i 5
Stiff de current source, In a CSI fed with stiff current some © TuEH impedance, i. from @
affected by the load. “e, output current waves are not
© scanned with OKEN Scanner {Art 8.1] 415
if ices with the help of their gate or base currents is called
Sea ae ‘elfcommutated inverters using GTOs and transistors do not require
mn circuitry as needed ii istor- i i
Gopedg GaGa ora Y as needed in thyristor-based inverters. This reduces the
self-commutated i i i
the reliability of their operation, d inverter circuits and at the same time, enhances
iad the viewpoint of connections of semiconductor devices, inverters are classified as
under :
1. Bridge inverters 2. Series inverters 3. Parallel inverters
‘The object of this chapter is to describe the operating principles of both single-phase and
three-phase inverters and to present their elementary analysis. As before, switching devices
are assumed to possess ideal characteristics. Since bridge inverters are more popular, more
emphasis is given to their description.
18.1. SINGLE-PHA:
OS BATTER SECRET NOI a ay
In this section, operating principle of single-phase voltage source inverters is discussed.
8.1.1. Single-phase Bridge Inverters
Single-phase bridge inverters are of two types, namely (i) single-phase half-bridge inverters
and (ii) single-phase full-bridge inverters. Basic principles of operation of these two types are
presented here.
Power circuit diagrams of the two configurations of single-phase bridge inverter, as stated
above, are shown in Fig. 8.1 (a) for half-bridge inverter and in Fig. 8.2 (a) for full-bridge
inverter. In these diagrams, the circuitry for turning-on or turning-off of the thyristors is not
shown for simplicity. The gating signals for the thyristors and the resulting output voltage
waveforms are shown in Figs, 8.1 (b) and 8.2 (6) for half-bridge and full-bridge inverters
respectively. These voltage waveforms are drawn on the assumption that each thyristor
conducts for the duration its gate pulse is present and is commutated as soon as this pulse is
removed. In Figs. 8.1 (6) and 8.2 (6), igs — igg are gate signals applied respectively to thyristors
TL.
igh
¥.
NIE o NEE
@ . o
Fig. 8.1. Single-phase half-bridge inverter.
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Single-phase half bridge inverter, as shown in Fig. 8.1 (a), consists of two SCRs, two diodes
and ewe supply. TL is seen from Fig. 8.1 () that for 0 <¢S 7/2, thyristor TL conducts
fand the load is subjected to a voltage V,/2 due to the upper voltage source V,/2, At t= 1/2,
thyristor T1 is commutated and T2 is gated on, During the period 7/2 <¢T, thyristor T2
conducts and the lond is subjected to a voltage (- V,/2) due to the lower voltage source V,/2.
Itis seen from Fig, 8.1 (0) that lond voltage is an alternating voltage waveform of amplitude
V,/2 and of frequency 1/7’ Hz. Frequeney of the inverter output voltage can be changed by
controlling T.
The main drawback of half-bridge inverter is that it requires 3-wire de supply. This
difficulty can, however, be overcome by the use of a full-bridge inverter shown in Fig. 8.2 (a).
It consists of four SCRs and four diodes. In this inverter, number of thyristors and diodes is
twice of that in a half bridge inverter. This, however, does not go against full inverter because
the amplitude of output voltage is doubled whereas output power is four times in this inverter
as compared to their corresponding values in the half-bridge inverter. This is evident from
Figs. 8.1 (b) and 8.2 (6).
ighig2
( Ly =
[1 13
RoE Pe
6)
Fig. 8.2, Single-phase full-bridge inverter.
For full-bridge inverter, when T1, T2 conduct, load voltage is V, and when T3, T4 conduct
load voltage is ~ V, as shown in Fig. 8.2 (6). Frequency of output voltage can be controlled by
varying the periodic time 7.
In Fig. 8.1 (a), thyristors TI, T2 are in series across the source ; in Fig. i
‘1, T4 or T3, T2 are also in series across the source. During risbangn er shout be
ensured that two SCRs in the same branch, such as Tl, T2 in Fig, 8.1 (a), do not conduct
simultaneously as this would lead to a direct short circuit of the source.
For a resistive load, two SCRs in Fig. 8.1 (a) and four SORs in Fi
because load current ip and load veltage vp would always be eet eo cane ae
however, is not the case when the load is other than resistive, For such types of loads, current
i will not be in phase with voltage vp and diodes connected in antiparallel with thyristors will
allow the current to flow when the main thyristors are turned off. As the energy is fed back
to the de source when these diodes conduct, these are called feedback diodes. In Fig. 8.1 (2)
Di, D2 are feedback diodes and in Fig. 8.2 (a), D1, D2, D3, Dd are feedback diodes”
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(Art. 8.1] 417
8.12. Stoady-state Analysis of Single-phase Inverter
Figs. 8.1 () and 8.2
oad. The load voltage ee that load voltage waveform does not depend on the nature of
for half-bridge inverter, Ot, ; Tl, T2 will get commutated naturally and
therefore no commutation circuitry will be needed. This method of commutation, knows as
load commutation, is in fact used in high frequency inverters used for induction heating.
In single-phase bridge inverters shown in Figs. 8.1 (a) and 8.2 (a), thyristors are shown
as switching devices. Note that basic inverter operation is not dependent on the particular
semiconductor device used. It means that if npn transistors (or GTOs, IGBTs etc) are used as
switching devices in place of thyristors as shown in Fig. 8.4, normal inverter operation is
obtained. The operating principle of an inverter using transistors, Fig. 8.4, can be described
merely replacing T (for thyristor) by TR (for transistor) in Figs. 8.1 (6), 8.2 (b) and 8.3 (c tof).
@ ®)
Fig. 8.4, Single-phase (a) half-bridge and (6) full-bridge inverters using transistors.
Example 8.1. (a) A single-phase full bridge inverter is connected to an'RL load. For a de
source voltage of V, and output frequency f = 1/T, obtain expressions for load current as a
function of time for the first two half cycles of the output voltage.
(®) Derive also the expressions for steady-state current for the first two half cycles.
(0) For R = 20 Qand L = 0.1 H, obtain current expressions for parts (a) and (b) in case source
voltage is 240 V de and frequency of output voltage is 50 Hz.
Solution. (a) For the first half eycle, Fig. 8.3 (b), ie. for 0 or
or s)= + pas
y, -Fer Be
Its time solution is Rl -el liom. -
vy, -Ee) Y, -BE) By
ee geeks |g ere lene
Yat) ue
vy ~B2) By
or iat =H ee -e =e iz (8.7)
for oX; as the current is leading the a
voltage. Now (8/«) must be at least equal to circuit f |
turn-off time, ie, 1.5 x 10 = 15 jisec. Fig. 8.6. Pertaining to Example 8.3.
2215x108 sec
©
10°
Now f= a" 10* Hz
= 2nx 10' x 15 x 10° = 0.942478 rad = 54°
«_Xe-10
tan 54° =-S> —
or Xo = 12.752764 = Tee
or C= 1.248 pF,
FOURIER ANALYSIS OF SINGLE-PHASE INVERTER OU’ aes ‘AGE|
The output voltage vy is shown in Fig. 8.1 (b) for a single-phase half-bridge inverter and
in Fig. 8.2 (6) for a single-phase full-bridge inverter. These output or load voltage waveforms
do not depend on the nature of load. Voltage waveshapes of Figs. 8.1 (b) and 82 (0) con be
resolved into Fourier series as under :
Saree
ae sin nwt volts w(8.25)
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= [art. 8.2) 425
for single-phase half-bridge inverter and
a 4V,
= YR esin nut volts (8.26)
n=1,35,
for single-phase full-bridge inverter,
Here n is the order of the harmon:
rad/s.
The load current ig can, therefore, be expressed as
‘ic and w= 2rf is the frequency of the output voltage in
: 4
b= > sin (nwt ~,) Amps (8.27)
n21,3,5, 0.00% 2,
where Z, = load impedance at frequeney nf
242
=|R? ae
[ + nob 5 (8.28)
nab -—
con : a no
and phase angle 6, is ,= tan!" rad (8.29)
The output, or load, current at the instant of commutation is obtained from Eq. (8.27) by
putting at =n. Its value is
ig=Iy at wt=nrad
In case Ip > 0, forced commutation is essential. If Jo < 0, no forced commutation is required
and load commutation, as described for RLC underdamped load in Art. 8.1.2, can be relied
upon.
Ifo, = rms value of the fundamental component of load current, then the fundamental load
power Pp, is given by
Po = Tor R= Vou Tos 608 0
where Vo = rms value of fundamental output voltage.
‘The fundamental output power Po; does the useful work in most of the applications (e.g.
electric motor drives). The output power associated with harmonic current does no useful work
and is dissipated as heat leading to rise in load temperature.
Exe 8.4. A single-phase half-bridge inverter has load R= 20. and de source voltage
v,
f= us5V
2
(a) Sketch the waveforms for vo, load current ig, currents through thyristor 1 and diode 1
and voltage across thyristor T1. Harmonics other than fundamental component are neglected.
Indicate the devices that conduct during different intervals of one cycle.
(b) Find the power delivered to load due to fundamental current.
(c) Check whether forced commutation is required.
Solution. (a) The fundamental component of output voltage, from Eq. (8.25), is
2V,
Uo =e? sin wt
2x 230
The rms value of this voltage, Vo. = “yg = 103.552,V
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and the load current,
Vou _ 103.552
Tae R 8
The fundamental frequency component of load
current is
ig = 51.776 V2 sin wt
=51.776A
The waveforms for the various voltages and
currents are shown in Fig. 8.7. For resistive load, ,
diodes do not come into conduction, therefore ip, is
zero. When T1 conducts, vy,=0. When T2 4 faxs1 7768
t
conducts, vp; = V, as shown.
tor
(6) Power delivered to load {}______— ate
=I}, R= (61.776) x2=5361.5 watts YT ue
2.
When T1 is conducting, power to load is
V, 0
delivered by upper source = and when T2 is on,
2
lower source delivers power to load. Fig. 8.7. Pertaining to Example 8.4.
v,
Power delivered by each souree = 5- I,
Here J, = average value of fundamental component of source current over one cycle.
* v2 1,
=zh NB Io sin ot -d (ot) =
pe EDN Suite = 23.304 A
Power delivered by each source = 115 x 23,304 = 2679.96 watts
Power delivered by both the sources = 2 x 2679.96 = 5360 W.
Power delivered by both the sources is equal to that consumed by the load.
(©) As the diodes do not conduct, forced commutation is essential.
Example 8.5. For a single-phase full-bridge inverter, V, = 230 V de, T'=1ms. The load
consists of RLC in series with R= 1, wL =6 Qand é =72
(a) Sketch the waveforms for load voltage vy, fundamental component of load current ipy'
source current i, and voltage across thyristor 1. Indicate the devices under conduction during
different intervals of one cycle.
(b) Find the power delivered to load due to fundamental component,
(c) Check whether forced commutation is required or not. Take thyristor turn-off time as 100
Hs.
sso (a) The load voltage waveform vg and its fundamental component vp, are shown
in Fig. 8.8.
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inven (Art, 8.2] 427
Rms value of load voltage, from Eq, (8.26), is
Vy, 24 Nel 4x280 |
= ae = avy 7 2071V vo)
Mon
aaov
Rms value of current, Ip, =
‘oy
°
ts’
¥
‘The fundamental component of current ig: a8 57,
a function of time is 230)
in = V2 Ip, sin (wt - 6,) 0
207.1.
= ve 20h sin (wt + 45°)
= 207.1 sin (wt + 45°) Fig. 8.8. Pertaining to Example 8.5.
Load current ip, and source current i, are plotted in Fig. 8.8 and the conducting components
are also indicated
‘207.1
(6) Power delivered to load = 15, R= Fe) x1=21.445 kW
This must be equal to the power P, delivered by the source.
* =V, I, watts
where I, = average value of the fundamental component of source current
=i I, WZ Ip, sin (wt + 45°) d (wt)
207.1 oy * _ 207.1 .
= 2012 (cos (ot + 455g =“ [2co8 45°)
P, = 230 x 93.23 = 21.443 kW
(o) Fig. 8.8 reveals that vp; is negative for some time before 78, T4 are triggered. Thus
circuit turn-off time can be obtained from
or
£20125 ms =125 ps
odes D1, D2 reverse biases T1, 'T2 for 125 us, which is more than the
As voltage drop in di
oft ti no forced commutation is required.
thyristor turn-off time of 100 Hs,
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‘{~————
VOLTAGE CONTROL FRNA a NRE fT
'AC loads may require constant or adjustable voltage at their input terminals. When such
loads are fed by inverters, itis essential that output voltage of the inverters is so controlled as
to fulfl the requirement of ac loads. Examples of such requirements are as under :
(i) An ac load may require a constant input voltage though at different levels. For such a
load, any variations in the dc input voltage must be suitably compensated in order to maintain
a constant voltage at the ac load terminals at a desired level.
(i) In case inverter supplies power to a magnetic circuit, such as an induction motor, the
voltage to frequency ratio at the inverter output terminals must be kept constant. This avoids
saturation in the magnetic circuit of the device fed by the inverter.
‘The various methods for the control of output voltage of inverters are as under =
(a) External control of ac output voltage
(b) External control of de input voltage
(c) Internal control of inverter.
‘The first two methods require the use of peripheral components whereas the third method
requires no peripheral components. These methods are now briefly discussed.
8.5.1. External Control of ac Output Voltage
There are two possible methods of external control of ac output voltage obtained from
inverter output terminals. These methods are :
(a) AC voltage control
(b) Series-inverter control
These are now discussed briefly.
(a) AC voltage control : In this method, an ac voltage controller is inserted between the
output terminals of inverter and the load terminals as shown in Fig. 8.25. The voltage input to
the ac load is regulated through the firing angle control of ac voltage controller. This method
gives rise to higher harmonic content in the output voltage ; particularly when the output
voltage from the ac voltage controller is at low level. This method is, therefore, rarely emploved
except for low power applications.
Constant | inverter Controlled
‘dc voltage| ‘ac voltage
Fig. 8.25. External control of ac output voltage.
(b) Series-inverter control : This method of voltage control involves the use of two oF
more inverters in series. Fig. 8.26 (a) illustrates how the output voltage of two inverters can be
summed up with the help of transformers to obtain an adjustable output voltage. In this figure
the inverter output is fed to two transformers whose secondaries are connected in series:
Phasor sum of the two fundamental voltages Vo), Voz gives the resultant fundamental voltae?
Vp as shown in Fig. 8.26 (b). Here Vp is given by
‘ va
Vo=[Vi: + Vin +2 Von: Von cos 6]
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tnverter-1]— Yon
Constant =
"voting? fF %
loverter=I a
Vos
@ ()
Fig. 8.26, Series inverter control of two inverters.
It is essential that the frequency of output voltages Vo), Voy from the two inverters is the
same. When 0 is zero, Vo = Vo, + Voz and for 6 = n, Vo =0 in case Voy = Vop. The angle 6 can be
varied by the firing angle control of two inverters. The series connection of inverters, called
multiple converter control, does not augment the harmonic content even at low output voltage
levels.
8.5.2. External Control of de Input Voltage
In case the available voltage source is ac, then de voltage input to the inverter is controlled
through a fully-controlled rectifier, Fig. 8.27 (a) ; through an uncontrolled rectifier and a
chopper, Fig. 8.27 (6) ; or through an ac voltage controller and an uncontrolled rectifier, Fig. 8.27
(c). If available voltage is de, then de voltage input to the inverter is controlted by means of a
chopper as shown in Fig. 8.27 (d).
Input voltage-control techniques shown in Fig. 8.27, in which de voltage input to inverter
is controlled by means of components external to the inverter, has the following main
advantage.
controted_[ Controlled
‘de voltage eae | ‘ac voltage
Constant [ Fully contrott:
ec voltage] ed rectifier
(a)
Constant_| Uncontrolled} eon Filter |Sontgotled Controlled.
‘ae voltage] rectifier oe de voltage ‘ac voltage
(6)
Constant JAC voltage |Uncontrolied| Fitter [Contotes Controlled
‘¢ voltage |controtler rectifier Mer Vac voltage ‘ae voltage
©)
carton conte et
wont [cneppef | riter Sette _[ herr | Seale
oe de valoge 3
(d)
Fig, 8.27. External control of de input voltage to inverter ; (a), (b) and (c) with ac source on the input
(@) with de source on the input.
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ec eel Power Electronics
Ss ‘ic tent are not affected appreciabl;
dutput voltage waveform and its harmonic cont t ly a the
savertor anh voltage is contralled through the adjustment of de input voltage to the inverter
‘This method of voltage control, however, suffers from the following disadvantages :
{i The number of power converters used for the control of inverter output voltage Varieg
from two to three, F 7. More power-handling stages result in more losses and reduced
officiency of the entire scheme,
(i) For reducing the ripple content of de voltage input to the inverter, filter circuit ig
required ir. all types of schemes shown in Fig. 8.27. Filter circuit increases the cost, weight ang
size and at the same time reduces efficiency and makes the transient response sluggish.
(ii) As the de input is decreased, the commutating capacitor voltage also decreases.
v,
IT
load current. Therefore, for a large variation of output voltage for a constant load current,
control of de input voltage is not conducive. This difficulty can, however, be overcome by a
separate fixed de source for charging the commutating capacitor, but this makes the scheme
costly and complicated.
8.5.3. Internal Control of Inverter
Output voltage from an inverter can-also be adjusted by exercising a control within the
inverter itself. The most efficient method of doing this is by pulse-width modulation control
used within an inverter. This is discussed briefly in what follows :
Pulse width modulation control. In this method, a fixed de input voltage is given to
the inverter and a controlled ac output voltage is obtained by adjusting the on and off periods
of the inverter components. This is the most popular method of controlling the output voltage
and this method is termed as pulse-width modulation (PWM) control.
The advantayes possessed by PWM technique are as under :
(@ The output voltage control with this method can be obtained without any additional
components.
‘This has the effect of reducing the circuit turn-off time |¢ = C — |for the SCR for a constant
(ii) With this method, lower order harmonics can be eliminated or minimised along with
its output voltage control. As higher order harmonics can be filtered easily, the filtering
requirements are minimised,
The main disadvantage of this method is that the SCRs are expensive as they must possess
low turn-on and turn-off times.
PWM inverters are quite popular in industrial applications, these are therefore discussed
in detail in the next section.
PWM inverters are gradually takin,
PWM techniques are characterised by
ig over other types of inverters in industrial applications.
y constant amplitude pulses. The width of these pulses
is, however, modulated to obtain inverter output voltage control and to reduce its harmonic
content. Different PWM techniques are as under ;
(a) Single-pulse modulation
(c) Sinusoidal-pulse modulation.
In PWM inverters, forced commutation is essential. The three PWM techniques listed
abdVve differ from each other in the harmonic content in their respective output voltages. Thus,
que depends upon the permissible harmonic content in the
(b) Multiple-pulse modulation
inverter output voltage.
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In industrial applications, PWM inverter is supplied from a diode bridge rectifier and an
LC filter. The inverter topology remains the same as in Fig. 8.2 (a) for a single-phase inverter
and in Fig. 8.19 for a three-phase inverter. But now the devices are switched on and off several
times within each half cycle to control the output voltage which has low harmonic content.
In the following lines, the basic principles of PWM techniques for single-phase inverters are
illustrated and then the methods of obtaining such output voltages are considered.
8.6.1. Single-pulse Modulation
_ The output voltage from single-phase full-bridge inverter is shown in Fig. 8.28 (a). When
this waveform is modulated, the output voltage is of the form shown in Fig. 8.28 (6). It consists
of a pulse of width 2d located symmetrically about x/2 and another pulse located symmetrically
about 3/2. The range of pulse width 2d varies from 0 to n ; i.e. 0 < 2d < x, The output voltage
is controlled by varying the pulse-width 2d. This shape of the output voltage wave shown in
Fig. 8.28 (6) is called quasi-square wave.
Fourier analysis of Fig. 8.28 (6) is as under :
i/2+d)
f V, sin nav -d (at) = 22 [xn 2 sin na] (8.61)
mn Re wad) '# nk 2
Positive and negative half cycles of vp in Fig. 8.28 (6) are symmetrical about n/2 and
3n/2 respectively. In addition, these half cycles are also identical. As a result, coefficient
a, =0. Thus the waveform of Fig. 8.28 (b) can be described by Fourier series as
— 4V, a
vo= Da tsin sin nd sin nat (8.62)
na4as.
ave i 7 Lee :
or vo=— (sind sin at - 5 sin 3d sin 3 at += sin 5d sin 5 at. (8.63)
When pulse width 2d is equal to its maximum value of r radians, then the fundamental
component of output voltage, from Eq. (8.63), has a peak value of
4V,
Yom = (8.64)
For pulse width other than 2 d = x radians, the peak value of fundamental component, from
ave
Eq, (8.63), is —* sind.
bare
Pertodin Odd
“(oS (180
Pulse width (24) in degrees —>
©
jodulation (SPM) (c) Harmonic content in SPM.
®
Fig. 8.28. (a), (b) Single-pulse m
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a Be
Ifnd is made equal to x or d = 7 or if pulse width is made equal to 2d = =, Bq. (8.62) shows
that nth harmonic is eliminated thal the inverter output voltage. For example, for eliminating
third harmonic, pulse width of 2d must be equal to a. = 120°,
‘The peak value of nth harmonic, from Eq. (8.62), is
4,
Yonm =" Sin nd (8.65)
nn
From Eqs. (8.64) and (8.65), 2m = Sinnd
tom
In Bq. (8.66), note that vp, is the peak value of the fundamental component of square
voltage wavefrom of width 2d =n. The ratio as given by Eq. (8.66) is plotted in Fig. 8.28 (c) for
n=1 (plot of sind), n =3 (plot of sin 34/3), n =5, 7 for different pulse widths. It is seen from
these curves that when fundamental component is reduced to 0.5 for 2d = 60°, the amplitude of
third harmonic is t sin 90 = 0.33. When fundamental component is reduced to about 0.143, all
the three harmonics (3, 5, 7) become almost comparable to the fundamental. This shows that in
this method of voltage control, a’great deal of harmonic content is introduced in the output
voltage, particularly at low output voltage levels.
The rms value of output voltage, from Fig. 8.28 (6), is
v2 1/2
oS v=] -v%4] (8.67)
8.6.2. Multiple-pulse Modulation
This method of pulse modulation is an extension of single-pulse modulation. In
multiple-pulse modulation (MPM), several equidistant pulses per half cycle are used. For
simplicity, the effect of using two symmetrically spaced pulses per half cycle, Fig. 8.29 (a), is
investigated here. In this figure, pulse width is taken half of that in Fig. 8.28 (b), but their
amplitudes are the same. This means that rms values of pulses in Figs. 8.28 (b) and 8.29 (a) are
equal to that given in Eq. (8.67). For the waveform of Fig. 8.29 (a), Fourier constants are as.
under ;
~-(8.66)
0, =2 Jf vp sin nat- dae)
9 pray
22) am Ver sin nat - dwt) 2
‘The use of factor 2 in the above expression accounts for the two pulses from 0 to x in Fig.
8.29 (a)
) (6)
Fig. 8.29, Symmetrical two-pulse modulation pertaining to MPM.
a
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4V, y-d2 BY, nd
One ra [008 HL i ag Sin ny sin“ (8.68)
As in Fig. 8.28 (6), a,, = 0 in Fig. 8.29 (a) also.
Therefore, the waveform of Fig. 8.29 (a) can be described by Fourier series as
8,
= * sin nysin ™ sin not (8.69)
n=135 on 2
sv, ee
or ye [sm ysin $ sin ot ¥ 3 sin 3y-sin a sin 3 at +4 sin 5ysin a sin 5ut +
(B70)
The amplitude of the nth harmonic of the two-pulse waveform of Fig. 8.29 (a), from Eq.
(8.69), is
(8.71)
Eq. (8.71) shows that magnitude of v, depends upon yand d. This expression also shows
that when y= or d=25, nth harmonic can be eliminated from the output voltage. But this
has the effect of reducing the fundamental component of output voltage. For example, take
pulse width 2d = 72° for single-pulse modulation of Fig. 8.28 (6). Then, from Eq, (8.65), the peak
value of fundamental voltage component is
4v,
Yoim =" Sin 96° = 0.7484 V,.
For two-pulse modulation and pulse width d = 36°, y in Fig. 8.29 (a), is
(8.72)
or in general.
Eq. (8.72) is valid in case pulses of equal width are symmetrically spaced. Here N is the
number of pulses per half cycle.
Eq. (8.72) can also be obtained by referring to Fig. 8.29 (b). For N pulses per half cycle,
there are (N + 1) intervening equidistant spaces, each of width 6, as shown in Fig. 8.29 (6).
Note that for these equidistant spaces, vo = 0. Total width of these (NV + 1) equidistant spaces
= (N+ 1) 6 = (width of N pulses) = ( ~ 2d)
or M4
rA fd
Fig. 8.29 (b) shows that 0 = half of the pulse width = §, ‘This figure also reveals that
1 Na
(8.72)
or
Peak value of fundamental voltage component, from Eq, (8.71), is
Vs gin 64 sin 18° = 0.637 V,.
®
Youn =
© scanned with OKEN Scanner Power Electronics
458 [Art. 8.6)
t voltage is lower (0.637 V,) for
is ‘ot that fundamental component of output 7
categee 7 eiremagel it is for single-pulse modulation (0.7484 V,). It can be shown that
BO Poe ooaevat palses per half cycle, the amplitudes of lower order harmonies are reduced
for more er higher harmonies are inereased significantly. But this is no disadvantage as
righer order harmonics can be filtered out easily.
‘The symmetrical modulated wave shown in Fig. 8.29 (a) can be generated by comparing
an adjustable square voltage wave V, of frequency o with a triangular carrier wave Y, of
frequency (0, as shown in Fig. 8:30 (6). This comparison is done in a comparator, Fig. 8.30 (a),
In Fig. 8.29 (a), there are only two pulses per half-cyele but in Fig. 8.0 (6), there are four
Carrier signal ¥e,freq te
Triangular v7 Reference signal Vr,
wave Ve}
wt
Trigger] trigger a
pulse
generator] pulses to
SCRs
‘Square %o
‘wave : vs
ot
bet i |
Cs “Ws
ii
©
®)
Fig. 8.30. (a) Pertaining to multiple-pulse modulation (MPM) (b) Output voltage waveform
with MPM (c) V, and V, shown on a larger scale.
pulses per half cycle. The triggering pulses for thyristors are generated at the points of
intersection of the carrier and reference signal waves. The firing pulses so generated turn-on
the SCRs so that output voltage vp is available during the interval triangular voltage wave
exceeds the square modulating wave shown in Fig. 8.30 (6). In this figure, f, and f are the
frequencies in Hz for the carrier signal and reference signal respectively. This figure reveals
1
that i and p-= 7 and the number of trigger pulses is 4x = 4. In general, the number of
pulses generated per half cycle can be determined from Fig, 8.30 (b) as under :
For triangular carrier wave, pulse width = 2
For square reference wave, width of half-cycle =
=F
+; Number of pulses per half-cycle,
2 N= Number of hill-tops per half-cyele,
= Length of half-cycle of square reference wave
Width of one cycle of triangular earrier wave
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os (8.73)
Note that N in Eq. (8.73) must be an integer. The pulse height of the reference, or
‘modulating, signal ean be controlled within the range 0 < V, < V, and pulse width 34 varied in
2d a ance:
the range 0 < 7); < 5 by adjusting the magnitude V, of the reference square wave. The pulse
width is 2d/N on the assumption of same rms voltage as in single-pulse modulation.
In Fig. 8.30 (6), pulse width 2d/N is given by
2d _(x
we(i-
A general expression for the pulse width can be obtained by sketching the first cycle of
carrier signal on a larger scale as in Fig. 8.30 (c). From this figure, pulse width, in general, is
given by
2d _(x
Ye =(f-2 wA8.74)
where zx, defined in Fig, 8.30 (c), is
eweeewe
n/2N- x
or wae
From Eq. (8.74), the pulse width is
4 --(8.75)
In MPM method, lower order harmonics can be eliminated by a proper choice of 2d and y.
But the rms voltage in Figs. 8.28 to 8.30 is the same, i.e.
ape
‘This means that if lower order harmonics are eliminated, the magnitude of higher order
harmonies would go up. But this is not a disadvantage, as higher order harmonics can be
filtered out by the use of filters at the output terminals of the inverters.
8.6.3, Sinusoidal-pulse Modulation (SPWM)
this method of modulation, several pulses per half cycle are used as in the case of
tion (MPM). In MPM, the pulse width is equal for all the pulses. But in
fh is a sinusoidal function of the angular position of the pulse in a cycle
In
multiple-pulse modulat
SPWM, the pulse widtl
as shown in Fig. 8.31.
For realizing SPWM, a high-frequency triangular carrier wave v, is compared with a
sinusoidal reference wave v, of the desired frequency. The intersection of v, and v, waves
determines the switching instants and commutation of the modulated pulse. In Fig. 8.31, Vo is
the peak value of triangular carrier wave and V, that of the reference, or modulating, signal
and reference waves are mixed in a comparator as in Fig. 8.30 (a). When
| aeaaiee ¢ higher than the triangular wave, the comparator output is
sinusoidal wave has magnitud
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460__[Art. 8.6] lectronicg
Reference wave, freq f
—="7 Carrier wave, trea: fe
@
Carrier wave, trea. fe
Reference wave, freq. f
&
Fig. 8.31. Output voltage waveforms with sinusoidal pulse modulation.
high, otherwise it is low. The comparator output is processed in a trigger pulse generator in
such a manner that the output voltage wave of the inverter has a pulse width in agreement with
the comparator output pulse width.
When triangular carrier wave has its peak coincident with zero of the reference sinusoid,
fe :
there are N= 97 pulses per half cycle ; Fig. 8.31 (a) has five pulses. In case zero of the triangular
wave coincides with zero of the reference sinusoid, there are (N — 1) pulses per half cycle ; Fig.
8.31 (b) has G- | ie, four, pulses per half cycle.
‘The ratio of V,/V, is called the modulai
damental component of output voltage is
nity. Thus the output voltage is controlled
proportional to MI, but MI can never be more than u
by varying MI.
Harmonic analysis of the output modulated v.
oltage w: M has the
following important features : ' Wave reveals that SPW!
(@ For MI less than one, largest harmonic amplitudes in the iated
q c ssocia
with harmonics of order f./f+ 1 or 2N + 1, where Nis the number of ele ete ‘Thus,
by increasing the number of pulses per half eycle, the order of dominant harmonic frequen’
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can be raised, which can then be filtered out easily. In Fig. 8.31 (a), N = 5, therefore harmonics
of order 9 and 11 become significant in the output voltage. It may be noted that the highest
order of significant harmonic of a modulated voltage wave is centred around the carrier
frequency /, lin Fig. 8.31 (a), f, = 10).
It is observed from above that as N is increased, the order of significant harmonic incr
and the filtering requirements are accordingly minimised. But higher value of N entails higher
switching frequency of thyristors. This amounts to more switching losses and the! an
impaired inverter efficiency. Thus a compromise between the filtering requirements and
inverter efficiency should be made,
08
(ii) For MI greater than one, lower order harmonies appear, since for MI > 1, pulse width is
no longer a sinusoidal function of the angular position of the pulse.
In addition to the three PWM techniques discussed above, there is another PWM technique
called multiple-pulse modulation with selective reduction (MPMSR). In this technique, the
number of M pulse positions in each quarter cycle are so selected as to reduce or eliminate M
harmonics from the output voltage waveform [6]. This PWM technique will, however, not be
discussed here.
8.6.4. Realization of PWM in Single-phase Bridge Inverters
The output voltage waveforms shown in Figs. 8.28 to 8.31 reveal that output voltage from
an inverter is V,, zero or - V,. Such waveforms can be realized in single-phase inverters as
under =
(a) Single-phase full-bridge inverter. In the inverter of Fig. 8.2 (a), when + V, is to be
obtained in the positive half cycle, thyristors Tl, T2 are turned on. For obtaining - V, in the
negative half cycle, thyristors T3, T should be turned on. For zero output voltage, ie. if the load
is to be short-circuited ; then T1, D3 or T3, DI from positive group ; or T4, D2 or T2, D4 from
negative group should conduct depending upon the direction of load current. This means that
for obtaining zero output voltage at the end of each pulse, one of the two conducting SCRs
should only be turned off. Under this strategy, only one thyristor need be turned on for
obtaining the next voltage pulse. Switching on and commutation of thyristors should be so
arranged as to utilize the thyristors symmetrically, Let us illustrate this with an example,
‘Suppose output voltage of pulse width 2n/3 radians is to be obtained in each half cycle. This
pulse width is symmetrically placed as shown in Fig. 8.32. The waveform of load current ig is
Yo}
(a) ja T1,T2 ——aiT1p3:T301e— 3,74 ri rape! Tate
(b) Naote i,t ——r pd rebae— 13,76 “TApITIDI be
Fig. 8.32. Conduction of various components for single-phase brid
ge inverter of Fig. 8.2 (a).
© scanned with OKEN Scanner 462__[Art. 8.6] Power Electronics
assumed as sketched in Fig. 8.32. It is obvious from these two waveforms that from B to C; T1,
2 should conduct and from E to F ; T3, T4 should be on.
From C to D, vp= 0 but current ig is positive. Therefore, from C to D ; either T1, D3 or T2,
D4 should conduct, this is shown in Fig. 8.52.
From D to E, vg = 0 but ig is negative. Negative current with zero output voltage can exist
only if T3 or T4 together with one diode are on. When T3 is on, then T3, D1 should conduct
and with T4, D2 should conduct, Fig, 8.32.
From F to G, v= 0, ig is negative. For this ; T4, D2 or T3, D1 should conduct. From
DtoE, if T3, D1 conduct, then now T2, D4 must conduct in order to utilize the thyristors
symmetrically. In case T4, D2 conduct from D to £, then T3, D1 should conduet from F to G.
From G to H ; T2, Dé or Tl, D3 conduct as shown. The conduction from G to H is similar
to that from A to B.
It may be observed from Fig. 8.32 that, during one cycle, each thyristor conducts for
150° and each diode for 30°.
(6) Single-phase half-bridge inverter. In single-phase half-bridge inverter of Fig. 8.1
a), zero value of output voltage cannot be obtained. The output voltage can either be
V,/2 or - V,/2. In Fig. 8.33, V,/2 from A to B is obtained with T1 on, from B to C with T2 on,
from C to D with T1 on and so on. For obtaining a symmetrical waveform for output voltage
in Fig. 8.33, interval AB = interval DE j interval BC = interval EF and so on. The output voltage
can be controlled through the adjustment of width 2d.
_// Fig. 8.33. Output voltage waveform obtained through PWM in half-bridge inverter.
A, ; a
Example 8.9. A single-phase bridge inverter, fed from 230 V de, is connected to load
R= 10.Qand L = 0.03 H. Determine the power delivered to load in case the inverter is operating
at 60 Hz with (a) square wave output (b) quasi-square wave output with an on-period of 0.5 of
a cycle and (c) two symmetrically spaced pulses per half cycle with an on-period of 05 of @
cycle.
Solution. In order to calculate the power delivered to load fairl
ly accurately, harmoni
to seventh may be considered. ly, harmonics up
(a) Square-wave output : From Eq. (8.26), rms value of fundamental voltage is
aV, _4x230
Vo see ay = 207.10V
Load impedance at fundamental frequency is
2, = (10? + (2x x 50 x 0.03)" = 13.7414.
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Inverters
Ty porto =15.0712A
Vog = ee 69.035 V
and %,= N10" + nx 50x 3 x 0,03)" = 29,9906 2
oa = ees = 2.302 A
Similarly, Is ox TTT ERT = 0.8598 A
0.4434 A
920
T=
or Tx ax V2 *EgTeGex EON TROOS?
Rass value of resultant load current,
12
To=[Tox + Tha + Ios + Tr]
Power delivered to load =/3R
15.0712" + 2.302 + 0.8598? + 0.4434"] x 10
333.76 W
(6) Quasi-square wave output : For quasi-square wave or single-pulse modulated wave,
use Eq. (8.62), where pulse width, 2d = 0.5 x 180° = 90° or d= 45°. From this equation, rms
value of fundamental voltage is
Vor= ie sind = = A228 ain 45° = 146.423 V
46.423
Tox = 75.7444 = 10.6556 A
Y= 3 ra sin 3 x 45° = 48.8075 V
_ 48.8075
03 29.9906
fe 4x 230 . :
Similarly, = By ae 88 OX 499 x ears aan 0.6079 A
x 230
Ton on x48) 5-757 ae 0.3135 A
Power delivered to load = (10.6556” + 1.6274” + 0.6079" + 0.3135%) x 10
= 1166.58 W
(©) For two symmetrically spaced pulses per half eycle, use Eq, (8.69). For this equation,
180-90 , 48 ~ 59.5°. From Eq. (8.69),
6274 A
2d = 0.5 x 180 = 90° or d = 45° and from Eq. (8.72), ¥=-—g—_
ms value of fundamental vege is
% 280 sin 59.5° sin 4 = 125.755 V
Von =p sin sin d 8X20 sin 52.5" sin = 125,
125.155 9 16154
13.7414 79° .
8x 230. in (52.53): sin (F x 3}
=r’
l=
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464 [Art 8.7)
48.815.
fos = 39.9906 1.6277 n
8x 230 5: ieee Soda eae
Tog = S230. sin (52.6 x 8) 8in (22.5 % 5) x Geaagog = LOTSA
8x230 i —__
Ig, Ixn ve sin (52.5 7) sin (22.5 x D* 66, 797 = 00443 A
9.1515? + 1.6277" + 1.575" + 0.0443") x 10
= 888,82 W.
REDUCTION OF HARMONICS INTHE INVERTER OUTPUT |
There are several industrial applications which may allow a harmonic content of 5% of its,
fundamental component of input voltage when inverters are used. Actually, the inverter output
voltage may have harmonic content much higher than 5% of its fundamental component. In
order to bring this harmonic content to a reasonable limit of 5%, one method is to insert filters
between the load and inverter. If the inverter output voltage contains high frequency
harmonics, these can be reduced by a low-size filter. For the attenuation of low-frequency
harmonics, however, the size of filter components increases. This makes the filter circuit costly,
bulky and weighty and in addition, the transient response of the system becomes sluggish,
‘This shows that lower order harmonics from the inverter output voltage should be reduced by
some means other than the filter. Subsequent to this, high frequency component from this
voltage can easily be attenuated by a low-size, low-cost filter. The object of this section is to
study these methods of reducing low-order harmonics from the output voltage of an inverter.
8.7.1. Harmonic Reduction by PWM
Ithas already been discussed that when there are several pulses per half cycle, lower-order
harmonics are eliminated. Fig. 8.34 illustrates output voltage waveform that can be obtained
from a single-phase full-bridge inverter. This waveform can also be obtained from a
single-phase half-bridge inverter, but then the amplitude of voltage wave would be V,/2. The
waveform of Fig. 8.34 needs ten commutations per cycle (= 360°) instead of two in an
unmodulated wave. The voltage waveform of Fig. 8.34 is symmetrical about as well as
n/2.
Power delivered to load
Fig. 8.34. Harmonic reduction by PWM in. single-phase inverter.
As this voltage waveform has quarter-wave symmetry, a,
4 an wt 0/2
bums I sinnut-d ot -[ sinnot-d(at)+f sinnat swe] (8.18)
7 EF
AV, [1-2 cos ney +2 snes}
® n (8,76)
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dete (Art. 8.7] 465
If third and fifth harmonies are to be eliminated, then from Eq. (8.76),
ep = 2 cos 3 a + 2.cos 3 o eS
T 3
a bya Sh Beebe, BeonSon
® 5 eS
or 1-2 cos Sey, +2 cos 30, =0
and 1-2 cos Soy, +2 cos 50, =0
‘The above two simultancous equations can be solved numerically to calculate a, and a
under the condition that 0
