Lecture 2

Computer Abstractions
and Technology (Part II)
CPU Time
CPU Time = CPU Clock Cycles ´ Clock Cycle Time
CPU Clock Cycles
=
Clock Rate
n Performance improved by
n Reducing number of clock cycles
n Increasing clock rate
n Hardware designer must often trade off clock
rate against cycle count

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CPU Time Example
n Computer A: 2GHz clock, 10s CPU time
n Designing Computer B
n Aim for 6s CPU time
n Can do faster clock, but causes 1.2 × clock cycles
n How fast must Computer B clock be?
Clock CyclesB 1.2 ´ Clock Cycles A
Clock RateB = =
CPU Time B 6s
Clock Cycles A = CPU Time A ´ Clock Rate A
= 10s ´ 2GHz = 20 ´ 10 9
1.2 ´ 20 ´ 10 9 24 ´ 10 9
Clock RateB = = = 4GHz
6s 6s
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Instruction Count and CPI
Clock Cycles = Instruction Count ´ Cycles per Instruction
CPU Time = Instruction Count ´ CPI ´ Clock Cycle Time
Instruction Count ´ CPI
=
Clock Rate
n Instruction Count for a program
n Determined by program, ISA and compiler
n Average cycles per instruction
n Determined by CPU hardware
n If different instructions have different CPI
n Average CPI affected by instruction mix

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CPI Example
n Computer A: Cycle Time = 250ps, CPI = 2.0
n Computer B: Cycle Time = 500ps, CPI = 1.2
n Same ISA
n Which is faster, and by how much?
CPU Time = Instruction Count ´ CPI ´ Cycle Time
A A A
= I ´ 2.0 ´ 250ps = I ´ 500ps A is faster…
CPU Time = Instruction Count ´ CPI ´ Cycle Time
B B B
= I ´ 1.2 ´ 500ps = I ´ 600ps
CPU Time
B = I ´ 600ps = 1.2
…by this much
CPU Time I ´ 500ps
A
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 CPI in More Detail
n If different instruction classes take different
numbers of cycles
n
Clock Cycles = å (CPIi ´ Instruction Count i )
i=1

n Weighted average CPI

Clock Cycles n
æ Instruction Count i ö
CPI = = å ç CPIi ´ ÷
Instruction Count i=1 è Instruction Count ø

Relative frequency

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CPI Example
n Alternative compiled code sequences using
instructions in classes A, B, C

Class A B C
CPI for class 1 2 3
IC in sequence 1 2 1 2
IC in sequence 2 4 1 1

n Sequence 1: IC = 5 n Sequence 2: IC = 6
n Clock Cycles n Clock Cycles
= 2×1 + 1×2 + 2×3 = 4×1 + 1×2 + 1×3
= 10 =9
n Avg. CPI = 10/5 = 2.0 n Avg. CPI = 9/6 = 1.5
Lecture 2 — Computer Abstractions and Technology — 7
Performance Summary
The BIG Picture

Instructions Clock cycles Seconds

CPU Time = ´ ´
Program Instruction Clock cycle

n Performance depends on
n Algorithm: affects IC, possibly CPI
n Programming language: affects IC, CPI
n Compiler: affects IC, CPI
n Instruction set architecture: affects IC, CPI, Tc

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 §1.5 The Power Wall
Power Trends

n In CMOS IC technology
Power = Capacitive load ´ Voltage 2 ´ Frequency

×30 5V → 1V ×1000

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Reducing Power
n Suppose a new CPU has
n 85% of capacitive load of old CPU
n 15% voltage and 15% frequency reduction
Pnew Cold ´ 0.85 ´ (Vold ´ 0.85)2 ´ Fold ´ 0.85
= 2
= 0.85 4
= 0.52
Pold Cold ´ Vold ´ Fold

n The power wall

n We can’t reduce voltage further
n We can’t remove more heat
n How else can we improve performance?
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 §1.6 The Sea Change: The Switch to Multiprocessors
Uniprocessor Performance

Constrained by power, instruction-level parallelism,

memory latency

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Multiprocessors
n Multicore microprocessors
n More than one processor per chip
n Requires explicitly parallel programming
n Compare with instruction level parallelism
n Hardware executes multiple instructions at once
n Hidden from the programmer
n Hard to do
n Programming for performance
n Load balancing
n Optimizing communication and synchronization

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 §1.7 Real Stuff: The AMD Opteron X4
Manufacturing ICs

n Yield: proportion of working dies per wafer

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AMD Opteron X2 Wafer

n X2: 300mm wafer, 117 chips, 90nm technology

n X4: 45nm technology
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Integrated Circuit Cost
Cost per wafer
Cost per die =
Dies per wafer ´ Yield
Dies per wafer » Wafer area Die area
1
Yield =
(1+ (Defects per area ´ Die area/2))2

n Nonlinear relation to area and defect rate

n Wafer cost and area are fixed
n Defect rate determined by manufacturing process
n Die area determined by architecture and circuit design

Lecture 2 — Computer Abstractions and Technology — 15

SPEC CPU Benchmark
n Programs used to measure performance
n Supposedly typical of actual workload
n Standard Performance Evaluation Corp (SPEC)
n Develops benchmarks for CPU, I/O, Web, …
n SPEC CPU2006
n Elapsed time to execute a selection of programs
n Negligible I/O, so focuses on CPU performance
n Normalize relative to reference machine
n Summarize as geometric mean of performance ratios
n CINT2006 (integer) and CFP2006 (floating-point)

n
n
Õ Execution time ratio
i=1
i

Lecture 2 — Computer Abstractions and Technology — 16

CINT2006 for Opteron X4 2356
Name Description IC×109 CPI Tc (ns) Exec time Ref time SPECratio
perl Interpreted string processing 2,118 0.75 0.40 637 9,777 15.3
bzip2 Block-sorting compression 2,389 0.85 0.40 817 9,650 11.8
gcc GNU C Compiler 1,050 1.72 0.40 24 8,050 11.1
mcf Combinatorial optimization 336 10.00 0.40 1,345 9,120 6.8
go Go game (AI) 1,658 1.09 0.40 721 10,490 14.6
hmmer Search gene sequence 2,783 0.80 0.40 890 9,330 10.5
sjeng Chess game (AI) 2,176 0.96 0.40 37 12,100 14.5
libquantum Quantum computer simulation 1,623 1.61 0.40 1,047 20,720 19.8
h264avc Video compression 3,102 0.80 0.40 993 22,130 22.3
omnetpp Discrete event simulation 587 2.94 0.40 690 6,250 9.1
astar Games/path finding 1,082 1.79 0.40 773 7,020 9.1
xalancbmk XML parsing 1,058 2.70 0.40 1,143 6,900 6.0
Geometric mean 11.7

High cache miss rates

Lecture 2 — Computer Abstractions and Technology — 17

SPEC Power Benchmark
n Power consumption of server at different
workload levels
n Performance: ssj_ops/sec
n Power: Watts (Joules/sec)

æ 10 ö æ 10 ö
Overall ssj_ops per Watt = ç å ssj_ops i ÷ ç å poweri ÷
è i=0 ø è i=0 ø

Lecture 2 — Computer Abstractions and Technology — 18

SPECpower_ssj2008 for X4
Target Load % Performance (ssj_ops/sec) Average Power (Watts)
100% 231,867 295
90% 211,282 286
80% 185,803 275
70% 163,427 265
60% 140,160 256
50% 118,324 246
40% 920,35 233
30% 70,500 222
20% 47,126 206
10% 23,066 180
0% 0 141
Overall sum 1,283,590 2,605
∑ssj_ops/ ∑power 493

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 §1.8 Fallacies and Pitfalls
Pitfall: Amdahl’s Law
n Improving an aspect of a computer and
expecting a proportional improvement in
overall performance
Taffected
Timproved = + Tunaffected
improvemen t factor
n Example: multiply accounts for 80s/100s
n How much improvement in multiply performance to
get 5× overall?
80 n Can’t be done!
20 = + 20
n
n Corollary: make the common case fast
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Fallacy: Low Power at Idle
n Look back at X4 power benchmark
n At 100% load: 295W
n At 50% load: 246W (83%)
n At 10% load: 180W (61%)
n Google data center
n Mostly operates at 10% – 50% load
n At 100% load less than 1% of the time
n Consider designing processors to make
power proportional to load

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Pitfall: MIPS as a Performance Metric
n MIPS: Millions of Instructions Per Second
n Doesn’t account for
n Differences in ISAs between computers
n Differences in complexity between instructions

Instruction count
MIPS =
Execution time ´ 10 6
Instruction count Clock rate
= =
Instruction count ´ CPI CPI ´ 10 6
´ 10 6

Clock rate
n CPI varies between programs on a given CPU
Lecture 2 — Computer Abstractions and Technology — 22
 §1.9 Concluding Remarks
Concluding Remarks
n Cost/performance is improving
n Due to underlying technology development
n Hierarchical layers of abstraction
n In both hardware and software
n Instruction set architecture
n The hardware/software interface
n Execution time: the best performance
measure
n Power is a limiting factor
n Use parallelism to improve performance
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