School of Natural Resources Engineering & Management
Department Of Energy Engineering
Electrical Circuits Lab (ENE 213)
Experiment 03
3. Kirchhoff`s Laws
3.1 Objectives
To verify KVL and KCL experimentally and by simulation using LT Spice software.
3.2 Introduction and theory
Kirchhoff voltage law (KVL) states that the algebraic sum of the voltages ‘potential differences’
around any closed path is zero.
Looking to the circuit shown in Fig 3.1, applying KVL across the closed loop, moving mentally
around the closed path in a clockwise direction and writing down directly the voltage of each
element whose (+) terminal is entered, and writing down the negative of every voltage first met at
the (−) sign. 𝑣1 − 𝑣2 + 𝑣3 = 0
Figure 3.1: The sum of potential differences across closed path is zero
It follows that if we trace out a closed path, the algebraic sum of the voltages across the individual
elements around it must be zero. Thus, we may write:
𝑣1 + 𝑣2 + ⋯ + 𝑣𝑛 = 0
Or more compactly,
𝑛
∑ 𝑣𝑖 = 0
𝑖=1
Kirchhoff current law (KCL) states that the algebraic sum of the currents entering any node is zero.
Looking to Fig 3.2, Applying KCL to the node shown, we may write:
𝑖𝐴 + 𝑖𝐵 + (−𝑖𝐶 ) + (−𝑖𝐷 ) = 0
1
School of Natural Resources Engineering & Management
Department Of Energy Engineering
Electrical Circuits Lab (ENE 213)
Figure 3.2: The algebraic sum of the currents entering single node
The current entering the node takes a positive sign, while the current leaving the node takes a
negative sign. A compact form for KCL:
𝑛
∑ 𝑖𝑘 = 0
𝑘=1
3.3 Procedures
Part 1
1- Connect the circuit in Figure 3.3 on your bread board. Make sure you record the measured
values of the used resistors. Use the measured values in your calculations.
Figure 3.3: Circuit for part 1.
2- Verify the connection with your instructor, and then connect the voltage supplies. Notice
that you need to connect the two channels from the power supply.
3- Measure the voltages across, and currents through the resistors. Fill in Table 3.1 the
resulted measurements,
4- Simulate the circuit using LT spice and compare the simulation results with the experimental
results.
5- Apply KVL and KCL to this circuit and use the measured Voltages and currents to verify
the laws.
2
School of Natural Resources Engineering & Management
Department Of Energy Engineering
Electrical Circuits Lab (ENE 213)
Table 3.1: Practical results for part 1
V1 V2 V3 V4
I1 I2 I3 I4
Part 2
1- Connect the circuit in Figure 3.4 on your bread board.
2- Repeat the steps from 2 to 5 in part 1. Fill your measurements in table 2.2.
3- Can you simplify the circuit? Redraw it in your report
Figure 3.4: Circuit for part 2.
Table 3.2: Practical results for part 2
Vs V1 V2 V3 V4 V5
Is I1 I2 I3 I4 I5
