AVR ARCHITECTURE AND ASSEMBLY
PROGRAMMING
AVR ARCHITECTURE AND ASSEMBLY PROGRAMMING
objectives
▪ Examine how the registers used in AVR microcontrollers.
▪ Demonstrate how assembly language programming is done
on AVR
▪ Establish the relationships between the status register,
programme counter and general purpose registers
▪ Examine the linkage between AVR data memory and code
memory
AVR ARCHITECTURE AND ASSEMBLY PROGRAMMING
Introduction
▪ To programme in assembly language one must understand
the registers and architecture of a given CPU and the role
they play in processing data
▪ Registers are used to store information temporarily i.e.
▪ A byte of data to processed
▪ Address pointing to data to be fetched
▪ Majority of registers in AVR are 8 bits
AVR ARCHITECTURE AND ASSEMBLY PROGRAMMING
Introduction
▪ In AVR there are 32 general purpose registers R0-R31 and
located at the lowest location of memory address
▪ They can be used for arithmetic and
▪ Logic instructions
AVR ARCHITECTURE AND ASSEMBLY PROGRAMMING
AVR Data Memory
▪ There are two kinds of memory space in AVR microcontroller
▪ Code memory
▪ Data memory
▪ Programmes are stored in code memory and data in data
memory
AVR ARCHITECTURE AND ASSEMBLY PROGRAMMING
AVR Data Memory
▪ Data memory is
composed of three
parts:
▪ GPR (General
purpose Registers)
▪ I/O memory and
▪ Internal data SRAM
AVR ARCHITECTURE AND ASSEMBLY PROGRAMMING
GPR (General purpose register)
▪ The GPRs use 32 bytes of data memory space. Why?
▪ The address locations range is $00-$1F regardless of the
AVR chip
AVR ARCHITECTURE AND ASSEMBLY PROGRAMMING
I/O Memory (SFRs)
▪ I/O memory is dedicated to specific functions such as status
register, timers, Analog- to – digital converters, I/O ports,
serial communication etc. with registers 8 bits in size
▪ The function of each I/O memory location is fixed at design
time as it is used for control of microcontroller peripheral
▪ The number of locations in the data memory set aside for I/O
memory depends on pin numbers and peripheral functions
supported by the chip
AVR ARCHITECTURE AND ASSEMBLY PROGRAMMING
I/O Memory (SFRs)
▪ All AVRs have at least 64bytes of I/O memory locations which
is called standard I/O memory
▪ In some AVR with more than 32 pins, there is also some
extended I/O memory containing registers for controlling the
extra ports and extra peripheral.
▪ I/O registers are called SFRs ( special function registers)
since each one is dedicated to specific function.
AVR ARCHITECTURE AND ASSEMBLY PROGRAMMING
I/O Memory (SFRs)
AVR ARCHITECTURE AND ASSEMBLY PROGRAMMING
Internal Data SRAM (Scratch pad)
▪ Internal data SRAM is widely used for storing data and
parameters by AVR programmers and C compilers
▪ Each location of the SRAM can be accessed directly by its
address
▪ Each location is 8 bits and can be used to store any data we
want
▪ Size of the SRAM can vary from chip to chip
AVR ARCHITECTURE AND ASSEMBLY PROGRAMMING
Internal Data SRAM (Scratch pad)
NOTE
▪ Each location in the data memory has a unique address
called data memory and each I/O register has a relative
address in comparison to the I/O memory called I/O address
AVR ARCHITECTURE AND ASSEMBLY PROGRAMMING
AVR ARCHITECTURE AND ASSEMBLY PROGRAMMING
The status Register
▪ The AVR has an 8 bit register called status register which
indicate some conditions called conditional flags that result
when an instruction is executed.
▪ The conditional flags can be used to perform conditional
branch as will be shown later in our study
AVR ARCHITECTURE AND ASSEMBLY PROGRAMMING
The status Register
▪ C, the Carry flag: This flag is set whenever there is a carry
out from the D7 bit and is affected after an 8 – bit addition or
subtraction.
▪ Z, the Zero flag: the zero flag reflects the result of an
arithmetic or logic operation. If the result is zero, then Z= 1
and Z= 0 if the result is not zero.
AVR ARCHITECTURE AND ASSEMBLY PROGRAMMING
The status Register
▪ N, the Negative flag: Binary representation of signed
numbers uses D7 as sign bit.
▪ The negative flag reflects the result of an arithmetic
operation.
▪ If the D7 bit of the result is zero, then N=0 and the result is
positive.
▪ If D7 bit is one, then N = 1and the result negative. The
negative and V flag bits are used for the signed number
AVR ARCHITECTURE AND ASSEMBLY PROGRAMMING
The status Register
▪ V, the Overflow flag: This flag is set whenever the result of a
signed number is too large, causing the high order bit to
overflow into the sign bit.
▪ In general, the carry flag is used to detect errors in unsigned
arithmetic operations while the overflow flag is used to detect
errors in signed arithmetic operations.
▪ The V and N flags bits are used for signed number arithmetic
operations,
AVR ARCHITECTURE AND ASSEMBLY PROGRAMMING
The status Register
▪ S, the Sign flag: This flag is the result of Exclusive –Oring of
N and V flags.
AVR ARCHITECTURE AND ASSEMBLY PROGRAMMING
The status Register
▪ H, the Half carry flag: If there is a carry from D3 and D4
during and ADD or SUB operation, this bit is set otherwise it
is cleared. This flag is used by instructions that perform BCD
(binary coded decimal arithmetic.
▪ T, the Bit Copy storage (Temporary) flag: It is used when
one wishes to copy a bit of data from one General purpose
register to another.
▪ I, the Global Interrupt Enable flag: Is responsible for
enabling and disabling the interrupts globally.
AVR ARCHITECTURE AND ASSEMBLY PROGRAMMING
Internal SRAM Vs EEPROM
▪ The EEPROM in AVR is used for storing data that should
rarely be changed and should not be lost when power is off.
▪ Internal data SRAM on the other hand is used for storing data
and parameter that are frequently changed.
AVR ARCHITECTURE AND ASSEMBLY PROGRAMMING
Code Memory and Programme Counter
▪ The code memory space is made up of the program counter
(PC) and the program ROM space (Program memory).
▪ Programme Counter is used by the CPU to point to the
address of the next instruction to be executed.
▪ Its is the most important register in AVR microcontroller
AVR ARCHITECTURE AND ASSEMBLY PROGRAMMING
Code Memory and Programme Counter
▪ The purpose of the program counter is to hold/store the
address of the next instruction to be executed by the
microcontroller's microprocessor.
▪ The size (width) of the program counter of a microcontroller is
measured in bits and is directly related to the size of the
microcontroller's program memory.
▪ The wider the PC, the more memory locations a CPU can
access.
AVR ARCHITECTURE AND ASSEMBLY PROGRAMMING
Code Memory and Programme Counter
▪ Instructions are stored in the program memory of a
microcontroller and thus the PC width is directly related to the
size of the microcontroller program memory.
▪ The size or width of the program counter (PC) is basically the
smallest possibly number of bits necessary to address the
microcontroller program memory based on its organisation.
If N is the width of the PC, then N would be related to the size
of the program memory by the following equation:
AVR ARCHITECTURE AND ASSEMBLY PROGRAMMING
Code Memory and Programme Counter
2N = Size of program memory
log (Size of program memory)
N =
log (2)
AVR ARCHITECTURE AND ASSEMBLY PROGRAMMING
Using Instructions with Data Memory
▪ AVR allows direct access to other locations in the data
memory. The instruction is LDS
▪ LDS (LoaD direct from data space)
LDS Rd, K ; load Rd with contents of location K
; K is the address between $0000-$FFFF
▪ The LDS instruction tells the CPU to load (copy) one byte
from an address in the data memory to the GPR
AVR ARCHITECTURE AND ASSEMBLY PROGRAMMING
Using Instructions with Data Memory
▪ The GPR will have the same value as the location in the data
memory if LDS is executed.
▪ Data can be in GPR, internal data SRAM or I/O memory
AVR ARCHITECTURE AND ASSEMBLY PROGRAMMING
Using Instructions with Data Memory
▪ STS (STore direct from data Space)
STS K, Rr ; Store register content into location K
; K is the address between $0000-$FFFF
▪ The STS instruction tells the CPU to store (copy) the
contents of the GPR to an address location in the data
memory space.
AVR ARCHITECTURE AND ASSEMBLY PROGRAMMING
Using Instructions with Data Memory
NOTE
▪ One cannot copy (store) an immediate value directly into the
SRAM location in the AVR. It can only be done via GPRs
AVR ARCHITECTURE AND ASSEMBLY PROGRAMMING
Using Instructions with Data Memory
▪ IN instruction (IN from I/O location)
IN Rd, A ; load an I/O location to GPR
; (d is between 0-31 and A is between 0-63)
▪ IN instruction tells the CPU to load one byte from an I/O
register to GPR.
▪ When instruction is executed, the GPR will have the same
value as the I/O register.
AVR ARCHITECTURE AND ASSEMBLY PROGRAMMING
Using Instructions with Data Memory
▪ OUT instruction (OUT to I/O location)
OUT A, Rr ; Store register to I/O location to GPR
; (r is between 0-31 and A is between 0-63)
▪ The out instruction tells the CPU to store the GPR to the I/O
register and after its execution, the I/O register will have the
same value as the GPR
▪ Don’t copy an immediate value to an I/O register nor to an
SRAM location
IN R0, PINC
OUT PORTA, RO
AVR ARCHITECTURE AND ASSEMBLY PROGRAMMING
Using Instructions with Data Memory
▪ MOV instruction (OUT to I/O location)
MOV Rd, Rr ; Copy from Rr to Rd
; Rd and Rr can be any GPR
▪ This instruction is used to copy data memory among GPR
register of R0-R31
