Madan Mohan Malaviya Univ.
of Technology, Gorakhpur
VLSI Design (BEC-401)
Department of Electronics and Communication Engineering
Tuesday, July 22, 2025 Prof. R.K. Chauhan Side 1
Madan Mohan Malaviya Univ. of Technology, Gorakhpur
Course category: Program Core (PC)
Number of Credits: 5
Course Assessment methods : Continuous assessment through tutorials, attendance, assignments,
quizzes, practical work, record, viva voce, minor and major theory &
practical Examination.
Course Objective
• The objective of this course is to impart the knowledge on fundamentals of CMOS VLSI,
associated technologies, their circuit level models with principles of operation, design
of the fundamental
Tuesday, July 22, 2025 Prof. R.K. Chauhan Side 2
Madan Mohan Malaviya Univ. of Technology, Gorakhpur
Course Outcome
➢ Able to understand the fundamentals of CMOS VLSI and associated technologies
➢ Able to solve problems in the design of CMOS logic circuits, with particular reference to
speed and power consumption
➢ Able to acquire hands-on skills of using CAD tools in VLSI design
➢ Able to appreciate the design process in VLSI through a mini-project on the design of a
CMOS sub-system
➢ Able to explain basic operation principles of diodes and MOS transistors and their circuits
level models
➢ Able to design the fundamental blocks of a VLSI circuits, both by circuit schematic and
physical layout with performance
Tuesday, July 22, 2025 Prof. R.K. Chauhan Side 3
Madan Mohan Malaviya Univ. of Technology, Gorakhpur
Course Content
Unit-1:
Introduction: Trends & Projections in VLSI Circuits, Flow diagram of VLSI Circuit Design, VLSI Design issues, Y-
Chart, VLSI Design Styles, Full Custom and Semi Custom VLSI Design Electrical characterization of MOS
transistor: Energy-band explanation for MOS structure, MOS Capacitors, C-V characteristics of MOS Capacitor,
Long Channel and Short Channel MOSFETs, Short-Channel effects, SPICE parameters of MOS transistor
Unit-2:
MOS Inverter Design: NMOS and CMOS inverter design, noise margin, VTC curve, Calculation of delay time,
switching power dissipation in CMOS inverters, scaling in CMOS circuits, technology scaling and its impact
on the inverter metrics, Super Buffer Design
Unit-3:
Stick Diagrams: Physical Design Rules; Layout Designing; Euler’s Rule for VLSI Physical Design, MOS logic
circuits with depletion nMOS loads, CMOS logic circuits, complex logic circuits, Complementary CMOS,
Ratioed Logic, CMOS Pass-Transistor Logic
Unit-4:
Dynamic CMOS circuits: Basic Principles of pass transistor and transmission gate, CMOS Transmission-Gate
and Pass-transistor logic circuits, Domino CMOS Logic, NORA CMOS Logic,Zipper CMOS circuits, Basic Bi-
CMOS behaviour
Tuesday, July 22, 2025 Prof. R.K. Chauhan Side 4
Madan Mohan Malaviya Univ. of Technology, Gorakhpur
Books/References
➢ S.M. Kang & Y. Leblibici, “CMOS Digital Integrated Circuits-Analysis & Design”, TMH, 2nd
Ed. 2003.
➢ B.G. Streetman & S. Banerjee, “Solid State Electronic Devices”, Pearson Education.
➢ Neil H. Weste& David Harris, “CMOS VLSI Design: A Circuit and Systems Perspective”,
PHI.
➢ J.M. Rabaey, A. Chandrakasan& B. Nikolic “Digital Integrated Circuits-A Design
Perspective”, Pearson.
➢ Doughlas Pucknell& Kamran Eshragian, “Basic VLSI Design”, PHI.
➢ Some Research Papers and ITRS Roadmap
Tuesday, July 22, 2025 Prof. R.K. Chauhan Side 5
