Chapter 3 -Revision

Von Neumann
Architecture
1 Paige has a computer that has a central processing unit (CPU) based on the Von Neumann model
for a computer system.

(a) Identify the component within the CPU that controls the flow of data.

............................................................................................................................................. [1]

(b) Identify the component within the CPU where calculations are carried out.

............................................................................................................................................. [1]

(c) Identify the component within the CPU that stores the address of the next instruction to be
processed.

............................................................................................................................................. [1]

(d) Identify the register within the CPU that holds an instruction that has been fetched from
memory.

............................................................................................................................................. [1]

(e) Identify the register within the CPU that holds data that has been fetched from memory.

............................................................................................................................................. [1]

2 The Von Neumann model for a computer system has several components that are used in the
fetch-execute cycle.

(a) One component is main memory.

(i) Describe what is meant by main memory and how it is used in the Von Neumann model
for a computer system.

...........................................................................................................................................

...........................................................................................................................................

...........................................................................................................................................

...........................................................................................................................................

...........................................................................................................................................

..................................................................................................................................... [3]

(ii) State two other components in the Von Neumann model for a computer system.

1 ........................................................................................................................................

2 ........................................................................................................................................
[2]

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 (b) Computer systems often use interrupts.

Five statements are given about interrupts.

Tick (3) to show if each statement is True or False.

True False
Statement
(3) (3)
Interrupts can be hardware based or software based
Interrupts are handled by the operating system
Interrupts allow a computer to multitask
Interrupts work out which program to give priority to
Interrupts are vital to a computer and it cannot function without them
[5]

3 The Von Neumann model for a computer system uses several components in the fetch-execute
cycle. One component that is used is the Control Unit (CU).

Identify four other components that are used in the Von Neumann model for a computer system.

1 .......................................................................................................................................................

2 .......................................................................................................................................................

3 .......................................................................................................................................................

4 .......................................................................................................................................................

[4]

4 To process an instruction, a central processing unit (CPU) goes through a cycle that has three
main stages.

Name each stage in this cycle.

Stage 1 ................................................................................

Stage 2 ................................................................................

Stage 3 ................................................................................
[3]
5 Name three different buses that are used in the fetch-execute cycle.

Bus 1 ................................................................................................................................................

Bus 2 ................................................................................................................................................

Bus 3 ................................................................................................................................................
[3]

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6 A Von Neumann model for a computer system has a central processing unit (CPU) that makes
use of registers.

(a) Identify three registers that may be used.

Register 1 .................................................................................................................................

Register 2 .................................................................................................................................

Register 3 .................................................................................................................................
[3]

(b) The CPU is responsible for processing instructions.

One stage of processing instructions is the decode stage.

(i) Identify the two other stages of processing instructions.

Stage 1 ..............................................................................................................................

Stage 2 ..............................................................................................................................
[2]

(ii) Identify the component of the CPU that is responsible for decoding instructions.

..................................................................................................................................... [1]

7 Vanessa writes a paragraph as an answer to an examination question about the central processing
unit (CPU).

Use the list given to complete Vanessa’s answer by inserting the correct six missing terms.
Not all terms will be used.

• Components
• Data
• Decoded
• Executed
• Fetched
• Instructions
• RAM
• ROM
• Secondary storage

The CPU processes ........................................................ and ........................................................ .

An instruction is ........................................................ from ........................................................

into the CPU where it is then ........................................................ . Once this has taken place the

instruction is then ........................................................ .

[6]

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8 Kelvin correctly answers an examination question about the Von Neumann model.

Eight different terms have been removed from his answer.

Complete the sentences in Kelvin’s answer, using the list given.

Not all items in the list need to be used.

• accumulator (ACC)
• address bus
• arithmetic logic unit (ALU)
• control unit (CU)
• data bus
• executed
• fetches
• immediate access store (IAS)
• memory address register (MAR)
• memory data register (MDR)
• program counter (PC)
• saved
• transmits

The central processing unit (CPU) ....................................................................................

the data and instructions needed and stores them in the

.................................................................................... to wait to be processed.

The .................................................................................... holds the address of the next

instruction. This address is sent to the .................................................................................... .

The data from this address is sent to the .................................................................................... .

The instruction can then be decoded and .................................................................................... .

Any calculations that are carried out on the data are done by the

.................................................................................... . During calculations, the data is temporarily

held in a register called the .................................................................................... .

[8]

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 9 Six components of the Von Neumann model for a computer system and six descriptions are given.

Draw a line to match each component to the most suitable description.

Component Description

Immediate Holds data and instructions when they are

access store loaded from main memory and are waiting
(IAS) to be processed.

Holds data temporarily that is currently

Register
being used in a calculation.

Control unit Holds data or instructions temporarily

(CU) when they are being processed.

Accumulator Manages the flow of data and interaction

(ACC) between the components of the processor.

Arithmetic logic
Carries out the calculations on data.
unit (ALU)

Pathway for transmitting data and

Bus
instructions.
[5]

10 Signals are sent to and from the components of a processor using buses.

Identify and describe the purpose of two different buses.

Bus 1 ....................................................................

Purpose ............................................................................................................................................

..........................................................................................................................................................

..........................................................................................................................................................

..........................................................................................................................................................

Bus 2 ....................................................................

Purpose ............................................................................................................................................

..........................................................................................................................................................

..........................................................................................................................................................

..........................................................................................................................................................

[6]
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11 (a) One of the key features of von Neumann computer architecture is the use of buses.

Three buses and three descriptions are shown below.

Draw a line to connect each bus to its correct description.

Bus Description

this bus carries signals used

address bus to coordinate the computer’s
activities

this bi-directional bus is used

to exchange data between
control bus
processor, memory and input/
output devices

this uni-directional bus carries

signals relating to memory
data bus
addresses between processor
and memory
[2]

(b) The seven stages in a von Neumann fetch-execute cycle are shown in the table below.

Put each stage in the correct sequence by writing the numbers 1 to 7 in the right hand column.
The first one has been done for you.

Sequence
Stage
number
the instruction is then copied from the memory location contained
in the MAR (memory address register) and is placed in the MDR
(memory data register)

the instruction is finally decoded and is then executed

the PC (program counter) contains the address of the next instruction

to be fetched 1
the entire instruction is then copied from the MDR (memory data
register) and placed in the CIR (current instruction register)

the address contained in the PC (program counter) is copied to the

MAR (memory address register) via the address bus

the address part of the instruction, if any, is placed in the MAR

(memory address register)

the value in the PC (program counter) is then incremented so that it

points to the next instruction to be fetched

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[6]
 12 A section of computer memory is shown below:

Address Contents
1000 0000 0110 1110
1000 0001 0101 0001
1000 0010 1000 1101
1000 0011 1000 1100

1000 1100
1000 1101
1000 1110
1000 1111

(a) (i) The contents of memory location 1000 0001 are to be read.

Show the contents of the Memory Address Register (MAR) and the Memory Data
Register (MDR) during this read operation:

MAR

MDR

[2]

(ii) The value 0111 1001 is to be written into memory location 1000 1110.

Show the contents of the MAR and MDR during this write operation:

MAR

MDR

[2]

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 (iii) Show any changes to the computer memory following the read and write operations in
part (a)(i) and part (a)(ii).

Address Contents
1000 0000 0110 1110
1000 0001 0101 0001
1000 0010 1000 1101
1000 0011 1000 1100

1000 1100
1000 1101
1000 1110
1000 1111
[1]

(b) Name three other registers used in computers.

1 ................................................................................................................................................

2 ................................................................................................................................................

3 ................................................................................................................................................
[3]

(c) The control unit is part of a computer system.

What is the function of the control unit?

...................................................................................................................................................

...................................................................................................................................................

...................................................................................................................................................

...................................................................................................................................................

...................................................................................................................................................

.............................................................................................................................................. [3]

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