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Microprocessor-Short Notes

The document provides an overview of microprocessors, specifically detailing the functions of the CPU, the architecture of the 8085 microprocessor, and its various components such as the ALU, registers, and interrupt system. It explains the role of buses, control signals, and the significance of different types of interrupts. Additionally, it covers the features of the 8085 microprocessor, including its pin configuration, memory addressing, and flag registers.
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0% found this document useful (0 votes)
5 views6 pages

Microprocessor-Short Notes

The document provides an overview of microprocessors, specifically detailing the functions of the CPU, the architecture of the 8085 microprocessor, and its various components such as the ALU, registers, and interrupt system. It explains the role of buses, control signals, and the significance of different types of interrupts. Additionally, it covers the features of the 8085 microprocessor, including its pin configuration, memory addressing, and flag registers.
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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XIICS-P-II- Ch -1-microprocessor Jyoti Chandnani

A Microprocessor is a multipurpose, programmable logic device that reads binary instructions from a storage device
called memory, accepts binary data as input and processes data according to those instructions, and provides results
as output.

Primary Functions of the CPU or Microcomputer Or Functions of Microprocessor :


1. To fetch, decode and execute program Instructions in the proper order.
2. Transfer data to and from memory and to and from input output section.
3. Responds to external interrupts.
4. Provide overall timing and control signals for the entire system.
5. Read/Write of data into memory, So bidirectional bus is required.
6. All processing and data flow is done in the system which MPU chip.

Block Diagram of ALU

1. ALU is 8-bit unit.


2. It performs arithmetic, logic and rotate operations.
3. Binary adder to perform addition and Subtraction by two’s complement method.
4. The result is typically stored in accumulator.
5. Accumulator, temporary register, flag register is closely associated with ALU.
6. The temporary register is used to hold data during arithmetic/logic operations.
7. Flags are set or reset according to the result of operations in Status register.
8. Shifter performs logical operations like rotate left, rotate right, etc. Result is placed in accumulator.
9. Status registers are set or reset according to ALU operation.

Block Diagram of Generic Microprocessor

Address Bus : group of 16 lines generally identified as A0to A15., carry 16 bit address.,Unidirectional. i.e. bits flow in
one direction – from MPU to peripheral devices and memory,memory location is identified by a number called as
address.,With 16 address lines 216 = 65536 locations can be addressed from 0000H to FFFFH.

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XIICS-P-II- Ch -1-microprocessor Jyoti Chandnani
Data Bus :group of 8 lines generally identified as D0 to D7.,carry 8 bit data.,bidirectional. i.e data flow in both the
directions between MPU and memory and peripheral devices.

The Data address register : two 8 bit registers that can be used separately or as a combined pair,labelled as H and
L,,general purpose registers, Data can be stored in these registers. When they are used in pair, 16 bit addresses can
also be stored in these registers.
Instruction Register: 8 bit register,The first byte (i.e. 8 bits ,opcode) of an instruction is stored,Eg. MOV A,B,

Instruction Decoder:interprets the contents of instruction register., determines the exact steps to be followed in
executing the entire instruction and directs the control section accordingly.

Arithmetic and Logic Unit: arithmetic operations such as addition, subtraction, increment, decrement and logic
operations such as AND,OR,EX-Or ,Complement etc.,also performs rotate operations such as rotate right , rotate left
etc.,The operations in this unit affect the status register. The results from ALU are placed in accumulator.

Accumulator :8 bit register.,Many time it is treated as a part of ALU.,used to store 8-bit data in arithmetic and logic
operations, the result is stored in accumulator.

Stack pointer :16 bit register,It consists of first/top address of memory location called stack.,Stack is a set of memory
locations R/W memory specified by programmer, used for temporary storage.

Timing and control: This section receives signals from the instruction decoder to determine the nature of instruction
to be executed., Information from status register is also available for conditional branching., Timing and control signals
are sent to all parts of the microprocessor to coordinate execution of instructions.

Control Inputs : RESET and interrupt request(INTR) are control inputs for generic microprocessors.
1. RESET : When reset is activated, all internal operations are suspended and the program counter is cleared.
(i.e. it holds 000H). Now the program execution can begin at 0 memory address.

2. INTR : By activating INTR, the microprocessor can be interrupted from the normal execution of instructions
and asked to executed some other instructions. The microprocessor resumes is operations after completion of other
instructions, called service routine.

3. X1 and X2 : The control outputs are write, read and clock lines. An external crystal is connected between X1
and X2.The clock circuit generates clock signal for internal use. This signal is also made available at output on clock
line. This is used to synchronize actions in the entire system.

Read : The control signal Read enables the input buffer and data are read from memory or I/O location. Data are
available on data bus.

Write : The control signal Write enables the output buffer and data on data bus are written to memory or I/O location.
RD and WR are active low control signals.

Bus Buffers and Latches


A latch is a flip flop, It is used to store one bit of information.
To Avoid unintentional change in the input and control the availability of output, we can use tri state buffers along
with latches. We can write into latch by enabling buffer.

Control Bus : Carries control signals from MPU to other components.

Features of 8085 Mircoprocessor

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XIICS-P-II- Ch -1-microprocessor Jyoti Chandnani
1. It is designed by Intel in 1976.,The Intel 8085 is an 8 bit general purpose microprocessor.,It has 8 bit data
bus.,This microprocessor is capable of addressing 64 kilobyte of memory.,It has 16 bit address bus. ,This device has
40pins dual in line package (DIP),Requires +5V single power supply. ,It can operate with 3 MHz, single phase
clock.,8085 uses approximately 65,000 transistors. ,It is upward compatible with 8080. Programs written for 8080 can
be executed in 8085.

Pin diagram of 8085

Address Bus : Is a group of 8 signal lines.


It is unidirectional. It is used as high order address bus.

Multiplexed Address/Data Bus : It is a group of 8 signal lines(AD7-AD0). It is Bidirectional. They are used as lower
order address bus as well as the data bus. i.e. they are used for dual purpose.
While executing an instruction, during earlier part of the cycle these lines are used as the low-order address but
During later part of the cycle, these lines are used as data bus. This is known as multiplexing the bus.

The 8085 has a special signal called ALE (address latch enable) for informing the peripheral when the address data bus
is sending an address, and when it is functioning as a data bus.

Advantages Multiplexed Address/Data Bus


Multiplexing address and data bus is used to reduce the number of pins for address and data while also dedicating
those pins to other microprocessor functions. These multiplexed lines were used to transport the lower-order 8 bit
address as well as the data bus.

Control and Status signals :


This group of signals includes two controls RD and WR, three status signals IO/M, S0 and S1 and one special signale
ALE( address latch enable).

ALE(address latch enable) : This is the Address Latch in Enable. This is a positive going pulse generated every time the
8085 begins an operation. (Machine cycle). This indicates that the bit on AD 7-AD0 are addresse bits.

RD: This is Read Control Signal. This is active low signal. This signal indicates that selected I/O or memory device is to
be read and data are available on data bus.

WR: This is Write Control Signal. This is active low Signal. This signal indicates that the data on data bus are to be
written into selected memory or I/O locations.

IO/M : This is a status signal used to differentiate between I/O and memory operation. When it is low, it indicates a
memory operation.

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XIICS-P-II- Ch -1-microprocessor Jyoti Chandnani
Memory mapped I/O I/O mapped I/O
I/O is assigned to the separate address space of I/O is assigned with same address of memory.
memory.
Separate control signal is not required. It is required like IO/M.
Memory space is reduced due to insertion of I/O Full memory space can be used.
address.
It requires 16-bit address bus It uses 8-bit address bus only.

S0 and S1 : These are status signals. They can identify various operations.

Power Supply and Clock frequency :


1. VCC : +5V power supply. Positive terminal of power supply is connected to VCC.
2. Ground Reference. Negative terminal of power supply is connected at VSS

X1 and X2 : A crysta haing frequency 6MHz is connected at these two pins. The frequency is internally divided by two.
The system operate at 3MHz.

CLK(out)
This is clock ouput. This signal can be used as the system clock for other devices. This is used to synchronize actions in
the entire system.

Serial I/O Ports : The 8085 has two pins to implement serial transmission, SID(Serial input data) and SOD (serial output
data).

SID : A single bit can be serially inputted through SID. The input pin SID is set or reset as per 8085 RIM instruction. The
8085 RIM instruction transfer data from SID to bit 7 of accumulator.

SOD : A single bit can be serially outputted through SOD. The output pin SOD is set of reset as per 8085 SIM
instruction . The 8085 SIM instruction transfer
bit 7 of accumulator via SOD and so on.

Externally Initiated Signals


In addition to the interrupts, three pins- RESET, HOLD and READY accept the externally initiated signals as inputs.

READY : If the signal at READY pin is low, the microprocessor enters into a wait state.
This signal is used primarily to synchronize slower peripherals with the microprocessor

HOLD : When HOLD pin is activated by an external signal, the microprocessor releases control of buses and allows the
external peripherals to use them.
For eg: HOLD signal is used in Direct Memory Access (DMA) data transfer.

HLDA : This is Hold acknowledgement. Microprocessor acknowledges the hold request by HLDA

RESET IN : When the signal on this pin goes low, the program counter is set to zero, the buses are tristated and MPU is
reset

RESET OUT : This signal indicates that the MPU is being reset. The signal can be used to reset other devices.

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XIICS-P-II- Ch -1-microprocessor Jyoti Chandnani
Interrupts in 8085
Interrupts are the signals generated by external devices to request the microprocessor to perform a task.
There are 5 interrupt signals in 8085:
TRAP, RST 7.5, RST 6.5, RST 5.5, INTR
Highpriority……………………………………………….. Lowest priority

Classification of Interrupts
1. Software , Hardware
2. Maskable and Non maskable
3. Vectored and Non-vector
ISR(Interrupt service routine)
ISR is a program or routine that is needed to be executed in order to handle or proess an interrupt. So it executes the
services of the corresponding interrupting source.

Software Interrupt: In this , the programmer has to add the instruction to the program to execute the interrupt so
they are the mnemonics to the microprocessor. It is caused either by a special instruction in the instruction set or by
an exceptional condition in the professor itself.
Eg: RST 0 – 7

Hardware interrupts: These interrupts signals are received by the microprocessor through its pins, so they are
generated externally.
Eg : INTR. RST 7.5, RST 6.5, RST 5.5 TRAP

Vectored Interrupts: These interrupts have fixed vector address i.e. the starting address of the subroutine and these
interrupts addresses are known to the microprocessor. After execution of the interrupts, the program control is
transferred to that address.
Eg: TRAP, RST 5.5, RST 6.5 RST 7.5

Non-Vectored Interrupts: The interrupt address is not known to the microprocessor so the interrupt address needs to
be sent externally
Eg: INTR

Maskable Interrupt: These interrupts can be disabled by the microprocessor by writing some instruction into the
program.
Eg : RST 7.5, RST 6.5, RST 5.5

Non Maskable Interrupt: It is not possible to disable the interrupt by writing any instruction into the program eg :
TRAP

Interrupts

1. TRAP : It is non maskable, restart interrupt and has the highest priority among all 8085 interrupts. TRAP is
edge and level triggered i.e. the TRAP must go high and remains high unitill it is acknowledged. In sudden power
failure, it executes a ISR and send the data from main memory to backup memory. It transfers the control to 0024H.
2. RST 7.5 : It is a maskable interrupt, having the second highest priority among all interrupts. When this
interrupt is executed, the processor saves the content of the PC register into the stack and branches to 003CH
address. It is edge triggered.
3. RST 6.5 : It is a maskable interrupt, having the third highest priority among all interrupts. When this interrupt
is executed, the processor saves the content of the PC register into the stack and branches to 0034H address.
4. RST 5.5 : It is a maskable interrupt. When this interrupt is executed, the processor saves the content of the PC
register into the stack and branches to 002CH address.
5. INTA: Interrupt acknowledges.

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XIICS-P-II- Ch -1-microprocessor Jyoti Chandnani

Register Array: 8085 Processor uses both 8 bit and 16 bit register.
The 8085 has eight addressable 8-bit registers.
6 of these can be used as 8-bit registers, or 16-bit register pairs.
In addition, the 8085 contains two more 16-bit registers.
• The registers BC, DE and HL are general purpose registers.
• They can be used as six 8-bit registers, or three 16 bit registers.
• BC and DE are normally used as data registers, while HL register pair can be used for address pointing.
• The program counter (PC) contains 16-bit address of the next instructions to be executed.
• It always points to the memory location of the next instruction to be executed.
• The stack pointer (SP) is also a 16-bit register.
• It consists top (first) address of the memory called stack.
• The stack pointer maintains the address of last byte entered in the stack.
• The SP is decremented each time, data is pushed onto the stack and is incremented each time data is popped off the
stack.

Flags of 8085/Flag Registers/ Status Registers


also called a status register.,8-bit register.,consists of flip flops. ,These flags are set or reset according to results of
operations. ,In most of the arithmetic and logic operations, the result is stored in accumulator. Therefore, the flag
generally reflects data conditions in accumulator.

1. Sign Flag (S) :After any operation if the MSB (B(7)) of the result is 1, it indicates the number is negative and
the sign flag becomes set, i.e. 1. If the MSB is 0, it indicates the number is positive and the sign flag becomes reset.
This flag is used with signed numbers.
2. Zero Flag (Z) :After any arithmetical or logical operation if the result is 0 (00)H, the zero flag becomes set i.e.
1, otherwise it becomes reset
These set of instructions will set the zero flag to 1 as 10H – 10H is 00H.
3. Auxiliary Carry Flag (AC) :
This flag is used in the BCD number system (0-9). If after any arithmetic or logical operation D(3) generates any carry
and passes it on to D(4) this flag becomes set i.e. 1, otherwise, it becomes reset i.e. 0.
This is the only flag register that is not accessible by the programmer 1-carry out from bit 3 on addition or borrows
into bit 3 on subtraction 0-otherwise

4. Parity Flag (P)


If after any arithmetic or logical operation the result has even parity, an even number of 1 bit, the parity register
becomes set i.e. 1, otherwise it becomes reset i.e. 0.
1-accumulator has an even number of 1 bits
0-accumulator has odd parity

5. Carry Flag (CY)


Carry is generated when performing n bit operations and the result is more than n bits, then this flag becomes set i.e.
1, otherwise, it becomes reset i.e. 0.
During subtraction (A-B), if A>B it becomes reset, and if (A<B) it becomes set. Carry flag is also called the borrow flag.
1-carry out from MSB bit on addition or borrow into MSB bit on subtraction
0-no carry out or borrow into MSB bit.

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