Input-Output
Interface
I/O Interface
■ I/O interface refers to the process of transferring data between internal storage
and external I/O devices.
■ The peripherals linked to any computer system interface with the CPU via
particular communication channels.
■ In order to supervise and synchronize all input and output transfers, there are
special hardware elements between the CPU and peripherals that are referred
to as interface units.
I/O Interface & Interface
Module
Mode of Transfer
■ Typically, the memory unit stores the binary data that is received from an external
device.
■ The memory unit is the source of the data that is sent from the CPU to the external
device.
■ The memory unit is always the source and target of information; the CPU only
processes it.
■ Different modes of data transfer between the CPU and the I/O devices are possible.
– Programmed I/O
– Interrupt- initiated I/O.
– Direct memory access( DMA).
Mode of Transfer: DMA
■ The transfer of data between a fast storage device such as magnetic disk and memory
is often limited by the speed of the CPU.
■ Removing the CPU from the path and letting the peripheral device manage the memory
buses directly would improve the speed of transfer. This technique is called direct
memory access (DMA).
■ The process is managed by a chip known as a DMA controller (DMAC).
Mode of Transfer: DMA Controller
■ The Figure 11-17 shows the block diagram of a typical DMA controller. The registers in the
DMA are selected by the CPU through the address bus by enabling the DS (DMA select) and
RS (register select) inputs. The RD (read) and WR (write) inputs are bidirectional. When the
BG (bus grant) input is 0, the CPU can communicate with the DMA registers through the
data bus to read from or write to the DMA registers. When BG = 1, the CPU has relinquished
the memory by specifying an address in the address bus and activating the RD or WR
control. The DMA communicates with the external peripheral through the request and
acknowledge lines by using a prescribed handshaking procedure.
Mode of Transfer: DMA Controller
■ The DMA controller has three registers as follows.
● Address register – It contains the address to specify the desired location in memory.
● Word count register – It contains the number of words to be transferred.
● Control register – It specifies the transfer mode.
Mode of Transfer: DMA Controller
Mode of Transfer: DMA Controller
■ The CPU initializes the DMA by sending the given information through the data bus.
● The starting address of the memory block where the data is available (to read) or
where data are to be stored (to write).
● It also sends word count which is the number of words in the memory block to be read
or write.
● Control to define the mode of transfer such as read or write.
● A control to begin the DMA transfer.
Mode of Transfer: DMA
■ The CPU initializes the DMA by sending the given information through the data bus.
● The starting address of the memory block where the data is available (to read) or
where data are to be stored (to write).
● It also sends word count which is the number of words in the memory block to be read
or write.
● Control to define the mode of transfer such as read or write.
● A control to begin the DMA transfer.
DMA Transfer
Priority Interrupt
● A priority interrupt is a system that establishes a priority over the various sources to
determine which condition is to be serviced first when two or more requests arrive
simultaneously.
● The system may also determine which conditions are permitted to interrupt the
computer while another interrupt is being serviced.
● Device with high speed transfers such as magnetic disks are given high priority, and
slow devices such as keyboards receive low priority.
● When two devices interrupt the computer at the same time, the computer services the
device, with the higher priority first.
