KEMBAR78
MICROCOMPUTER application introduction.ppt
Microcomputer Systems
• Outline
– What is a Microcomputer?
– Types of Microcomputers
– Modular Microcomputer
– Clock and CPU Control Circuits
– Address Decoder
– Address and Data Bus Buffers
– Buffer Control
– Bus Arbitration Control
– Memory Management
– Memory Module
– Peripherals Module
• Goal
– Understand components of modular microcomputer
• Reading
– Microprocessor Systems Design, Clements, Ch. 1
Topics
• Microcomputer systems
• 68k programmer model
• 68k signal description
• 68k memory hierarchy
• 68k instruction set - briefly
• 68k C and assembly code programming
• Static RAM
• Memory read and write cycles
• Address decoding
• Exceptions - interrupts, exceptions
Topics
• I/O fundamentals
• Parallel I/O & Timers
• Serial I/O
• Microcomputer buses
• Dynamic RAM - organization and timing
• Microcomputer systems design
Assignment (cont.)
• If you have PC with CD-ROM drive
– get CDROM out of your book
– try to install cross-assembler and C compiler on your PC
– see if they will assemble and compile a simple program
– you can then do coding at home and bring floppy to lab
– note we will use GNU C compiler in class
• Everyone
– labs start second week
– read lab assignment in advance
– bring some PC floppies to lab
– end of this week - check that your ID will access HRBB 217
– make sure you have Neo account for class email
What is a Microcomputer?
• Microcomputer (uC) = microprocessor-based computer
• Microprocessor (uP) = single-chip or chipset CPU
• Chipset - few closely-interacting chips
– 68020 - integer+control, MMU, floating point
– VAX 8200 - integer+control+MMU, microcode, floating point
• All computers today have single-chip CPU
– off-chip delays force all high-speed paths on chip
– 2.26+ GHz P4
» off-chip path is 500 MHz
» 2 levels of memory cache on chip
– “chipset” is interface chip for CPU
» memory interface, mouse, keyboard, graphics, USB, ...
Types of Microcomputers
• Single board computer (SBC)
– usually an embedded computer - buried inside a product
• Features
– dedicated to a single fixed task
– minimum hardware to support the task
» minimize cost, power, weight, size
• Examples
– PostScript printer, ATM, microwave oven, cell phone
• Microcontroller
– board shrunk to single chip - most common uC
– CPU, memory, I/O
– Examples: ARM, 68HC11, 8051
Types of Microcomputers
• Modular microcomputer
– modules connected by a bus
– usually a general-purpose computer
• Features
– used for wide range of applications
– flexible hardware to support application range
» can mix and match modules as needed
» example - add more memory modules
• Examples
– personal computer, factory controller
Modular Microcomputer
• System = modules linked by system bus
– system bus - data transfer between modules
– local bus - data transfer within module
• Advantages
– standard modules assembled to form computer
– large number of module types available
– can easily customize computer to application needs
• System bus standards
– bus specification agreed upon by all manufacturers
– often first a proprietary bus
» Motorola Versabus => VME bus
– now industry committees agree to bus standards
Figure 1.1
CPU Module Memory Module Peripherals Module
System Bus
Buffers Buffers Buffers
CPU
MMU
Local Memory
Clock
Bus Arbitration
DRAM
DRAM Ctl
Addr Decode
Parallel I/O
Serial I/O
Timer
Disk Cntlr
USB
Firewire
...
Clock and CPU Control
• Time reference to CPU.
– square or sine wave
– 1000 MHz for 500 MHz Alpha
• Also forms master clock used for rest of system
– synchronize bus, other modules
• Power-on reset
– force CPU to initialize and execute start-up routine
» bootstrap code
– initiated when power first turned on
» can also initiate manually - the reset button
Address
Decoder
• Divide up address space
– allocate to individual memory units
• Divide up among memory chips
– e.g. split 64 MB across 32 16 Mb DRAM chips
• Partition physical memory locations
– local memory on CPU board
» SRAM, EEPROM, Flash, ROM
» data transfer on local bus
» accessible only to CPU
» allows CPU module to be independently tested
– main memory in memory module
» data transfer on system bus
Address and Data Bus
Buffers
• uP output pins can only drive small load
– a few nearby chips
• Use buffers or bus drivers to drive large buses
– chips with big transistors, little logic
– shield uP from load
• Interface between uP and local and system buses
• Need buffer control to coordinate drivers
Buffer Control
• Determines operating mode of bus drivers and
receivers
– only turn on drivers when they need to send data
– e.g. disable system bus drivers during local memory access
• Only one device can drive the bus at a time
– tristate - buffer goes into high impedance state
» like an open circuit
• Operations on parts of a word
– e.g. 32-bit uP wants to write one byte or a 16-bit word
– memory has byte addresses
• Byte/word control turns on drivers in part of bus
Bus Arbitration Control
• Master and slave devices
– CPU is master
– memory and peripherals are slaves
– CPU controls all bus usage
• Multi-master system
– multiple devices can access bus
– DMA (direct memory access) controller
» moves data between memory and peripheral
» autonomous of CPU
– multiprocessor - multiple uPs
• Need protocol (rules) for bus access
– one at a time, fair access, timely access
– in hardware for speed
– master - currently controlling bus
– slave - devices accessed by master
Memory
Management
• Translate uP logical address to memory physical
address
– logical address - any address in uP architecture address space
» issued by program
– physical address - actual memory location
• Virtual memory
– make small physical memory look like large logical memory
– store part of data on disk
– system vs. user protection domains
• Location independence
– programmers use logical address
– operating system figures out what physical address to use
• Memory management unit (MMU)
– part of CPU today - 68030, 486, and later
Memory Module
• Types of memory
– read/write random access memory (RAM)
– read-only memory (ROM)
» programmed when manufactured
» use for bootstrap programs, fixed code
» example: PostScript interpreter
– EPROM, EEPROM, flash
» program once, or once in a while
» use for program storage, preferences
• Interface
– bus interface - buffers, buffer control
– address decoders
– refresh logic
Memory Module (cont.)
• Dynamic RAM (DRAM)
– lowest cost/bit - 1 transistor+capacitor per bit
– used for large main memories
– must refresh bits every few milliseconds
• Static RAM (SRAM)
– faster
– more expensive - 6 transistors per bit
– often used for cache memory
– often used for battery applications
» holds data at very low power
Peripheral Module
• Interfaces to outside world
• Serial input/output (I/O)
– terminal line
• Parallel I/O
– printer cable
• Timer
– measure time
– generate series of pulses - e.g. interrupt uP at fixed interval
– used for real-time systems
• Disk controller
– disk operations
– data format conversion
• Network interface
– Ethernet, IEEE 488 bus, etc.
ColdFire MCF5206e

MICROCOMPUTER application introduction.ppt

  • 1.
    Microcomputer Systems • Outline –What is a Microcomputer? – Types of Microcomputers – Modular Microcomputer – Clock and CPU Control Circuits – Address Decoder – Address and Data Bus Buffers – Buffer Control – Bus Arbitration Control – Memory Management – Memory Module – Peripherals Module • Goal – Understand components of modular microcomputer • Reading – Microprocessor Systems Design, Clements, Ch. 1
  • 2.
    Topics • Microcomputer systems •68k programmer model • 68k signal description • 68k memory hierarchy • 68k instruction set - briefly • 68k C and assembly code programming • Static RAM • Memory read and write cycles • Address decoding • Exceptions - interrupts, exceptions
  • 3.
    Topics • I/O fundamentals •Parallel I/O & Timers • Serial I/O • Microcomputer buses • Dynamic RAM - organization and timing • Microcomputer systems design
  • 4.
    Assignment (cont.) • Ifyou have PC with CD-ROM drive – get CDROM out of your book – try to install cross-assembler and C compiler on your PC – see if they will assemble and compile a simple program – you can then do coding at home and bring floppy to lab – note we will use GNU C compiler in class • Everyone – labs start second week – read lab assignment in advance – bring some PC floppies to lab – end of this week - check that your ID will access HRBB 217 – make sure you have Neo account for class email
  • 5.
    What is aMicrocomputer? • Microcomputer (uC) = microprocessor-based computer • Microprocessor (uP) = single-chip or chipset CPU • Chipset - few closely-interacting chips – 68020 - integer+control, MMU, floating point – VAX 8200 - integer+control+MMU, microcode, floating point • All computers today have single-chip CPU – off-chip delays force all high-speed paths on chip – 2.26+ GHz P4 » off-chip path is 500 MHz » 2 levels of memory cache on chip – “chipset” is interface chip for CPU » memory interface, mouse, keyboard, graphics, USB, ...
  • 6.
    Types of Microcomputers •Single board computer (SBC) – usually an embedded computer - buried inside a product • Features – dedicated to a single fixed task – minimum hardware to support the task » minimize cost, power, weight, size • Examples – PostScript printer, ATM, microwave oven, cell phone • Microcontroller – board shrunk to single chip - most common uC – CPU, memory, I/O – Examples: ARM, 68HC11, 8051
  • 7.
    Types of Microcomputers •Modular microcomputer – modules connected by a bus – usually a general-purpose computer • Features – used for wide range of applications – flexible hardware to support application range » can mix and match modules as needed » example - add more memory modules • Examples – personal computer, factory controller
  • 8.
    Modular Microcomputer • System= modules linked by system bus – system bus - data transfer between modules – local bus - data transfer within module • Advantages – standard modules assembled to form computer – large number of module types available – can easily customize computer to application needs • System bus standards – bus specification agreed upon by all manufacturers – often first a proprietary bus » Motorola Versabus => VME bus – now industry committees agree to bus standards
  • 9.
    Figure 1.1 CPU ModuleMemory Module Peripherals Module System Bus Buffers Buffers Buffers CPU MMU Local Memory Clock Bus Arbitration DRAM DRAM Ctl Addr Decode Parallel I/O Serial I/O Timer Disk Cntlr USB Firewire ...
  • 10.
    Clock and CPUControl • Time reference to CPU. – square or sine wave – 1000 MHz for 500 MHz Alpha • Also forms master clock used for rest of system – synchronize bus, other modules • Power-on reset – force CPU to initialize and execute start-up routine » bootstrap code – initiated when power first turned on » can also initiate manually - the reset button
  • 11.
    Address Decoder • Divide upaddress space – allocate to individual memory units • Divide up among memory chips – e.g. split 64 MB across 32 16 Mb DRAM chips • Partition physical memory locations – local memory on CPU board » SRAM, EEPROM, Flash, ROM » data transfer on local bus » accessible only to CPU » allows CPU module to be independently tested – main memory in memory module » data transfer on system bus
  • 12.
    Address and DataBus Buffers • uP output pins can only drive small load – a few nearby chips • Use buffers or bus drivers to drive large buses – chips with big transistors, little logic – shield uP from load • Interface between uP and local and system buses • Need buffer control to coordinate drivers
  • 13.
    Buffer Control • Determinesoperating mode of bus drivers and receivers – only turn on drivers when they need to send data – e.g. disable system bus drivers during local memory access • Only one device can drive the bus at a time – tristate - buffer goes into high impedance state » like an open circuit • Operations on parts of a word – e.g. 32-bit uP wants to write one byte or a 16-bit word – memory has byte addresses • Byte/word control turns on drivers in part of bus
  • 14.
    Bus Arbitration Control •Master and slave devices – CPU is master – memory and peripherals are slaves – CPU controls all bus usage • Multi-master system – multiple devices can access bus – DMA (direct memory access) controller » moves data between memory and peripheral » autonomous of CPU – multiprocessor - multiple uPs • Need protocol (rules) for bus access – one at a time, fair access, timely access – in hardware for speed – master - currently controlling bus – slave - devices accessed by master
  • 15.
    Memory Management • Translate uPlogical address to memory physical address – logical address - any address in uP architecture address space » issued by program – physical address - actual memory location • Virtual memory – make small physical memory look like large logical memory – store part of data on disk – system vs. user protection domains • Location independence – programmers use logical address – operating system figures out what physical address to use • Memory management unit (MMU) – part of CPU today - 68030, 486, and later
  • 16.
    Memory Module • Typesof memory – read/write random access memory (RAM) – read-only memory (ROM) » programmed when manufactured » use for bootstrap programs, fixed code » example: PostScript interpreter – EPROM, EEPROM, flash » program once, or once in a while » use for program storage, preferences • Interface – bus interface - buffers, buffer control – address decoders – refresh logic
  • 17.
    Memory Module (cont.) •Dynamic RAM (DRAM) – lowest cost/bit - 1 transistor+capacitor per bit – used for large main memories – must refresh bits every few milliseconds • Static RAM (SRAM) – faster – more expensive - 6 transistors per bit – often used for cache memory – often used for battery applications » holds data at very low power
  • 18.
    Peripheral Module • Interfacesto outside world • Serial input/output (I/O) – terminal line • Parallel I/O – printer cable • Timer – measure time – generate series of pulses - e.g. interrupt uP at fixed interval – used for real-time systems • Disk controller – disk operations – data format conversion • Network interface – Ethernet, IEEE 488 bus, etc.
  • 19.