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IGCSE Computer Science: OS & Architecture Worksheet

The document discusses key aspects of von Neumann computer architecture including buses, the fetch-execute cycle, registers, and operating system features. It provides a worksheet with questions about connecting buses to their descriptions, sequencing the stages of the fetch-execute cycle, naming registers and buses, and listing three features of a typical operating system.

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Rishwanth K
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141 views2 pages

IGCSE Computer Science: OS & Architecture Worksheet

The document discusses key aspects of von Neumann computer architecture including buses, the fetch-execute cycle, registers, and operating system features. It provides a worksheet with questions about connecting buses to their descriptions, sequencing the stages of the fetch-execute cycle, naming registers and buses, and listing three features of a typical operating system.

Uploaded by

Rishwanth K
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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IGCSE – Computer Science

Operating Systems and Computer Architecture


Worksheet – 1

1. One of the key features of von Neumann computer architecture is the use of buses.

Three buses and three descriptions are shown below.

Draw a line to connect each bus to its correct description.

Bus Description

This bus carries signals used to


Address bus
coordinate the computer’s activities

This bi-directional bus is used to


Control bus exchange data between processor,
memory and input/output devices

This uni-directional bus carries


Data bus signals relating to memory addresses
between processor and memory

[3]

2. The seven stages in a von Neumann fetch-execute cycle are shown in the table below.
Put each stage in the correct sequence by writing the numbers 1 to 7 in the right-handcolumn. The
first one has been done for you.

Sequence
Stage
number
The instruction is then copied from the memory location contained in the
MAR (memory address register) and is placed in the MDR (memory
address register
The instruction is final decoded and is then executed

The PC (program counter) contains the address of the next instruction to


be fetched 1
The entire instruction is then copied from the MDR (memory data
register) and placed in the CIR (current instruction register)
The address contained in the PC (program counter) is copied to the MAR
(memory address register) via the address bus

The address part of the instruction, if any, is placed in the MAR (memory
address register)
The value in the PC (program counter) is then incremented so that it
points to the next instruction to be fetched.

[7]

3. Two features of Von Neumann architecture are the use of registers and the use of buses.

Give the names of two registers and two buses. [2]

4. State three features of a typical operating system. [3]

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