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Archtechof Microprocessors

The document provides an overview of microprocessor architecture, detailing its components, operations, and the specific functions of the 8085 microprocessor. It explains the roles of memory types (ROM and RAM), the organization of a microprocessor system, and the various operations performed by the microprocessor, including data transfer and arithmetic operations. Additionally, it outlines the instruction set of the 8085, categorizing them into different operation types.

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0% found this document useful (0 votes)
15 views13 pages

Archtechof Microprocessors

The document provides an overview of microprocessor architecture, detailing its components, operations, and the specific functions of the 8085 microprocessor. It explains the roles of memory types (ROM and RAM), the organization of a microprocessor system, and the various operations performed by the microprocessor, including data transfer and arithmetic operations. Additionally, it outlines the instruction set of the 8085, categorizing them into different operation types.

Uploaded by

Ankur thakuria
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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Microprocessor Architecture
Type Module

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Introduction

💡 A microprocessor is a multipurpose, programmable logic device that


reads binary instructions from a storage device called memory ,
accepts binary data as input and processes data according to those
instructions and provides results as output. Microprocessor
incorporates the functions of a computers CPU on a single IC .

Whereas the Microcontroller are the silicon chip which includes


microprocessor , memory and I/O in a single package.

Processor means a device that processes numbers , specifically binary


numbers , 0’s and 1’s.

Components :
1. Hardware : physical components

2. Software : set of instructions called software

MEMORY :
They are like pages of of notebook with space for binary numbers , pages
are made of semiconductor materials .

Microprocessor Architecture 1
Each Line is a 8 bit register that can store 8 bits and several of these
registers are arrayed in sequence called memory.

A group of 1024 (2^10) 8 bit registers on a semiconductor is known as 1K


byte of memory.

Organization of a microprocessor based system :

Registers or Arrays

Stores data temporarily during the execution of a program

Input and Output Devices

Also known as peripherals : keyboards , switches, ADC ,LED CRO , DAC

System Bus

Communication path , a group of wires to carry bits.

Control Unit

Microprocessor Architecture 2
Provides necessary timing and control signals to all the operations ,
control the flow of data between microprocessor and memory and
peripherals.

Memory

memory is a physical device that stores data and information

ROM :

ROM is the part of memory that is usually preloaded with information


and software.

CPU can only read from it and it cannot be changed .

Stores computers initial starter instructions and it can even retain data
when switched off.

RAM :

Random Access Memory is volatile. That means data is retained in RAM


as long as the computer is on, but it is lost when the computer is turned
off.

MICROPROCESSOR ARCHITECTURE AND ITS


OPERATION :
MPU performs 4 operations :

1. Memory read : reads data or instructions from the memory

2. Memory write : Writes data or instructions to memory

3. I/O Read : Accepts data from Input devices

4. I/O Write : Sends data to the output devices

Tow Communicate with a peripheral or memory , MPU must perform


following steps

1. Identify peripheral or memory locations.

2. Transfer data

3. Provide timing or synchronization signals .

The MPU performs these functions using three set of communication lines ,
they are called buses.

Microprocessor Architecture 3
Address Bus

group of 16 unidirectional lines [ A0 to A15].

They are used for identifying of memory locations

2^16 = 65536 memory locations [ 64 KB of memory]

Data Bus

group of 8 bidirectional lines [ D0 to D7] for data transfer.

It can manipulate 2^8 = 256 [ from 00 to FF ]

Control Bus

Single lines that carries synchronizing signal

Used to provide timing signal

Illustrations :
To read an instructions(data) from a memory locations

STEPS

Microprocessor Architecture 4
MPU places the 16bit address on the address bus

Address is decoded by an external logic circuit [ Memory decoder].


Memory locations is identified.

MPU sends a pulse called “Memory Read” as control signal and the
pulse activate the memory chip.

Contents of the memory locations are placed on the data bus and
brought inside the MPU.

Internal data operations :


store 8 bit data

performs arithmetic and logical operations

Test the conditions

Sequence the execution of instructions

Store date temporarily during execution

8085 Registers :
To perform any operations , the MPU needs

Registers

An Arithmetic and logic unit [ ALU ]

Control logic

Internal Buses [ paths for information flow ]

Registers
8085 has six general purpose registers — B,C,D,E,H,L of 8 bits each to
store 8 bit data

Register pairs — BC , DE and HL to perform 16 bit operations. These are


programmable registers.

Microprocessor Architecture 5
Accumulator (A) :
It is 8 bit register which is part of ALU

It is store 8 bit data and the result of a operations is stored in accumulator.

In an arithmetic operation involving two operands, one operand has to be in


this register. And the result of the arithmetic operation will be stored or
accumulated in this register

General purpose register :


MPU 8085 has 6 general purpose register , each have 8 bit and also
programmable

They can be used as register pair , BC , DE, HL used for 16 bit data

Flags :
ALU includes 5 flip flops to set or reset according to data conditions in the
accumulator and other registers .

They are not used as 8 bit registers : Zero(Z) , Carry (CY) , Sign(S) , Parity
(P) and Auxiliary Carry (AC).

Flags are stored in 8 bit register so that the programmer examine these
flags by accessing the register through an instruction.

Program Counter (PC) :


16 bit register

sequencing the execution of instructions

Microprocessor Architecture 6
The function of the PC is to point to the memory address from which the
next byte is to be fetched ,

When a byte is being fetched , the PC is incremented by one to point to the


next memory location .

Stack Pointer (SP) :


16 bit register

Memory pointer

Points to a memory locations in R/W memory called the stack.

The beginning of the stack is defined by loading a 16 bit address in the


stack pointer

Externally initiated operations :


External devices can initiate the following operations - Reset , Interrupt ,
Ready , Hold .

1. Reset : when activated , all internal operations are suspended and PC is


cleared ( It hold 0000 H)

2. Interrupt : It can be interrupt from the normal execution of instructions and


asked to execute some other instructions , called service routine , after that
it resumes its normal operations

3. Ready : if low , MPU enters into a wait state , this signal is used primarily to
synchronize slower peripherical with MPU .

4. Hold : If activated , the MPU relinquishes control of buses and allows the
external peripheral to use them.

8085 Microprocessor :
8085 MPU is an 8 bit general purpose microprocessor

Capable of addressing 64KB of memory

It has 40 pins and it requires a +5 V supply

Can operate with a 3 MHz single phase clock

Microprocessor Architecture 7
All the signals can be classified into six groups —

1. Address Bus

2. Data bus

3. Control and Status Signals

4. Power Supply and Frequency signals

5. Externally initiated signals

6. Series I/O ports

Introduction to 8085 Instructions :


The 8085 is an 8 bit device it can have up to 2^8 (256) instructions.

However, It uses 246 combinations that represent a total of 74 instructions

These instructions can be grouped into five different groups :

Data Transfer Operations

Arithmetic Operations

Logic Operations

Branch Operations

Machine Control Operations

Each instructions has two parts.

1. The first part is the task or operations to be performed . It is called


“OPCODE”.

2. The second part is the data to be operated on . It is called “OPERAND”.

Microprocessor Architecture 8
Data Transfer Operations :
These operations COPY data from the source to the destinations ,

MOV , MVI , LDA and STA

They transfer :

Data between registers.

Data Byte to a register or memory locations

Data between memory locations and a register

Data between an I/O device and the accumulator.

The Data in the source is not changed.

The LXI instructions : ( Load Extended Immediate )


The 8085 provides an instructions to place the 16 bit data into the
register pair in one step.

💡 LXI Rp, < 16-bit address >

The instructions LXI B 4000H will place the number 4000 into the
register pair B,C

The Memory “Register”


Most of the instructions of the 8085 can use a memory locations in place of
a register

Microprocessor Architecture 9
💡 MOV M B //copy the data from register B into a memory location.

The 16 bit contents of the HL register pair are treated as 16 bit address and
used to identify the memory locations.

There is also an instructions for moving data from memory to the


accumulator without disturbing the contents of the H and L register.

💡 LDAC Rp { Load Accumulator Extended }

ARITHMETIC OPERATIONS:
Additions (ADD,ADI) and Subtractions (SUB, SUI):
Any 8 bit number can be added to the contents of the accumulator and the
result is stored in the accumulator.

Can be subtracted from the contents of the accumulator . The result is


stored in the accumulator

ADD M //add the contents of M to the accumulator


SUB M //sub the contents of M from the accumulator
INR M / DCR M //Increment/ decrement the content of the M in place
// 8 Bit content can be incremented/ Dec by 1.
/*All of these use the contents of the HL register pair to identify the
memory locations being used */

It is possible to manipulate a 16 bit address stored in a register pair as one


entity using some special instructions.

💡 INX/DCX Rp { Increment/decrement the 16 bit number in the register


pair }

LOGIC OPERATIONS :

Microprocessor Architecture 10
These instructions perform logic operations on the content of the
accumulator ANA, ANI , ORA , ORI , XRA and XRI

ANA R/M // AND Accumulator with reg/ mem


ANI # // AND Accumulator with an 8 bit number
ORA R/M // OR Accumulator with Reg/mem
ORI # // OR Accumulator with an 8 bit number
XRA R/M //SAME just XOR
XRI # //SAME
CMA // 1s complement of the contents of the accumulator

Rotate :
Rotate the content of the accumulator one position to the left or right.

RLC : Rotate the accumulator left

RAL : Rotate the accumulator left through the carry

RRC/RAR for right.

COMPARE
Compare the contents of the register or memory locations with the contents
of the accumulator.

CMP R/M : Compare between registers and memory locations

Microprocessor Architecture 11
CPI # : For numbers

The compare instructions sets the flags ( Z, CY and S )

Branch Operations :
Types :

1. Unconditional branch : Go to a new locations no matter what

2. Conditional branch : Go to a new locations if the condition is true.

JMP Address //Jump to the address specified


CALL address //Jump to the address specified but treat it as a subroutine
RET // Return from a subroutine
/* The addresses supplied to the branch operations must be 16-bits */
JZ Address //Jump on Zero [ Go to the specified address if the zero flag is set
JNZ Address //Jump on NOT CARRY
JC Address // Go to the specified locations if the carry flag is set
JNC Address // Jump on No Carry
JP Address //Jump on Plus [same just sign flag]
JM address // Jump on Minus

Machine Control :

💡 HLT : Stop the executing the program NOP: No operations , exactly as


it says , do nothing

Typically all instructions occupy one byte only . The exceptions is any
instruction that contains immediate data or a memory address.

Instructions that include immediate data use two bytes and memory
address occupy three bytes.

Microprocessor Architecture 12
Microprocessor Architecture 13

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