American International University-Bangladesh (AIUB)

FACULTY OF Engineering

DIGITAL LOGIC AND CIRCUITS LAB

Spring 2024-2025

Experiment No: 07

Section: J, Group: 08

Date of Submission : 27/05/2025

Lab Report on :

Implementation of Asynchronous and synchronous counters using flip-flops.

Submitted To :

MOHAMMAD ASHIQUR NOOR

Submitted By :

Name of the Student ID Number

Sanjida Chowdhury 23-52842-2

Faysal Ahmed Shovo 23-50529-1

Fardin Alif 21-45762-3

Title: Implementation of Asynchronous and synchronous counters using
flip-flops.

Abstract:
The experiment explores the design and implementation of asynchronous and synchronous counters
using J-K flip-flops. Counters are digital circuits that count clock pulses and are essential in various
electronic applications. Two types of counters are examined: asynchronous counters and synchronous
counters. Asynchronous counters use flip-flops in a cascaded manner, where each flip-flop's output
serves as the clock input for the next, causing a delay. Synchronous counters, on the other hand, connect
all flip-flops directly to a common clock, allowing for simultaneous state changes with minimal delay.
This experiment involves designing different type of counters, providing circuit and timing diagrams,
and conducting experiments using a trainer board. Simulations were also performed using Multisim
software to compare theoretical and practical results. The findings highlight the differences in
performance between the two counter types, offering insights into their applications and advantages.

Introduction:
Counters are combinations of flip-flops arranged so that they can remember how many clock pulses
have been applied over some specified interval. The flip-flops are often interconnected so that only a
portion of their available binary states can be supported. If there are N flip-flops being used in a
counter, the number of states available is 2N. If the counter proceeds cyclically through K of these
states, where K ≤ 2N, it is said to be a modulo K (or MOD K) counter. Some applications will require a
separate output to indicate each of the counters states, alternatively, other applications may require only
one output pulse every Kth state.

Counters are classified into two broad categories according to the way they are clocked: asynchronous
and synchronous. In asynchronous counters, commonly called ripple counters, the first flip-flop is
clocked by the external clock pulse and then each successive flip flop is clocked by the output of the
preceding flip-flop. In synchronous counters, the clock input is connected to all of the flip-flops so that
they are clocked simultaneously.
The objective of this experiment is designing of the following counters using J-K Flip-Flops (IC
74LS76)
(a) n-bit Binary Asynchronous Counter
(b) n-bit Binary Synchronous Counter

Asynchronous counter

Figure 1: 3 bit Asynchronous counter and its timing diagram Synchronous

counter

Figure 2a: A four-bit Synchronous Up Counter

Figure 2b: The timing diagram of a four-bit Synchronous Up Counter

Pin Configuration of 74LS76 and 7408

There are 2 J-K Flip Flops in one IC. Here is the pin configuration of the IC 74LS76:

Figure 3: IC 74LS76
IC 7408 contains 4 AND gates in it. The pin configuration is shown below:
 Figure 9.4: IC 7408

Simulation:
1. 2 bit Asynchronous counter:
2. 3 bit Asynchronous counter:
3. 2 bit Synchronous counter:
4. 3 bit Synchronous counter:
Question & Answer:

1. Design a 4 bit Asynchronous Up- Counter.

2. Design a 4 bit Synchronous Up- Counter.
Bonus Mark Question’s Answer:

1. Design a 3 bit Asynchronous down counter.

2. Design a Mod 10 Synchronous up counter.
Discussion:
In this experiment, we studied various types of synchronous and asynchronous counters and observed
the process of building these circuits using integrated circuits (ICs). Before implementation on the
trainer board, the truth tables for each circuit were reviewed using reference. The results were
crosschecked with knowledge from references and online sources. Once the circuits were
implemented and tested on the trainer board, simulations were conducted to further verify the results.
The developed circuits were tested for all input conditions, and the truth tables were confirmed to be
accurate based on both the trainer board and simulation results.

Conclusion:
In this experiment, we gained practical experience in constructing and verifying synchronous and
asynchronous counters. By comparing the trainer board results with expected truth table values, we
confirmed the accuracy of the circuits. We explored different counters, including a 4-bit synchronous
counter on the trainer board and 4-bit synchronous and asynchronous counters, along with a MOD-10
synchronous counter, through simulations in NI Multisim. Initially, the IC produced incorrect values,
but the expected sequence followed soon after. Overall, the experiment's objectives were achieved,
with both practical and simulated results verified using reference materials.

References:
1. Thomas L. Floyd, “Digital Fundamentals”, Ninth Edition.
2. AIUB DLC Lab Student Manual – Lab Manual 07