Basic of ARM Processor

❖ ARM stands for Advanced RISC Machine.

➢ Initially it was ACORN RISC Machine.

❖ ARM doesn’t manufacture any silicon device or IC’s.

❖ It involved in Processor design. Develops the architecture and licenses it
to other companies.
❖ ARM is family of RISC (Reduced instruction set computer) Processor.
ARM Version (History)
RISC Design Philosophy
❖ Instruction Set
❖ Pipeline
❖ General purpose registers
❖ Load/ Store Architecture
❖ Complexity- Compiler/ Processor
ARM Design Philosophy
❖ Power Consumption
❖ High code density
❖ Slow & low cost memories
❖ Physical Size
❖ Hardware debug technology
➢ JTAG debugger
Instruction set used in ARM
❖ Variable cycle execution for certain instructions
❖ Inline barrel shifter leading to more complex instructions
❖ Thumb 16-bit instruction set
❖ Conditional execution
❖ Enhanced instructions
Non RISC ideas in ARM
❖ ARM allows variable cycle execution on certain instructions to save power,
area, and code size.
❖ ARM adds a barrel shifter to expand the capability of certain instructions.
❖ ARM uses the Thumb 16-bit instruction set to improve code density.
ARM Bus Technology
❖ Embedded systems use different bus technologies than those designed

for x86 PCs.

❖ This type of technology is external or off-chip (i.e., the bus is designed to
connect mechanically and electrically to devices external to the chip) and
is built into the motherboard of a PC.
❖ In contrast, embedded devices use an on-chip bus that is internal to the
chip and that allows different peripheral devices to be interconnected
with an ARM core.
ARM Bus Technology
❖ A bus has two architecture levels.
❖ The first is a physical level that covers the electrical characteristics and
bus width (16, 32, or 64 bits).
❖ The second level deals with protocol—the logical rules that govern the
communication between the processor and a peripheral.
ARM Bus Technology
❖ AMBA was introduced in 1996 and has been widely adopted as the on-
chip bus architecture used for ARM processors.
❖ The first AMBA buses introduced were the ARM System Bus (ASB) and the
ARM Peripheral Bus (APB).
❖ After ARM introduced another bus design, called the ARM High
Performance Bus (AHB).
❖ Using AMBA, peripheral designers can reuse the same design on multiple
projects.
ARM Bus Technology
❖ A peripheral can simply be bolted onto the on-chip bus without having to

redesign an interface for each different processor architecture.

❖ This plug-and-play interface for hardware developers improves availability
and time to market.
Hardware for Embedded System
❖ Embedded systems can control many different devices
➢ From small sensor to high end embedded applications

❖ these devices use a combination of software and hardware components.

❖ Each component is chosen for efficiency
❖ Device can be separated into four main hardware components
Hardware for Embedded System
Hardware for Embedded System
❖ The ARM processor
➢ Controls the embedded device An ARM processor
➢ comprises a core (the execution engine that processes instructions and manipulates
data) plus the surrounding components that interface it with a bus.
➢ Components can include memory management and caches.

❖ Controllers
➢ coordinate important functional blocks of the system. Two commonly found controllers
are interrupt and memory controllers.

❖ Peripherals
➢ provide all the input-output capability external to the chip and are responsible for the
uniqueness of the embedded device.
Hardware for Embedded System
❖ Bus
➢ used to communicate between different parts of the device.
Hardware for Embedded System
Memory

❖ Embedded applications have some form of memory to store and execute

code.
❖ We have to compare price, performance, and power consumption when
deciding upon specific memory characteristics, such as hierarchy, width,
and type
Hardware for Embedded System
Hierarchy

All computer systems have memory arranged

in some form of hierarchy
Hardware for Embedded System
Width

❖ Typically memories are 8, 16, 32, or 64 bits. The memory width has a
direct effect on the overall performance and cost ratio.
❖ If you have 32 bit wide instructions set & 16 bit wide memory then the
processor will have to make two memory fetches per instruction.
❖ This obviously has the effect of reducing system performance, but the
benefit is that 16-bit memory is less expensive.
❖ In ARM 16 bit THUMB instruction provides both improved performance
and reduced cost. (improve code density)
Hardware for Embedded System
Memory Types (Non Volatile) RAM (Volatile)

Static RAM
ROM
Dynamic RAM
Masked ROM
NVRAM
OTP ROM

EPROM

EEPROM

Flash ROM
Hardware for Embedded System
Interrupt Controllers

❖ When a peripheral or device requires attention, it raises an interrupt to

the processor.
❖ An interrupt controller provides a programmable governing policy that
allows software to determine which peripheral or device can interrupt the
processor at any specific time by setting the appropriate bits in the
interrupt controller registers.
Software for Embedded System
❖ An embedded system needs software to drive it
❖ The initialization code is the first code executed on the board and is
specific to a particular target or group of targets. It sets up the minimum
parts of the board before handing control over to the operating system.
❖ The operating system provides an infrastructure to control applications
and manage hardware system resources.
❖ Many embedded systems do not require a full operating system but
merely a simple task scheduler that is either event or poll driven
Software for Embedded System
❖ The device drivers are the third component.
❖ They provide a consistent software interface to the peripherals on the
hardware device.
❖ Application performs one of the tasks required for a device. For example,
a mobile phone might have a diary application. There may be multiple
applications running on the same device, controlled by the operating
system.
Pipeline
❖ Pipeline means parallel working, this concept speeds up execution by
fetching the next instruction while other instructions are being
decoded and executed.
❖ ARM7 has three stage pipeline
➢ Fetch- loads an instruction from memory.
➢ Decode- identifies the instruction to be executed.
➢ Execute processes the instruction and writes the result back to a register.
Pipeline
Pipeline
❖ The three instructions are placed into
the pipeline sequentially.
❖ In the first cycle the core fetches the
ADD instruction from memory.
❖ In the second cycle the core fetches the
SUB instruction and decodes the ADD
instruction.
❖ In the third cycle, The ADD instruction is
in execute stage. the SUB instruction is
decoded, and the CMP instruction is
fetched.
❖ This procedure is called filling the
pipeline
Merits & Demerits of Pipeline
Advantages

❖ As the pipeline length increases, the amount of work done at each

stage is reduced. which allows the processor to attain a higher
operating frequency
❖ This in turn increases the performance.

Disadvantage

❖ The system latency increases because it takes more cycles to fill the
pipeline before the core can execute an instruction.
Pipeline & Program Counter
❖ The ARM pipeline has not processed an
instruction until it passes completely
through the execute stage.
❖ ARM7 pipeline (with three stages) has
executed an instruction only when the
fourth instruction is fetched.
❖ In the execute stage, the pc always
points to the address of the instruction
plus 8 bytes.
❖ the pc always points to the address of
the instruction being executed plus two
instructions ahead.
Characteristics of Pipeline
❖ the execution of a branch instruction or branching by the direct
modification of the pc causes the ARM core to flush its pipeline.
❖ ARM10 uses branch prediction, which reduces the effect of a pipeline
flush by predicting possible branches and loading the new branch
address prior to the execution of the instruction.
❖ An instruction in the execute stage will complete even though an
interrupt has been raised.
ARM Nomenclature