Computre structures and architecture.pptx

Computre structures and architecture.pptx

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  Input & Output CS2052Computer Architecture Computer Science & Engineering University of Moratuwa Dilum Bandara
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  Blocks of aMicroprocessor 3 Literal Address Operation Program Memory Instruction Register STAC K Program Counter Instruction Decoder Timing, Control and Register selection Accumulat or RAM & Data Registers ALU IO IO FLAG & Special Function Registers Clock Reset Interrupts Program Execution Section Register Processing Section Set up Set up Modify Address Internal data bus Source: Makis Malliris & Sabir Ghauri, UWE
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  Input & Output 🞐Wide variety of peripherals ■ Different volumes of data, in different formats, & different speeds 🞐 All slower than CPU & RAM 🞐 Controlled vial I/O modules/controllers ■ Interface to CPU & Memory 4 CPU Main Memory I/O Devices System Bus
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  External Devices 🞐Interact withhumans ■Monitor, printer, keyboard, mouse 🞐Machine readable ■Monitoring & control ■e.g., process scheduling, CPU/casing temperature monitoring, fan speed control 🞐Communication ■Network Interface Card (NIC) ■Modems 5
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  Generic Model ofI/O Module 6 Source: William Stallings, Computer Organization and Architecture, 8th Edition
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  I/O Module Functions 🞐Control& Timing 🞐CPU communication 🞐Device communication 🞐Data buffering 🞐Error detection 7 Source: http://lilt.ilstu.edu/cheri/itk254/sc/inputoutput/InputOutput_print.html
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  I/O Module Functions– Example 8 Source: http://lilt.ilstu.edu/cheri/itk254/sc/inputoutput/InputOutput_print.html
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  Input Output Techniques 🞐Programmed ■Pooling 🞐Interruptdriven 🞐Direct Memory Access (DMA) 9
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  Programmed I/O 🞐CPU hasdirect control over I/O ■Continuously sense status ■Read/write commands ■Transferring data 🞐CPU waits for I/O module to complete operation 🞐Wastes CPU time 10
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  Addressing I/O Devices 🞐Underprogrammed I/O data transfer is like memory access ■Use instructions like MOVWF, INCF, BTFSS ■e.g., MOVWF 0x06 🞐Each device given unique identifier 🞐CPU commands contain 11
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  I/O Mapping 12 Source: http://me-lrt.de/memory-map-port-isolated-input
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  I/O Mapping (Cont.) MemoryMapped I/O 🞐 Devices & memory share same address space 🞐 I/O looks just like memory read/write 🞐 No special commands for I/O ■ Large selection of memory access commands Isolated I/O 🞐 Separate address spaces 🞐 Need I/O or memory select lines 🞐 Special commands for I/O ■ Limited set 13
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  Interrupt Driven I/O 🞐Norepeated CPU checking of device ■No waiting ■CPU does its own work 🞐I/O module interrupts CPU when ready 🞐Steps ■CPU issues read command ■I/O module gets data from peripheral whilst CPU does other work ■I/O module interrupts CPU 14
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  Interrupt Processing 15 Source: RobertLove, Linux Kernel Development
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  Interrupt Processing (Cont.) 16 Source:William Stallings, Computer Organization and Architecture, 8th Edition
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  Direct Memory Access(DMA) 🞐Programmed & interrupt driven I/O require active CPU intervention ■Transfer rate is limited ■CPU is tied up 🞐DMA is the answer ■Additional module (hardware) on bus ■DMA controller takes over from CPU for I/O 🞐Provide a way of bypassing CPU when transferring data between memory & IO 17
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  18 DMA (Cont.) CPU IO devic e Memory DMA CPU IO devic e Memory
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  Typical DMA Module 19 Source:William Stallings, Computer Organization and Architecture, 8th Edition
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  3 Techniques for Inputof a Block of Data 20 Source: William Stallings, Computer Organization and Architecture, 8th Edition
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  Blocks of aComputer 21