Multi core processor

Multi core processor

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  Intel x86 Multi-coreOrganization 1
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  A multi-core computeralso known as chip multiprocessor, combines two or more processors (called cores) on a single piece of silicon(called a die). 2
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  Hardware Performance Issues: •Increase in parallelism • Power consumption  Software Performance Issues: • Performance dependent on effective utilization of parallel resources • Even small amounts of serial code impact performance  3
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  Main variables inmulti-core organization :  Number of core processors on chip  Number of levels of cache memory  Amount of cache memory that is shared 4
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  5 Intel Core i7 IntelCore Duo AMD Opteron ARM11 MP Core
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  Intel Core duo: Introduced in 2006, implements two x86 superscalar processor with shared L2 cache  Each multi-core processor has dedicated L1 cache, 32kb instruction and data cache 6
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   Independent Thermalcontrol unit per core • Manages chip heat dissipation with sensors • Maximize performance within thermal constraints 7
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   Advanced ProgrammableInterrupt Controlled (APIC) • It can provide Inter-process interrupts which allow any process to interrupt any other process • Routes interrupts to appropriate core • Includes timer so OS can self-interrupt a core 8
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   Power ManagementLogic • Monitors thermal conditions and CPU activity • Adjusts voltage (and thus power consumption) • Can switch on/off individual logic subsystems to save power • Split-bus transactions can sleep on one end 9
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   2MB sharedL2 cache • Dynamic allocation • Extended to support multiple Core Duo in SMP (not SMT) • L2 data shared between local cores (fast) or external  Bus interface is FSB 10
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       November 2008 Four x86SMT processors Dedicated L2, shared L3 cache Speculative pre-fetch for caches On chip DDR3 memory controller • Three 8 byte channels (192 bits) giving 32GB/s • No front side bus 12
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   Quick Path Interconnection •Cache coherent point-to-point link • High speed communications between processor chips • 6.4G transfers per second, 16 bits per transfer • Dedicated bi-directional pairs • Total bandwidth 25.6GB/s 13
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