Lecture 7
•Programmable Interval
Timer - 8254
Kumary Sumi Rani Shaha
Lecturer
Dept. of EECE, PUST
16 August 2023 1
❖ The Intel 8254 is a counter/timer device designed to solve the common timing
control problems in microcomputer system design.
❖It provides three independent 16-bit counters, each capable of handling clock
inputs up to 10 MHz.
❖ All modes are software programmable.
❖The 8254 is a superset of the 8253.
Pin Diagram of 8254
data at rest, data
in motion and
data in use
0
0
0
Block Diagram of 8254
Application
Some of the other counter/timer functions common to microcomputers
which can be implemented with the 8254 are:
✓Real time clock
✓Event-counter
✓Digital one-shot
✓Programmable rate generator
✓Square wave generator
✓Binary rate multiplier
✓Complex waveform generator
✓Complex motor controller
8254 System Interface
✓ It includes three 16-bit counters that can work independently in 6 different
modes.
✓ It is packaged in a 24-pin DIP(Dual in-line package) and requires +5V
power supply.
✓It can count either in binary or BCD.
✓It’s counters can operate at a maximum frequency of 10 MHz
Programming the 8254
Counters are programmed by writing a Control Word and then an initial count.
The Control Words are written into the Control Word Register, which is
selected when A1,A0 = 11. The Control Word itself specifies which Counter is
being programmed.
Read/Write operation Summary
Six Different Modes
Mode 0: Interrupt on Terminal Count
Mode 1: Hardware Retriggerable One-shot
Mode 2: Rate Generator
Mode 3: Square Wave Mode
Mode 4: Software Triggered Mode
Mode 5: Hardware Triggered Mod (Retriggerable).
Mode 0: Interrupt on terminal count
* N stands for an
undefined count.
✓Mode 0 is typically used for event counting.
✓After the Control Word is written, OUT is initially low, and will remain low
until the Counter reaches zero. OUT then goes high and remains high until a
new count or a new Mode 0 Control Word is written into the Counter.
✓GATE =1 enables counting; GATE = 0 disables counting.
Mode 1: Hardware Retriggerable One-Shot.
✓OUT is initially (after loading CW) high. Also remain high when count
is written.
✓When gate is triggered, OUT goes low and will remain low until the
Counter reaches zero. On completion of count OUT goes high again.
Mode 2: RATE GENERATOR
✓Allows the counter to generate a series of continuous pulses that are
one clock pulse wide.
✓The separation between pulses is determined by the count.
✓If count N is loaded then, output will remain high for (N-1) clock
period and low for 1 clock period
✓In mode 2, a COUNT of 1 is illegal.
Mode 3: Square Wave Mode.
✓Generates a continuous square wave at the out connection
✓Mode 3 is similar to Mode 2 except for the duty cycle of OUT.
✓If the count (N) is even, the output is high for one half (N/2) of the count
and low for one half (N/2) of the count.
✓If the count (N) is odd, the output is high for one clocking period longer
than it is low i.e. high for (N+1)/2 clock pulses and low for (N-1)/2 clock
pulses.
Mode 4: Software Triggered One-shot.
✓Allows the counter to produce a single pulse at the output
✓If count of N is loaded, then OUT will be high for N clock cycles and low
for one clock cycle at the end.
✓The cycle does not begin until the counter is loaded again.
Mode 5: Hardware Triggered Mode.
✓A hardware triggered one-shot that function as mode 4, except that it is
started by a trigger pulse on the G pin instead of by software.
✓When the GATE pulse is triggered from low to high the count begins. At
the end of the count OUT goes low for one clock period.
Problem 1
(a)Identify the port address of the control register and counter 2 in figure.
(b)Write a subroutine to initialize counter 2 in mode 0 with a count of 50,000. The
subroutine should also include reading counts on the fly; when count reaches zero,
it should return to the main program.
(c) Write a main program to display seconds by calling the subroutine as many
times as necessary.
Solution (a):
Addres
A15 A14 A13 A12 A11…………A5 A4 A3 A2 A1 A0 s
1 0 0 0 ………………… 0 0 0 0 0 8000H Counter 0
1 0 0 0 …………………. 0 0 0 0 1 8001H Counter 1
1 0 0 0 …………………. 0 0 0 1 0 8002H Counter 2
1 0 0 0 …………………. 0 0 0 1 1 8003H Control
Register
Address of counter 2 = 8002H
Address of control register = 8003H
Solution (b):
We have to initialize counter 2 in Mode0.
Count=(50,000)10 = C350H
Control Word to initialize counter 2 in mode0 and to load 16-bit count:
1 0 1 1 0 0 0 0 B0H
Control
Load 16 bit Count in Word
Counter 2 count Mode 0 binary
To read count 2 on the fly counter latch command is:
1 0 0 0 0 0 0 0 80H
Counter latch Don’t
Counter 2 command care
Counter latch
command
Solution (b)
Subroutine:
COUNTER PROC NEAR
CNT2 EQU 8002H
CNTR EQU 8003H
MOV AL, B0H
OUT CNTR, AL
MOV AL, 50H
OUT CNTR2, AL
MOV AL, C3H
OUT CNTR2, AL
READ: MOV AL, 80H
OUT CNTR, AL
IN AL, CNT2
MOV DL, AL
IN AL, CNT2
OR AL, DL
JNZ READ
RET
COUNT ENDP
Thanks
