KEMBAR78
Issues in design_of_code_generator | PPTX
Presented by,
M.Selva Vinitha
B.E/CSE
M.Kumarasamy college of engineering
Karur.
Code generator
ī‚— Final phase of compiler design
ī‚— Optimized intermediate code is provided as input
ī‚— It generates target code
2/27/2015 2Issues in design of code generator
Code generation and Instruction Selection
4
Symbol
table
input output
Front
end
Intermediate
Code
generator
Code
generator
2/27/2015 Issues in design of code generator
Contdâ€Ļ
ī‚— output code must be correct
ī‚— output code must be of high quality
ī‚— code generator should run efficiently
2/27/2015 4Issues in design of code generator
Pre-requisites
ī‚— Instruction set of target machine.
ī‚— Instruction addressing modes.
ī‚— No. of registers.
ī‚— Configuration of ALU
2/27/2015 5Issues in design of code generator
Issues in the design of a code
generator
ī‚— Input to the code generator
ī‚— Memory management
ī‚— Target programs
ī‚— Instruction selection
ī‚— Register allocation
ī‚— Evaluation order
ī‚— Approaches to code generation
2/27/2015 6Issues in design of code generator
Input to the code generator
ī‚— The intermediate representation of the source program
produced by the front end
ī‚— Several choices for the intermediate language
ī‚— Linear - postfix nottion
ī‚— 3 address - quadruples
ī‚— Virtual machie - stack machine code
ī‚— Graphical - syntax tree &dags
2/27/2015 7Issues in design of code generator
Memory management
ī‚— Mapping names in the source program to addresses of data
objects in run-time memory
ī‚— Done by the front end and the code generator.
ī‚— A name in a three- address statement refers to a symbol-
table entry for the name.
ī‚— A relative address can be determined
2/27/2015 8Issues in design of code generator
Target programs
ī‚— Absolute machine language
ī‚—Relocatable machine language
ī‚— Assembly language
2/27/2015 9Issues in design of code generator
Contd..
Absolute machine language:
ī‚— Produce an absolute machine language program
ī‚— can be placed in a fixed location in memory and
immediately executed.
2/27/2015 10Issues in design of code generator
Contd..
Relocatable machine language:
ī‚—Producing a relocatable machine language program
ī‚—subprograms to be compiled separately.
ī‚—relocatable object modules can be linked together and loaded
for execution by a linking loader.
ī‚—must provide explicit relocation information to the loader, to
link the separately compiled program segments.
2/27/2015 11Issues in design of code generator
Contdâ€Ļ
Assembly language:
ī‚—Producing an assembly language program
ī‚—makes the process of code generation easier
2/27/2015 12Issues in design of code generator
Instruction selection
The factors to be considered during instruction selection are:
ī‚— The uniformity and completeness of the instruction set.
ī‚— Instruction speed and machine idioms.
ī‚— Size of the instruction set.
2/27/2015 13Issues in design of code generator
Contdâ€Ļ
īĩEg., for the following address code is:
a := b + c
d := a + e
inefficient assembly code is:
MOV b, R0 R0 ← b
ADD c, R0 R0 ← c + R0
MOV R0, a a ← R0
MOV a, R0 R0 ← a
ADD e, R0 R0 ← e + R0
MOV R0 , d d ← R0
Here the fourth statement is redundant, and so is the third
statement if ,
'a' is not subsequently used.
2/27/2015 14Issues in design of code generator
Register allocation
â€ĸ Instructions with register operands are usually shorter and
faster
â€ĸ Efficient utilization of registers is important in
generating good code.
2/27/2015 15Issues in design of code generator
Contd..
īĩRegister allocation phase:
â€ĸ Select the set of variables that will reside in registers
īĩRegister assignment phase:
â€ĸ Pick the specific register that a variable will reside in.
2/27/2015 16Issues in design of code generator
Evaluation order
ī‚— The order in which computations are performed
ī‚— Affect the efficiency of the target code.
ī‚— Some computation orders require fewer registers to hold
intermediate results
2/27/2015 17Issues in design of code generator
Approaches to code generation
ī‚— Most important criteria for code generator is that it
produces correct code
ī‚— Correctness takes on special signification
ī‚— It contains a straightforward code generation algorithm
ī‚— The output of such code generator can be improved by
peephole optimization technique
2/27/2015 18Issues in design of code generator
Conclusion
Output of code generator phase is dependent on:
ī‚— Target language
ī‚— Operating system
ī‚— Memory management system
ī‚— Instruction selection
ī‚— Register allocation
ī‚— Evaluation order
2/27/2015 19Issues in design of code generator

Issues in design_of_code_generator

  • 1.
  • 2.
    Code generator ī‚— Finalphase of compiler design ī‚— Optimized intermediate code is provided as input ī‚— It generates target code 2/27/2015 2Issues in design of code generator
  • 3.
    Code generation andInstruction Selection 4 Symbol table input output Front end Intermediate Code generator Code generator 2/27/2015 Issues in design of code generator
  • 4.
    Contdâ€Ļ ī‚— output codemust be correct ī‚— output code must be of high quality ī‚— code generator should run efficiently 2/27/2015 4Issues in design of code generator
  • 5.
    Pre-requisites ī‚— Instruction setof target machine. ī‚— Instruction addressing modes. ī‚— No. of registers. ī‚— Configuration of ALU 2/27/2015 5Issues in design of code generator
  • 6.
    Issues in thedesign of a code generator ī‚— Input to the code generator ī‚— Memory management ī‚— Target programs ī‚— Instruction selection ī‚— Register allocation ī‚— Evaluation order ī‚— Approaches to code generation 2/27/2015 6Issues in design of code generator
  • 7.
    Input to thecode generator ī‚— The intermediate representation of the source program produced by the front end ī‚— Several choices for the intermediate language ī‚— Linear - postfix nottion ī‚— 3 address - quadruples ī‚— Virtual machie - stack machine code ī‚— Graphical - syntax tree &dags 2/27/2015 7Issues in design of code generator
  • 8.
    Memory management ī‚— Mappingnames in the source program to addresses of data objects in run-time memory ī‚— Done by the front end and the code generator. ī‚— A name in a three- address statement refers to a symbol- table entry for the name. ī‚— A relative address can be determined 2/27/2015 8Issues in design of code generator
  • 9.
    Target programs ī‚— Absolutemachine language ī‚—Relocatable machine language ī‚— Assembly language 2/27/2015 9Issues in design of code generator
  • 10.
    Contd.. Absolute machine language: ī‚—Produce an absolute machine language program ī‚— can be placed in a fixed location in memory and immediately executed. 2/27/2015 10Issues in design of code generator
  • 11.
    Contd.. Relocatable machine language: ī‚—Producinga relocatable machine language program ī‚—subprograms to be compiled separately. ī‚—relocatable object modules can be linked together and loaded for execution by a linking loader. ī‚—must provide explicit relocation information to the loader, to link the separately compiled program segments. 2/27/2015 11Issues in design of code generator
  • 12.
    Contdâ€Ļ Assembly language: ī‚—Producing anassembly language program ī‚—makes the process of code generation easier 2/27/2015 12Issues in design of code generator
  • 13.
    Instruction selection The factorsto be considered during instruction selection are: ī‚— The uniformity and completeness of the instruction set. ī‚— Instruction speed and machine idioms. ī‚— Size of the instruction set. 2/27/2015 13Issues in design of code generator
  • 14.
    Contdâ€Ļ īĩEg., for thefollowing address code is: a := b + c d := a + e inefficient assembly code is: MOV b, R0 R0 ← b ADD c, R0 R0 ← c + R0 MOV R0, a a ← R0 MOV a, R0 R0 ← a ADD e, R0 R0 ← e + R0 MOV R0 , d d ← R0 Here the fourth statement is redundant, and so is the third statement if , 'a' is not subsequently used. 2/27/2015 14Issues in design of code generator
  • 15.
    Register allocation â€ĸ Instructionswith register operands are usually shorter and faster â€ĸ Efficient utilization of registers is important in generating good code. 2/27/2015 15Issues in design of code generator
  • 16.
    Contd.. īĩRegister allocation phase: â€ĸSelect the set of variables that will reside in registers īĩRegister assignment phase: â€ĸ Pick the specific register that a variable will reside in. 2/27/2015 16Issues in design of code generator
  • 17.
    Evaluation order ī‚— Theorder in which computations are performed ī‚— Affect the efficiency of the target code. ī‚— Some computation orders require fewer registers to hold intermediate results 2/27/2015 17Issues in design of code generator
  • 18.
    Approaches to codegeneration ī‚— Most important criteria for code generator is that it produces correct code ī‚— Correctness takes on special signification ī‚— It contains a straightforward code generation algorithm ī‚— The output of such code generator can be improved by peephole optimization technique 2/27/2015 18Issues in design of code generator
  • 19.
    Conclusion Output of codegenerator phase is dependent on: ī‚— Target language ī‚— Operating system ī‚— Memory management system ī‚— Instruction selection ī‚— Register allocation ī‚— Evaluation order 2/27/2015 19Issues in design of code generator